blob: bfa14b9a3a306d6e9dee38b48edd46c6dc9eaf0d [file] [log] [blame]
Michael Buesch96d63c02006-06-26 00:25:00 -07001/*
2 * RNG driver for AMD RNGs
3 *
4 * Copyright 2005 (c) MontaVista Software, Inc.
5 *
6 * with the majority of the code coming from:
7 *
8 * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
9 * (c) Copyright 2003 Red Hat Inc <jgarzik@redhat.com>
10 *
11 * derived from
12 *
13 * Hardware driver for the AMD 768 Random Number Generator (RNG)
Alan Cox77122d02008-10-27 15:10:23 +000014 * (c) Copyright 2001 Red Hat Inc
Michael Buesch96d63c02006-06-26 00:25:00 -070015 *
16 * derived from
17 *
18 * Hardware driver for Intel i810 Random Number Generator (RNG)
19 * Copyright 2000,2001 Jeff Garzik <jgarzik@pobox.com>
20 * Copyright 2000,2001 Philipp Rumpf <prumpf@mandrakesoft.com>
21 *
22 * This file is licensed under the terms of the GNU General Public
23 * License version 2. This program is licensed "as is" without any
24 * warranty of any kind, whether express or implied.
25 */
26
Patrick McHardy984e9762007-11-21 12:24:45 +080027#include <linux/delay.h>
Corentin LABBE055ae892016-08-26 13:11:32 +020028#include <linux/hw_random.h>
29#include <linux/kernel.h>
30#include <linux/module.h>
31#include <linux/pci.h>
Michael Buesch96d63c02006-06-26 00:25:00 -070032
Corentin LABBEf8169bf2016-08-26 13:11:31 +020033#define DRV_NAME "AMD768-HWRNG"
Michael Buesch96d63c02006-06-26 00:25:00 -070034
Corentin LABBE3c343a32016-08-26 13:11:35 +020035#define RNGDATA 0x00
36#define RNGDONE 0x04
37#define PMBASE_OFFSET 0xF0
38#define PMBASE_SIZE 8
39
Michael Buesch96d63c02006-06-26 00:25:00 -070040/*
41 * Data for PCI driver interface
42 *
43 * This data only exists for exporting the supported
44 * PCI ids via MODULE_DEVICE_TABLE. We do not actually
45 * register a pci_driver, because someone else might one day
46 * want to register another driver on the same PCI id.
47 */
48static const struct pci_device_id pci_tbl[] = {
Joe Perches409a7362009-06-25 13:50:53 +080049 { PCI_VDEVICE(AMD, 0x7443), 0, },
50 { PCI_VDEVICE(AMD, 0x746b), 0, },
Michael Buesch96d63c02006-06-26 00:25:00 -070051 { 0, }, /* terminate list */
52};
53MODULE_DEVICE_TABLE(pci, pci_tbl);
54
Corentin LABBE7bad2cc2016-08-26 13:11:34 +020055struct amd768_priv {
Corentin LABBE3c343a32016-08-26 13:11:35 +020056 void __iomem *iobase;
Corentin LABBE7bad2cc2016-08-26 13:11:34 +020057 struct pci_dev *pcidev;
58 u32 pmbase;
59};
Michael Buesch96d63c02006-06-26 00:25:00 -070060
Patrick McHardy984e9762007-11-21 12:24:45 +080061static int amd_rng_data_present(struct hwrng *rng, int wait)
Michael Buesch96d63c02006-06-26 00:25:00 -070062{
Corentin LABBE7bad2cc2016-08-26 13:11:34 +020063 struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
Patrick McHardy984e9762007-11-21 12:24:45 +080064 int data, i;
Michael Buesch96d63c02006-06-26 00:25:00 -070065
Patrick McHardy984e9762007-11-21 12:24:45 +080066 for (i = 0; i < 20; i++) {
Corentin LABBE3c343a32016-08-26 13:11:35 +020067 data = !!(ioread32(priv->iobase + RNGDONE) & 1);
Patrick McHardy984e9762007-11-21 12:24:45 +080068 if (data || !wait)
69 break;
70 udelay(10);
71 }
72 return data;
Michael Buesch96d63c02006-06-26 00:25:00 -070073}
74
75static int amd_rng_data_read(struct hwrng *rng, u32 *data)
76{
Corentin LABBE7bad2cc2016-08-26 13:11:34 +020077 struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
Michael Buesch96d63c02006-06-26 00:25:00 -070078
Corentin LABBE3c343a32016-08-26 13:11:35 +020079 *data = ioread32(priv->iobase + RNGDATA);
Michael Buesch96d63c02006-06-26 00:25:00 -070080
81 return 4;
82}
83
84static int amd_rng_init(struct hwrng *rng)
85{
Corentin LABBE7bad2cc2016-08-26 13:11:34 +020086 struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
Michael Buesch96d63c02006-06-26 00:25:00 -070087 u8 rnen;
88
Corentin LABBE7bad2cc2016-08-26 13:11:34 +020089 pci_read_config_byte(priv->pcidev, 0x40, &rnen);
Corentin LABBE1c335d42016-08-26 13:11:30 +020090 rnen |= BIT(7); /* RNG on */
Corentin LABBE7bad2cc2016-08-26 13:11:34 +020091 pci_write_config_byte(priv->pcidev, 0x40, rnen);
Michael Buesch96d63c02006-06-26 00:25:00 -070092
Corentin LABBE7bad2cc2016-08-26 13:11:34 +020093 pci_read_config_byte(priv->pcidev, 0x41, &rnen);
Corentin LABBE1c335d42016-08-26 13:11:30 +020094 rnen |= BIT(7); /* PMIO enable */
Corentin LABBE7bad2cc2016-08-26 13:11:34 +020095 pci_write_config_byte(priv->pcidev, 0x41, rnen);
Michael Buesch96d63c02006-06-26 00:25:00 -070096
97 return 0;
98}
99
100static void amd_rng_cleanup(struct hwrng *rng)
101{
Corentin LABBE7bad2cc2016-08-26 13:11:34 +0200102 struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
Michael Buesch96d63c02006-06-26 00:25:00 -0700103 u8 rnen;
104
Corentin LABBE7bad2cc2016-08-26 13:11:34 +0200105 pci_read_config_byte(priv->pcidev, 0x40, &rnen);
Corentin LABBE1c335d42016-08-26 13:11:30 +0200106 rnen &= ~BIT(7); /* RNG off */
Corentin LABBE7bad2cc2016-08-26 13:11:34 +0200107 pci_write_config_byte(priv->pcidev, 0x40, rnen);
Michael Buesch96d63c02006-06-26 00:25:00 -0700108}
109
Michael Buesch96d63c02006-06-26 00:25:00 -0700110static struct hwrng amd_rng = {
111 .name = "amd",
112 .init = amd_rng_init,
113 .cleanup = amd_rng_cleanup,
114 .data_present = amd_rng_data_present,
115 .data_read = amd_rng_data_read,
116};
117
Michael Buesch96d63c02006-06-26 00:25:00 -0700118static int __init mod_init(void)
119{
120 int err = -ENODEV;
121 struct pci_dev *pdev = NULL;
122 const struct pci_device_id *ent;
123 u32 pmbase;
Corentin LABBE7bad2cc2016-08-26 13:11:34 +0200124 struct amd768_priv *priv;
Michael Buesch96d63c02006-06-26 00:25:00 -0700125
126 for_each_pci_dev(pdev) {
127 ent = pci_match_id(pci_tbl, pdev);
128 if (ent)
129 goto found;
130 }
131 /* Device not found. */
Corentin LABBE7bad2cc2016-08-26 13:11:34 +0200132 return -ENODEV;
Michael Buesch96d63c02006-06-26 00:25:00 -0700133
134found:
135 err = pci_read_config_dword(pdev, 0x58, &pmbase);
136 if (err)
Corentin LABBE7bad2cc2016-08-26 13:11:34 +0200137 return err;
138
Michael Buesch96d63c02006-06-26 00:25:00 -0700139 pmbase &= 0x0000FF00;
140 if (pmbase == 0)
Corentin LABBE7bad2cc2016-08-26 13:11:34 +0200141 return -EIO;
142
143 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
144 if (!priv)
145 return -ENOMEM;
146
Corentin LABBE3c343a32016-08-26 13:11:35 +0200147 if (!request_region(pmbase + PMBASE_OFFSET, PMBASE_SIZE, DRV_NAME)) {
Corentin LABBEf8169bf2016-08-26 13:11:31 +0200148 dev_err(&pdev->dev, DRV_NAME " region 0x%x already in use!\n",
Dmitry Eremin-Solenikovbd68ccb2011-04-27 23:21:15 +0400149 pmbase + 0xF0);
150 err = -EBUSY;
151 goto out;
152 }
Corentin LABBE3c343a32016-08-26 13:11:35 +0200153
154 priv->iobase = ioport_map(pmbase + PMBASE_OFFSET, PMBASE_SIZE);
155 if (!priv->iobase) {
156 pr_err(DRV_NAME "Cannot map ioport\n");
157 err = -EINVAL;
158 goto err_iomap;
159 }
160
Corentin LABBE7bad2cc2016-08-26 13:11:34 +0200161 amd_rng.priv = (unsigned long)priv;
162 priv->pmbase = pmbase;
163 priv->pcidev = pdev;
Michael Buesch96d63c02006-06-26 00:25:00 -0700164
Corentin LABBEf8169bf2016-08-26 13:11:31 +0200165 pr_info(DRV_NAME " detected\n");
Michael Buesch96d63c02006-06-26 00:25:00 -0700166 err = hwrng_register(&amd_rng);
167 if (err) {
Corentin LABBEf8169bf2016-08-26 13:11:31 +0200168 pr_err(DRV_NAME " registering failed (%d)\n", err);
Corentin LABBE3c343a32016-08-26 13:11:35 +0200169 goto err_hwrng;
Michael Buesch96d63c02006-06-26 00:25:00 -0700170 }
Corentin LABBE7bad2cc2016-08-26 13:11:34 +0200171 return 0;
172
Corentin LABBE3c343a32016-08-26 13:11:35 +0200173err_hwrng:
174 ioport_unmap(priv->iobase);
175err_iomap:
176 release_region(pmbase + PMBASE_OFFSET, PMBASE_SIZE);
Michael Buesch96d63c02006-06-26 00:25:00 -0700177out:
Corentin LABBE7bad2cc2016-08-26 13:11:34 +0200178 kfree(priv);
Michael Buesch96d63c02006-06-26 00:25:00 -0700179 return err;
180}
181
182static void __exit mod_exit(void)
183{
Corentin LABBE7bad2cc2016-08-26 13:11:34 +0200184 struct amd768_priv *priv;
185
186 priv = (struct amd768_priv *)amd_rng.priv;
Corentin LABBE60207212016-08-26 13:11:29 +0200187
Michael Buesch96d63c02006-06-26 00:25:00 -0700188 hwrng_unregister(&amd_rng);
Corentin LABBEfdec60d2016-08-26 13:11:33 +0200189
Corentin LABBE3c343a32016-08-26 13:11:35 +0200190 ioport_unmap(priv->iobase);
191
192 release_region(priv->pmbase + PMBASE_OFFSET, PMBASE_SIZE);
Corentin LABBE7bad2cc2016-08-26 13:11:34 +0200193
194 kfree(priv);
Michael Buesch96d63c02006-06-26 00:25:00 -0700195}
196
Michael Buesch56fb5fe2007-01-10 23:15:43 -0800197module_init(mod_init);
Michael Buesch96d63c02006-06-26 00:25:00 -0700198module_exit(mod_exit);
199
200MODULE_AUTHOR("The Linux Kernel team");
201MODULE_DESCRIPTION("H/W RNG driver for AMD chipsets");
202MODULE_LICENSE("GPL");