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Arnd Bergmannfef1c772005-06-23 09:43:37 +10001/*
Arnd Bergmannf3f66f52005-10-31 20:08:37 -05002 * linux/arch/powerpc/platforms/cell/cell_setup.c
Arnd Bergmannfef1c772005-06-23 09:43:37 +10003 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Modified by PPC64 Team, IBM Corp
Arnd Bergmannf3f66f52005-10-31 20:08:37 -05008 * Modified by Cell Team, IBM Deutschland Entwicklung GmbH
Arnd Bergmannfef1c772005-06-23 09:43:37 +10009 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15#undef DEBUG
16
17#include <linux/config.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/mm.h>
21#include <linux/stddef.h>
22#include <linux/unistd.h>
23#include <linux/slab.h>
24#include <linux/user.h>
25#include <linux/reboot.h>
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/irq.h>
29#include <linux/seq_file.h>
30#include <linux/root_dev.h>
31#include <linux/console.h>
32
33#include <asm/mmu.h>
34#include <asm/processor.h>
35#include <asm/io.h>
Michael Ellerman3d1229d2005-11-14 23:35:00 +110036#include <asm/kexec.h>
Arnd Bergmannfef1c772005-06-23 09:43:37 +100037#include <asm/pgtable.h>
38#include <asm/prom.h>
39#include <asm/rtas.h>
40#include <asm/pci-bridge.h>
41#include <asm/iommu.h>
42#include <asm/dma.h>
43#include <asm/machdep.h>
44#include <asm/time.h>
45#include <asm/nvram.h>
46#include <asm/cputable.h>
Stephen Rothwelld3878992005-09-28 02:50:25 +100047#include <asm/ppc-pci.h>
Paul Mackerras40ef8cb2005-10-10 22:50:37 +100048#include <asm/irq.h>
Arnd Bergmannfef1c772005-06-23 09:43:37 +100049
Arnd Bergmannf3f66f52005-10-31 20:08:37 -050050#include "interrupt.h"
51#include "iommu.h"
Arnd Bergmannfef1c772005-06-23 09:43:37 +100052
53#ifdef DEBUG
54#define DBG(fmt...) udbg_printf(fmt)
55#else
56#define DBG(fmt...)
57#endif
58
Arnd Bergmannf3f66f52005-10-31 20:08:37 -050059void cell_show_cpuinfo(struct seq_file *m)
Arnd Bergmannfef1c772005-06-23 09:43:37 +100060{
61 struct device_node *root;
62 const char *model = "";
63
64 root = of_find_node_by_path("/");
65 if (root)
66 model = get_property(root, "model", NULL);
Arnd Bergmannf3f66f52005-10-31 20:08:37 -050067 seq_printf(m, "machine\t\t: CHRP %s\n", model);
Arnd Bergmannfef1c772005-06-23 09:43:37 +100068 of_node_put(root);
69}
70
Arnd Bergmannf3f66f52005-10-31 20:08:37 -050071static void cell_progress(char *s, unsigned short hex)
Arnd Bergmannfef1c772005-06-23 09:43:37 +100072{
73 printk("*** %04x : %s\n", hex, s ? s : "");
74}
75
Arnd Bergmannf3f66f52005-10-31 20:08:37 -050076static void __init cell_setup_arch(void)
Arnd Bergmannfef1c772005-06-23 09:43:37 +100077{
Arnd Bergmanncebf5892005-06-23 09:43:43 +100078 ppc_md.init_IRQ = iic_init_IRQ;
79 ppc_md.get_irq = iic_get_irq;
80
Arnd Bergmannfef1c772005-06-23 09:43:37 +100081#ifdef CONFIG_SMP
Arnd Bergmannf3f66f52005-10-31 20:08:37 -050082 smp_init_cell();
Arnd Bergmannfef1c772005-06-23 09:43:37 +100083#endif
84
85 /* init to some ~sane value until calibrate_delay() runs */
86 loops_per_jiffy = 50000000;
87
88 if (ROOT_DEV == 0) {
89 printk("No ramdisk, default root is /dev/hda2\n");
90 ROOT_DEV = Root_HDA2;
91 }
92
93 /* Find and initialize PCI host bridges */
94 init_pci_config_tokens();
95 find_and_init_phbs();
Arnd Bergmanncebf5892005-06-23 09:43:43 +100096 spider_init_IRQ();
Arnd Bergmannfef1c772005-06-23 09:43:37 +100097#ifdef CONFIG_DUMMY_CONSOLE
98 conswitchp = &dummy_con;
99#endif
100
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500101 mmio_nvram_init();
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000102}
103
104/*
105 * Early initialization. Relocation is on but do not reference unbolted pages
106 */
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500107static void __init cell_init_early(void)
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000108{
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500109 DBG(" -> cell_init_early()\n");
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000110
111 hpte_init_native();
112
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500113 cell_init_iommu();
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000114
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500115 ppc64_interrupt_controller = IC_CELL_PIC;
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000116
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500117 DBG(" <- cell_init_early()\n");
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000118}
119
120
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500121static int __init cell_probe(int platform)
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000122{
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500123 if (platform != PLATFORM_CELL)
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000124 return 0;
125
126 return 1;
127}
128
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500129struct machdep_calls __initdata cell_md = {
130 .probe = cell_probe,
131 .setup_arch = cell_setup_arch,
132 .init_early = cell_init_early,
133 .show_cpuinfo = cell_show_cpuinfo,
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000134 .restart = rtas_restart,
135 .power_off = rtas_power_off,
136 .halt = rtas_halt,
137 .get_boot_time = rtas_get_boot_time,
138 .get_rtc_time = rtas_get_rtc_time,
139 .set_rtc_time = rtas_set_rtc_time,
140 .calibrate_decr = generic_calibrate_decr,
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500141 .progress = cell_progress,
Michael Ellerman3d1229d2005-11-14 23:35:00 +1100142#ifdef CONFIG_KEXEC
143 .machine_kexec = default_machine_kexec,
144 .machine_kexec_prepare = default_machine_kexec_prepare,
145#endif
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000146};