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Sascha Hauerf326f792012-09-21 10:07:50 +02001/*
2 * i.MX IPUv3 Graphics driver
3 *
4 * Copyright (C) 2011 Sascha Hauer, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Sascha Hauerf326f792012-09-21 10:07:50 +020014 */
Russell King17b50012013-11-03 11:23:34 +000015#include <linux/component.h>
Sascha Hauerf326f792012-09-21 10:07:50 +020016#include <linux/module.h>
17#include <linux/export.h>
18#include <linux/device.h>
19#include <linux/platform_device.h>
20#include <drm/drmP.h>
Liu Yingae2531a2016-07-08 17:40:57 +080021#include <drm/drm_atomic.h>
Liu Ying255c35f2016-07-08 17:40:56 +080022#include <drm/drm_atomic_helper.h>
Sascha Hauerf326f792012-09-21 10:07:50 +020023#include <drm/drm_crtc_helper.h>
Sascha Hauerf326f792012-09-21 10:07:50 +020024#include <linux/clk.h>
Philipp Zabelb8d181e2013-10-10 16:18:45 +020025#include <linux/errno.h>
Sascha Hauerf326f792012-09-21 10:07:50 +020026#include <drm/drm_gem_cma_helper.h>
27#include <drm/drm_fb_cma_helper.h>
28
Philipp Zabel39b90042013-09-30 16:13:39 +020029#include <video/imx-ipu-v3.h>
Sascha Hauerf326f792012-09-21 10:07:50 +020030#include "imx-drm.h"
Philipp Zabelb8d181e2013-10-10 16:18:45 +020031#include "ipuv3-plane.h"
Sascha Hauerf326f792012-09-21 10:07:50 +020032
33#define DRIVER_DESC "i.MX IPUv3 Graphics"
34
Sascha Hauerf326f792012-09-21 10:07:50 +020035struct ipu_crtc {
Sascha Hauerf326f792012-09-21 10:07:50 +020036 struct device *dev;
37 struct drm_crtc base;
38 struct imx_drm_crtc *imx_crtc;
Philipp Zabelb8d181e2013-10-10 16:18:45 +020039
40 /* plane[0] is the full plane, plane[1] is the partial plane */
41 struct ipu_plane *plane[2];
42
Sascha Hauerf326f792012-09-21 10:07:50 +020043 struct ipu_dc *dc;
Sascha Hauerf326f792012-09-21 10:07:50 +020044 struct ipu_di *di;
Sascha Hauerf326f792012-09-21 10:07:50 +020045 int irq;
Sascha Hauerf326f792012-09-21 10:07:50 +020046};
47
Philipp Zabel3df07392016-07-06 15:47:11 +020048static inline struct ipu_crtc *to_ipu_crtc(struct drm_crtc *crtc)
49{
50 return container_of(crtc, struct ipu_crtc, base);
51}
Sascha Hauerf326f792012-09-21 10:07:50 +020052
Liu Yingf6e396e2016-07-08 17:41:01 +080053static void ipu_crtc_enable(struct drm_crtc *crtc)
Sascha Hauerf326f792012-09-21 10:07:50 +020054{
Liu Yingf6e396e2016-07-08 17:41:01 +080055 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
Philipp Zabel1e6d4862014-04-14 23:53:23 +020056 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
57
Lucas Stache0fb7dd2017-03-08 12:13:20 +010058 ipu_prg_enable(ipu);
Philipp Zabel1e6d4862014-04-14 23:53:23 +020059 ipu_dc_enable(ipu);
Philipp Zabelc115edb2014-04-14 23:53:22 +020060 ipu_dc_enable_channel(ipu_crtc->dc);
61 ipu_di_enable(ipu_crtc->di);
Sascha Hauerf326f792012-09-21 10:07:50 +020062}
63
Philipp Zabeleb8c8882017-02-24 18:31:05 +010064static void ipu_crtc_disable_planes(struct ipu_crtc *ipu_crtc,
65 struct drm_crtc_state *old_crtc_state)
66{
67 bool disable_partial = false;
68 bool disable_full = false;
69 struct drm_plane *plane;
70
71 drm_atomic_crtc_state_for_each_plane(plane, old_crtc_state) {
72 if (plane == &ipu_crtc->plane[0]->base)
73 disable_full = true;
74 if (&ipu_crtc->plane[1] && plane == &ipu_crtc->plane[1]->base)
75 disable_partial = true;
76 }
77
78 if (disable_partial)
79 ipu_plane_disable(ipu_crtc->plane[1], true);
80 if (disable_full)
81 ipu_plane_disable(ipu_crtc->plane[0], false);
82}
83
Liu Ying8cc17b52016-08-26 15:30:42 +080084static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
85 struct drm_crtc_state *old_crtc_state)
Sascha Hauerf326f792012-09-21 10:07:50 +020086{
Liu Yingf6e396e2016-07-08 17:41:01 +080087 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
Philipp Zabel1e6d4862014-04-14 23:53:23 +020088 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
Sascha Hauerf326f792012-09-21 10:07:50 +020089
Sascha Hauerf326f792012-09-21 10:07:50 +020090 ipu_dc_disable_channel(ipu_crtc->dc);
Sascha Hauerf326f792012-09-21 10:07:50 +020091 ipu_di_disable(ipu_crtc->di);
Lucas Stach5ced9372016-11-08 17:04:10 +010092 /*
93 * Planes must be disabled before DC clock is removed, as otherwise the
94 * attached IDMACs will be left in undefined state, possibly hanging
95 * the IPU or even system.
96 */
Philipp Zabeleb8c8882017-02-24 18:31:05 +010097 ipu_crtc_disable_planes(ipu_crtc, old_crtc_state);
Philipp Zabel1e6d4862014-04-14 23:53:23 +020098 ipu_dc_disable(ipu);
Lucas Stache0fb7dd2017-03-08 12:13:20 +010099 ipu_prg_disable(ipu);
Liu Ying33f14232016-07-08 17:40:55 +0800100
Liu Ying5f2f9112016-07-08 17:40:59 +0800101 spin_lock_irq(&crtc->dev->event_lock);
102 if (crtc->state->event) {
103 drm_crtc_send_vblank_event(crtc, crtc->state->event);
104 crtc->state->event = NULL;
105 }
106 spin_unlock_irq(&crtc->dev->event_lock);
Liu Ying5f4df0c2016-08-26 15:30:43 +0800107
Lucas Stacha4744782016-08-29 17:51:24 +0200108 drm_crtc_vblank_off(crtc);
Sascha Hauerf326f792012-09-21 10:07:50 +0200109}
110
Philipp Zabel49f98bc2016-07-06 14:49:24 +0200111static void imx_drm_crtc_reset(struct drm_crtc *crtc)
112{
113 struct imx_crtc_state *state;
114
115 if (crtc->state) {
116 if (crtc->state->mode_blob)
117 drm_property_unreference_blob(crtc->state->mode_blob);
118
119 state = to_imx_crtc_state(crtc->state);
120 memset(state, 0, sizeof(*state));
121 } else {
122 state = kzalloc(sizeof(*state), GFP_KERNEL);
123 if (!state)
124 return;
125 crtc->state = &state->base;
126 }
127
128 state->base.crtc = crtc;
129}
130
131static struct drm_crtc_state *imx_drm_crtc_duplicate_state(struct drm_crtc *crtc)
132{
133 struct imx_crtc_state *state;
134
135 state = kzalloc(sizeof(*state), GFP_KERNEL);
136 if (!state)
137 return NULL;
138
139 __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
140
141 WARN_ON(state->base.crtc != crtc);
142 state->base.crtc = crtc;
143
144 return &state->base;
145}
146
147static void imx_drm_crtc_destroy_state(struct drm_crtc *crtc,
148 struct drm_crtc_state *state)
149{
150 __drm_atomic_helper_crtc_destroy_state(state);
151 kfree(to_imx_crtc_state(state));
152}
153
Shawn Guo44b460c2017-02-07 17:16:24 +0800154static int ipu_enable_vblank(struct drm_crtc *crtc)
Lucas Stach8e3b16e2016-08-11 11:18:49 +0200155{
Shawn Guo44b460c2017-02-07 17:16:24 +0800156 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
157
158 enable_irq(ipu_crtc->irq);
159
160 return 0;
161}
162
163static void ipu_disable_vblank(struct drm_crtc *crtc)
164{
165 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
166
167 disable_irq_nosync(ipu_crtc->irq);
Lucas Stach8e3b16e2016-08-11 11:18:49 +0200168}
169
Sascha Hauerf326f792012-09-21 10:07:50 +0200170static const struct drm_crtc_funcs ipu_crtc_funcs = {
Liu Ying5f2f9112016-07-08 17:40:59 +0800171 .set_config = drm_atomic_helper_set_config,
Shawn Guo44b460c2017-02-07 17:16:24 +0800172 .destroy = drm_crtc_cleanup,
Liu Ying5f2f9112016-07-08 17:40:59 +0800173 .page_flip = drm_atomic_helper_page_flip,
Philipp Zabel49f98bc2016-07-06 14:49:24 +0200174 .reset = imx_drm_crtc_reset,
175 .atomic_duplicate_state = imx_drm_crtc_duplicate_state,
176 .atomic_destroy_state = imx_drm_crtc_destroy_state,
Shawn Guo44b460c2017-02-07 17:16:24 +0800177 .enable_vblank = ipu_enable_vblank,
178 .disable_vblank = ipu_disable_vblank,
Sascha Hauerf326f792012-09-21 10:07:50 +0200179};
180
Liu Ying33f14232016-07-08 17:40:55 +0800181static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
182{
183 struct ipu_crtc *ipu_crtc = dev_id;
184
Liu Ying3ec2e502016-07-29 14:00:21 +0800185 drm_crtc_handle_vblank(&ipu_crtc->base);
Liu Ying33f14232016-07-08 17:40:55 +0800186
Liu Ying33f14232016-07-08 17:40:55 +0800187 return IRQ_HANDLED;
188}
189
190static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
191 const struct drm_display_mode *mode,
192 struct drm_display_mode *adjusted_mode)
193{
194 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
195 struct videomode vm;
196 int ret;
197
198 drm_display_mode_to_videomode(adjusted_mode, &vm);
199
200 ret = ipu_di_adjust_videomode(ipu_crtc->di, &vm);
201 if (ret)
202 return false;
203
204 if ((vm.vsync_len == 0) || (vm.hsync_len == 0))
205 return false;
206
207 drm_display_mode_from_videomode(&vm, adjusted_mode);
208
209 return true;
210}
211
Liu Ying33f14232016-07-08 17:40:55 +0800212static int ipu_crtc_atomic_check(struct drm_crtc *crtc,
213 struct drm_crtc_state *state)
214{
Liu Ying5f2f9112016-07-08 17:40:59 +0800215 u32 primary_plane_mask = 1 << drm_plane_index(crtc->primary);
216
217 if (state->active && (primary_plane_mask & state->plane_mask) == 0)
218 return -EINVAL;
219
Liu Ying33f14232016-07-08 17:40:55 +0800220 return 0;
221}
222
Liu Ying5f2f9112016-07-08 17:40:59 +0800223static void ipu_crtc_atomic_begin(struct drm_crtc *crtc,
224 struct drm_crtc_state *old_crtc_state)
225{
Lucas Stacha4744782016-08-29 17:51:24 +0200226 drm_crtc_vblank_on(crtc);
227
Liu Ying5f2f9112016-07-08 17:40:59 +0800228 spin_lock_irq(&crtc->dev->event_lock);
229 if (crtc->state->event) {
230 WARN_ON(drm_crtc_vblank_get(crtc));
231 drm_crtc_arm_vblank_event(crtc, crtc->state->event);
232 crtc->state->event = NULL;
233 }
234 spin_unlock_irq(&crtc->dev->event_lock);
235}
236
Liu Ying33f14232016-07-08 17:40:55 +0800237static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc)
Sascha Hauerf326f792012-09-21 10:07:50 +0200238{
Russell Kingd50141d2014-12-21 15:58:19 +0000239 struct drm_device *dev = crtc->dev;
240 struct drm_encoder *encoder;
Sascha Hauerf326f792012-09-21 10:07:50 +0200241 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
Liu Ying33f14232016-07-08 17:40:55 +0800242 struct drm_display_mode *mode = &crtc->state->adjusted_mode;
Philipp Zabel49f98bc2016-07-06 14:49:24 +0200243 struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc->state);
Sascha Hauerf326f792012-09-21 10:07:50 +0200244 struct ipu_di_signal_cfg sig_cfg = {};
Russell Kingd50141d2014-12-21 15:58:19 +0000245 unsigned long encoder_types = 0;
Sascha Hauerf326f792012-09-21 10:07:50 +0200246
247 dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
248 mode->hdisplay);
249 dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
250 mode->vdisplay);
251
Liu Ying032003c2016-07-08 17:40:58 +0800252 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
Philipp Zabel49f98bc2016-07-06 14:49:24 +0200253 if (encoder->crtc == crtc)
Russell Kingd50141d2014-12-21 15:58:19 +0000254 encoder_types |= BIT(encoder->encoder_type);
Liu Ying032003c2016-07-08 17:40:58 +0800255 }
Russell Kingd50141d2014-12-21 15:58:19 +0000256
257 dev_dbg(ipu_crtc->dev, "%s: attached to encoder types 0x%lx\n",
258 __func__, encoder_types);
259
260 /*
Philipp Zabele0d155c2014-07-11 17:28:45 +0200261 * If we have DAC or LDB, then we need the IPU DI clock to be
262 * the same as the LDB DI clock. For TVDAC, derive the IPU DI
263 * clock from 27 MHz TVE_DI clock, but allow to divide it.
Russell Kingd50141d2014-12-21 15:58:19 +0000264 */
265 if (encoder_types & (BIT(DRM_MODE_ENCODER_DAC) |
Russell Kingd50141d2014-12-21 15:58:19 +0000266 BIT(DRM_MODE_ENCODER_LVDS)))
267 sig_cfg.clkflags = IPU_DI_CLKMODE_SYNC | IPU_DI_CLKMODE_EXT;
Philipp Zabele0d155c2014-07-11 17:28:45 +0200268 else if (encoder_types & BIT(DRM_MODE_ENCODER_TVDAC))
269 sig_cfg.clkflags = IPU_DI_CLKMODE_EXT;
Russell Kingd50141d2014-12-21 15:58:19 +0000270 else
271 sig_cfg.clkflags = 0;
272
Philipp Zabel49f98bc2016-07-06 14:49:24 +0200273 sig_cfg.enable_pol = !(imx_crtc_state->bus_flags & DRM_BUS_FLAG_DE_LOW);
Philipp Zabel4ed094f2016-05-09 17:02:13 +0200274 /* Default to driving pixel data on negative clock edges */
Philipp Zabel49f98bc2016-07-06 14:49:24 +0200275 sig_cfg.clk_pol = !!(imx_crtc_state->bus_flags &
Philipp Zabel4ed094f2016-05-09 17:02:13 +0200276 DRM_BUS_FLAG_PIXDATA_POSEDGE);
Philipp Zabel49f98bc2016-07-06 14:49:24 +0200277 sig_cfg.bus_format = imx_crtc_state->bus_format;
Sascha Hauerf326f792012-09-21 10:07:50 +0200278 sig_cfg.v_to_h_sync = 0;
Philipp Zabel49f98bc2016-07-06 14:49:24 +0200279 sig_cfg.hsync_pin = imx_crtc_state->di_hsync_pin;
280 sig_cfg.vsync_pin = imx_crtc_state->di_vsync_pin;
Philipp Zabel2ea42602013-04-08 18:04:35 +0200281
Steve Longerbeamb6835a72014-12-18 18:00:25 -0800282 drm_display_mode_to_videomode(mode, &sig_cfg.mode);
283
Liu Ying33f14232016-07-08 17:40:55 +0800284 ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di,
285 mode->flags & DRM_MODE_FLAG_INTERLACE,
Philipp Zabel49f98bc2016-07-06 14:49:24 +0200286 imx_crtc_state->bus_format, mode->hdisplay);
Liu Ying33f14232016-07-08 17:40:55 +0800287 ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
Sascha Hauerf326f792012-09-21 10:07:50 +0200288}
289
Ville Syrjälä7ae847d2015-12-15 12:21:09 +0100290static const struct drm_crtc_helper_funcs ipu_helper_funcs = {
Sascha Hauerf326f792012-09-21 10:07:50 +0200291 .mode_fixup = ipu_crtc_mode_fixup,
Liu Ying33f14232016-07-08 17:40:55 +0800292 .mode_set_nofb = ipu_crtc_mode_set_nofb,
Liu Ying33f14232016-07-08 17:40:55 +0800293 .atomic_check = ipu_crtc_atomic_check,
Liu Ying5f2f9112016-07-08 17:40:59 +0800294 .atomic_begin = ipu_crtc_atomic_begin,
Liu Ying8cc17b52016-08-26 15:30:42 +0800295 .atomic_disable = ipu_crtc_atomic_disable,
Liu Yingf6e396e2016-07-08 17:41:01 +0800296 .enable = ipu_crtc_enable,
Sascha Hauerf326f792012-09-21 10:07:50 +0200297};
298
Sascha Hauerf326f792012-09-21 10:07:50 +0200299static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
300{
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200301 if (!IS_ERR_OR_NULL(ipu_crtc->dc))
302 ipu_dc_put(ipu_crtc->dc);
Sascha Hauerf326f792012-09-21 10:07:50 +0200303 if (!IS_ERR_OR_NULL(ipu_crtc->di))
304 ipu_di_put(ipu_crtc->di);
305}
306
307static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
308 struct ipu_client_platformdata *pdata)
309{
310 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
311 int ret;
312
Sascha Hauerf326f792012-09-21 10:07:50 +0200313 ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
314 if (IS_ERR(ipu_crtc->dc)) {
315 ret = PTR_ERR(ipu_crtc->dc);
316 goto err_out;
317 }
318
Sascha Hauerf326f792012-09-21 10:07:50 +0200319 ipu_crtc->di = ipu_di_get(ipu, pdata->di);
320 if (IS_ERR(ipu_crtc->di)) {
321 ret = PTR_ERR(ipu_crtc->di);
322 goto err_out;
323 }
324
Sascha Hauerf326f792012-09-21 10:07:50 +0200325 return 0;
326err_out:
327 ipu_put_resources(ipu_crtc);
328
329 return ret;
330}
331
332static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
Russell King32266b42013-11-03 12:26:23 +0000333 struct ipu_client_platformdata *pdata, struct drm_device *drm)
Sascha Hauerf326f792012-09-21 10:07:50 +0200334{
Philipp Zabel47b1be52013-02-20 10:57:01 +0800335 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
Shawn Guo44b460c2017-02-07 17:16:24 +0800336 struct drm_crtc *crtc = &ipu_crtc->base;
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200337 int dp = -EINVAL;
Sascha Hauerf326f792012-09-21 10:07:50 +0200338 int ret;
339
340 ret = ipu_get_resources(ipu_crtc, pdata);
341 if (ret) {
342 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
343 ret);
344 return ret;
345 }
346
Philipp Zabel43895592015-11-06 11:08:02 +0100347 if (pdata->dp >= 0)
348 dp = IPU_DP_FLOW_SYNC_BG;
349 ipu_crtc->plane[0] = ipu_plane_init(drm, ipu, pdata->dma[0], dp, 0,
350 DRM_PLANE_TYPE_PRIMARY);
Liu Yinga7ed3c22015-11-06 22:42:45 +0800351 if (IS_ERR(ipu_crtc->plane[0])) {
352 ret = PTR_ERR(ipu_crtc->plane[0]);
353 goto err_put_resources;
354 }
Philipp Zabel43895592015-11-06 11:08:02 +0100355
Shawn Guo44b460c2017-02-07 17:16:24 +0800356 crtc->port = pdata->of_node;
357 drm_crtc_helper_add(crtc, &ipu_helper_funcs);
358 drm_crtc_init_with_planes(drm, crtc, &ipu_crtc->plane[0]->base, NULL,
359 &ipu_crtc_funcs, NULL);
Sascha Hauerf326f792012-09-21 10:07:50 +0200360
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200361 ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
362 if (ret) {
363 dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
364 ret);
Shawn Guo44b460c2017-02-07 17:16:24 +0800365 goto err_put_resources;
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200366 }
367
368 /* If this crtc is using the DP, add an overlay plane */
369 if (pdata->dp >= 0 && pdata->dma[1] > 0) {
Philipp Zabel43895592015-11-06 11:08:02 +0100370 ipu_crtc->plane[1] = ipu_plane_init(drm, ipu, pdata->dma[1],
371 IPU_DP_FLOW_SYNC_FG,
372 drm_crtc_mask(&ipu_crtc->base),
373 DRM_PLANE_TYPE_OVERLAY);
Liu Ying33f14232016-07-08 17:40:55 +0800374 if (IS_ERR(ipu_crtc->plane[1])) {
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200375 ipu_crtc->plane[1] = NULL;
Liu Ying33f14232016-07-08 17:40:55 +0800376 } else {
377 ret = ipu_plane_get_resources(ipu_crtc->plane[1]);
378 if (ret) {
379 dev_err(ipu_crtc->dev, "getting plane 1 "
380 "resources failed with %d.\n", ret);
381 goto err_put_plane0_res;
382 }
383 }
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200384 }
385
386 ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
Philipp Zabel47b1be52013-02-20 10:57:01 +0800387 ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
388 "imx_drm", ipu_crtc);
389 if (ret < 0) {
390 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
Liu Ying33f14232016-07-08 17:40:55 +0800391 goto err_put_plane1_res;
Philipp Zabel47b1be52013-02-20 10:57:01 +0800392 }
Lucas Stach411b0332016-02-09 11:43:08 +0100393 /* Only enable IRQ when we actually need it to trigger work. */
394 disable_irq(ipu_crtc->irq);
Philipp Zabel47b1be52013-02-20 10:57:01 +0800395
Sascha Hauerf326f792012-09-21 10:07:50 +0200396 return 0;
397
Liu Ying33f14232016-07-08 17:40:55 +0800398err_put_plane1_res:
399 if (ipu_crtc->plane[1])
400 ipu_plane_put_resources(ipu_crtc->plane[1]);
401err_put_plane0_res:
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200402 ipu_plane_put_resources(ipu_crtc->plane[0]);
Sascha Hauerf326f792012-09-21 10:07:50 +0200403err_put_resources:
404 ipu_put_resources(ipu_crtc);
405
406 return ret;
407}
408
Russell King17b50012013-11-03 11:23:34 +0000409static int ipu_drm_bind(struct device *dev, struct device *master, void *data)
Sascha Hauerf326f792012-09-21 10:07:50 +0200410{
Russell King17b50012013-11-03 11:23:34 +0000411 struct ipu_client_platformdata *pdata = dev->platform_data;
Russell King32266b42013-11-03 12:26:23 +0000412 struct drm_device *drm = data;
Sascha Hauerf326f792012-09-21 10:07:50 +0200413 struct ipu_crtc *ipu_crtc;
414 int ret;
415
Russell King17b50012013-11-03 11:23:34 +0000416 ipu_crtc = devm_kzalloc(dev, sizeof(*ipu_crtc), GFP_KERNEL);
417 if (!ipu_crtc)
418 return -ENOMEM;
419
420 ipu_crtc->dev = dev;
421
Russell King32266b42013-11-03 12:26:23 +0000422 ret = ipu_crtc_init(ipu_crtc, pdata, drm);
Russell King17b50012013-11-03 11:23:34 +0000423 if (ret)
424 return ret;
425
426 dev_set_drvdata(dev, ipu_crtc);
427
428 return 0;
429}
430
431static void ipu_drm_unbind(struct device *dev, struct device *master,
432 void *data)
433{
434 struct ipu_crtc *ipu_crtc = dev_get_drvdata(dev);
435
Russell King17b50012013-11-03 11:23:34 +0000436 ipu_put_resources(ipu_crtc);
Liu Ying33f14232016-07-08 17:40:55 +0800437 if (ipu_crtc->plane[1])
438 ipu_plane_put_resources(ipu_crtc->plane[1]);
439 ipu_plane_put_resources(ipu_crtc->plane[0]);
Russell King17b50012013-11-03 11:23:34 +0000440}
441
442static const struct component_ops ipu_crtc_ops = {
443 .bind = ipu_drm_bind,
444 .unbind = ipu_drm_unbind,
445};
446
447static int ipu_drm_probe(struct platform_device *pdev)
448{
Philipp Zabel655b43c2014-03-05 10:20:52 +0100449 struct device *dev = &pdev->dev;
Russell King17b50012013-11-03 11:23:34 +0000450 int ret;
451
Philipp Zabel655b43c2014-03-05 10:20:52 +0100452 if (!dev->platform_data)
Sascha Hauerf326f792012-09-21 10:07:50 +0200453 return -EINVAL;
454
Philipp Zabel655b43c2014-03-05 10:20:52 +0100455 ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
Russell King4cdbb4f2013-06-10 16:56:16 +0100456 if (ret)
457 return ret;
Sascha Hauerf326f792012-09-21 10:07:50 +0200458
Philipp Zabel655b43c2014-03-05 10:20:52 +0100459 return component_add(dev, &ipu_crtc_ops);
Sascha Hauerf326f792012-09-21 10:07:50 +0200460}
461
Bill Pemberton8aa1be42012-11-19 13:26:38 -0500462static int ipu_drm_remove(struct platform_device *pdev)
Sascha Hauerf326f792012-09-21 10:07:50 +0200463{
Russell King17b50012013-11-03 11:23:34 +0000464 component_del(&pdev->dev, &ipu_crtc_ops);
Sascha Hauerf326f792012-09-21 10:07:50 +0200465 return 0;
466}
467
Lucas Stach3d1df962017-03-23 17:18:37 +0100468struct platform_driver ipu_drm_driver = {
Sascha Hauerf326f792012-09-21 10:07:50 +0200469 .driver = {
470 .name = "imx-ipuv3-crtc",
471 },
472 .probe = ipu_drm_probe,
Bill Pemberton99c28f12012-11-19 13:20:51 -0500473 .remove = ipu_drm_remove,
Sascha Hauerf326f792012-09-21 10:07:50 +0200474};