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Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030024
25#include <linux/log2.h>
26
27/* slightly larger than one large A-MPDU */
28#define HTT_RX_RING_SIZE_MIN 128
29
30/* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
31#define HTT_RX_RING_SIZE_MAX 2048
32
33#define HTT_RX_AVG_FRM_BYTES 1000
34
35/* ms, very conservative */
36#define HTT_RX_HOST_LATENCY_MAX_MS 20
37
38/* ms, conservative */
39#define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
40
41/* when under memory pressure rx ring refill may fail and needs a retry */
42#define HTT_RX_RING_REFILL_RETRY_MS 50
43
Michal Kaziorf6dc2092013-09-26 10:12:22 +030044
45static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020046static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030047
Kalle Valo5e3dd152013-06-12 20:52:10 +030048static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
49{
50 int size;
51
52 /*
53 * It is expected that the host CPU will typically be able to
54 * service the rx indication from one A-MPDU before the rx
55 * indication from the subsequent A-MPDU happens, roughly 1-2 ms
56 * later. However, the rx ring should be sized very conservatively,
57 * to accomodate the worst reasonable delay before the host CPU
58 * services a rx indication interrupt.
59 *
60 * The rx ring need not be kept full of empty buffers. In theory,
61 * the htt host SW can dynamically track the low-water mark in the
62 * rx ring, and dynamically adjust the level to which the rx ring
63 * is filled with empty buffers, to dynamically meet the desired
64 * low-water mark.
65 *
66 * In contrast, it's difficult to resize the rx ring itself, once
67 * it's in use. Thus, the ring itself should be sized very
68 * conservatively, while the degree to which the ring is filled
69 * with empty buffers should be sized moderately conservatively.
70 */
71
72 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
73 size =
74 htt->max_throughput_mbps +
75 1000 /
76 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
77
78 if (size < HTT_RX_RING_SIZE_MIN)
79 size = HTT_RX_RING_SIZE_MIN;
80
81 if (size > HTT_RX_RING_SIZE_MAX)
82 size = HTT_RX_RING_SIZE_MAX;
83
84 size = roundup_pow_of_two(size);
85
86 return size;
87}
88
89static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
90{
91 int size;
92
93 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
94 size =
95 htt->max_throughput_mbps *
96 1000 /
97 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
98
99 /*
100 * Make sure the fill level is at least 1 less than the ring size.
101 * Leaving 1 element empty allows the SW to easily distinguish
102 * between a full ring vs. an empty ring.
103 */
104 if (size >= htt->rx_ring.size)
105 size = htt->rx_ring.size - 1;
106
107 return size;
108}
109
110static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
111{
112 struct sk_buff *skb;
113 struct ath10k_skb_cb *cb;
114 int i;
115
116 for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
117 skb = htt->rx_ring.netbufs_ring[i];
118 cb = ATH10K_SKB_CB(skb);
119 dma_unmap_single(htt->ar->dev, cb->paddr,
120 skb->len + skb_tailroom(skb),
121 DMA_FROM_DEVICE);
122 dev_kfree_skb_any(skb);
123 }
124
125 htt->rx_ring.fill_cnt = 0;
126}
127
128static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
129{
130 struct htt_rx_desc *rx_desc;
131 struct sk_buff *skb;
132 dma_addr_t paddr;
133 int ret = 0, idx;
134
135 idx = __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr));
136 while (num > 0) {
137 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
138 if (!skb) {
139 ret = -ENOMEM;
140 goto fail;
141 }
142
143 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
144 skb_pull(skb,
145 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
146 skb->data);
147
148 /* Clear rx_desc attention word before posting to Rx ring */
149 rx_desc = (struct htt_rx_desc *)skb->data;
150 rx_desc->attention.flags = __cpu_to_le32(0);
151
152 paddr = dma_map_single(htt->ar->dev, skb->data,
153 skb->len + skb_tailroom(skb),
154 DMA_FROM_DEVICE);
155
156 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
157 dev_kfree_skb_any(skb);
158 ret = -ENOMEM;
159 goto fail;
160 }
161
162 ATH10K_SKB_CB(skb)->paddr = paddr;
163 htt->rx_ring.netbufs_ring[idx] = skb;
164 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
165 htt->rx_ring.fill_cnt++;
166
167 num--;
168 idx++;
169 idx &= htt->rx_ring.size_mask;
170 }
171
172fail:
173 *(htt->rx_ring.alloc_idx.vaddr) = __cpu_to_le32(idx);
174 return ret;
175}
176
177static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
178{
179 lockdep_assert_held(&htt->rx_ring.lock);
180 return __ath10k_htt_rx_ring_fill_n(htt, num);
181}
182
183static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
184{
Michal Kazior6e712d42013-09-24 10:18:36 +0200185 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300186
Michal Kazior6e712d42013-09-24 10:18:36 +0200187 /* Refilling the whole RX ring buffer proves to be a bad idea. The
188 * reason is RX may take up significant amount of CPU cycles and starve
189 * other tasks, e.g. TX on an ethernet device while acting as a bridge
190 * with ath10k wlan interface. This ended up with very poor performance
191 * once CPU the host system was overwhelmed with RX on ath10k.
192 *
193 * By limiting the number of refills the replenishing occurs
194 * progressively. This in turns makes use of the fact tasklets are
195 * processed in FIFO order. This means actual RX processing can starve
196 * out refilling. If there's not enough buffers on RX ring FW will not
197 * report RX until it is refilled with enough buffers. This
198 * automatically balances load wrt to CPU power.
199 *
200 * This probably comes at a cost of lower maximum throughput but
201 * improves the avarage and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300202 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200203 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
204 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
205 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300206 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
207 if (ret == -ENOMEM) {
208 /*
209 * Failed to fill it to the desired level -
210 * we'll start a timer and try again next time.
211 * As long as enough buffers are left in the ring for
212 * another A-MPDU rx, no special recovery is needed.
213 */
214 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
215 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200216 } else if (num_deficit > 0) {
217 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300218 }
219 spin_unlock_bh(&htt->rx_ring.lock);
220}
221
222static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
223{
224 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
225 ath10k_htt_rx_msdu_buff_replenish(htt);
226}
227
Michal Kazior3e841fd2014-05-14 16:23:31 +0300228static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt)
229{
230 struct sk_buff *skb;
231 int i;
232
233 for (i = 0; i < htt->rx_ring.size; i++) {
234 skb = htt->rx_ring.netbufs_ring[i];
235 if (!skb)
236 continue;
237
238 dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr,
239 skb->len + skb_tailroom(skb),
240 DMA_FROM_DEVICE);
241 dev_kfree_skb_any(skb);
242 htt->rx_ring.netbufs_ring[i] = NULL;
243 }
244}
245
Kalle Valo5e3dd152013-06-12 20:52:10 +0300246void ath10k_htt_rx_detach(struct ath10k_htt *htt)
247{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300248 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200249 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200250 tasklet_kill(&htt->txrx_compl_task);
251
252 skb_queue_purge(&htt->tx_compl_q);
253 skb_queue_purge(&htt->rx_compl_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300254
Michal Kazior3e841fd2014-05-14 16:23:31 +0300255 ath10k_htt_rx_ring_clean_up(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300256
257 dma_free_coherent(htt->ar->dev,
258 (htt->rx_ring.size *
259 sizeof(htt->rx_ring.paddrs_ring)),
260 htt->rx_ring.paddrs_ring,
261 htt->rx_ring.base_paddr);
262
263 dma_free_coherent(htt->ar->dev,
264 sizeof(*htt->rx_ring.alloc_idx.vaddr),
265 htt->rx_ring.alloc_idx.vaddr,
266 htt->rx_ring.alloc_idx.paddr);
267
268 kfree(htt->rx_ring.netbufs_ring);
269}
270
271static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
272{
273 int idx;
274 struct sk_buff *msdu;
275
Michal Kazior45967082014-02-27 18:50:05 +0200276 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300277
Michal Kazior8d60ee82014-02-27 18:50:05 +0200278 if (htt->rx_ring.fill_cnt == 0) {
279 ath10k_warn("tried to pop sk_buff from an empty rx ring\n");
280 return NULL;
281 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300282
283 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
284 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300285 htt->rx_ring.netbufs_ring[idx] = NULL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300286
287 idx++;
288 idx &= htt->rx_ring.size_mask;
289 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
290 htt->rx_ring.fill_cnt--;
291
Kalle Valo5e3dd152013-06-12 20:52:10 +0300292 return msdu;
293}
294
295static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
296{
297 struct sk_buff *next;
298
299 while (skb) {
300 next = skb->next;
301 dev_kfree_skb_any(skb);
302 skb = next;
303 }
304}
305
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100306/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300307static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
308 u8 **fw_desc, int *fw_desc_len,
309 struct sk_buff **head_msdu,
310 struct sk_buff **tail_msdu)
311{
312 int msdu_len, msdu_chaining = 0;
313 struct sk_buff *msdu;
314 struct htt_rx_desc *rx_desc;
315
Michal Kazior45967082014-02-27 18:50:05 +0200316 lockdep_assert_held(&htt->rx_ring.lock);
317
Kalle Valo5e3dd152013-06-12 20:52:10 +0300318 if (htt->rx_confused) {
319 ath10k_warn("htt is confused. refusing rx\n");
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100320 return -1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300321 }
322
323 msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
324 while (msdu) {
325 int last_msdu, msdu_len_invalid, msdu_chained;
326
327 dma_unmap_single(htt->ar->dev,
328 ATH10K_SKB_CB(msdu)->paddr,
329 msdu->len + skb_tailroom(msdu),
330 DMA_FROM_DEVICE);
331
Ben Greear75fb2f92014-02-05 13:58:34 -0800332 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300333 msdu->data, msdu->len + skb_tailroom(msdu));
334
335 rx_desc = (struct htt_rx_desc *)msdu->data;
336
337 /* FIXME: we must report msdu payload since this is what caller
338 * expects now */
339 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
340 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
341
342 /*
343 * Sanity check - confirm the HW is finished filling in the
344 * rx data.
345 * If the HW and SW are working correctly, then it's guaranteed
346 * that the HW's MAC DMA is done before this point in the SW.
347 * To prevent the case that we handle a stale Rx descriptor,
348 * just assert for now until we have a way to recover.
349 */
350 if (!(__le32_to_cpu(rx_desc->attention.flags)
351 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
352 ath10k_htt_rx_free_msdu_chain(*head_msdu);
353 *head_msdu = NULL;
354 msdu = NULL;
355 ath10k_err("htt rx stopped. cannot recover\n");
356 htt->rx_confused = true;
357 break;
358 }
359
360 /*
361 * Copy the FW rx descriptor for this MSDU from the rx
362 * indication message into the MSDU's netbuf. HL uses the
363 * same rx indication message definition as LL, and simply
364 * appends new info (fields from the HW rx desc, and the
365 * MSDU payload itself). So, the offset into the rx
366 * indication message only has to account for the standard
367 * offset of the per-MSDU FW rx desc info within the
368 * message, and how many bytes of the per-MSDU FW rx desc
369 * info have already been consumed. (And the endianness of
370 * the host, since for a big-endian host, the rx ind
371 * message contents, including the per-MSDU rx desc bytes,
372 * were byteswapped during upload.)
373 */
374 if (*fw_desc_len > 0) {
375 rx_desc->fw_desc.info0 = **fw_desc;
376 /*
377 * The target is expected to only provide the basic
378 * per-MSDU rx descriptors. Just to be sure, verify
379 * that the target has not attached extension data
380 * (e.g. LRO flow ID).
381 */
382
383 /* or more, if there's extension data */
384 (*fw_desc)++;
385 (*fw_desc_len)--;
386 } else {
387 /*
388 * When an oversized AMSDU happened, FW will lost
389 * some of MSDU status - in this case, the FW
390 * descriptors provided will be less than the
391 * actual MSDUs inside this MPDU. Mark the FW
392 * descriptors so that it will still deliver to
393 * upper stack, if no CRC error for this MPDU.
394 *
395 * FIX THIS - the FW descriptors are actually for
396 * MSDUs in the end of this A-MSDU instead of the
397 * beginning.
398 */
399 rx_desc->fw_desc.info0 = 0;
400 }
401
402 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
403 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
404 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
405 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
406 RX_MSDU_START_INFO0_MSDU_LENGTH);
407 msdu_chained = rx_desc->frag_info.ring2_more_count;
Ben Greearbfa35362014-03-03 14:07:09 -0800408 msdu_chaining = msdu_chained;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300409
410 if (msdu_len_invalid)
411 msdu_len = 0;
412
413 skb_trim(msdu, 0);
414 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
415 msdu_len -= msdu->len;
416
417 /* FIXME: Do chained buffers include htt_rx_desc or not? */
418 while (msdu_chained--) {
419 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
420
421 dma_unmap_single(htt->ar->dev,
422 ATH10K_SKB_CB(next)->paddr,
423 next->len + skb_tailroom(next),
424 DMA_FROM_DEVICE);
425
Ben Greear75fb2f92014-02-05 13:58:34 -0800426 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL,
427 "htt rx chained: ", next->data,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300428 next->len + skb_tailroom(next));
429
430 skb_trim(next, 0);
431 skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
432 msdu_len -= next->len;
433
434 msdu->next = next;
435 msdu = next;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300436 }
437
Kalle Valo5e3dd152013-06-12 20:52:10 +0300438 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
439 RX_MSDU_END_INFO0_LAST_MSDU;
440
441 if (last_msdu) {
442 msdu->next = NULL;
443 break;
444 } else {
445 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
446 msdu->next = next;
447 msdu = next;
448 }
449 }
450 *tail_msdu = msdu;
451
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100452 if (*head_msdu == NULL)
453 msdu_chaining = -1;
454
Kalle Valo5e3dd152013-06-12 20:52:10 +0300455 /*
456 * Don't refill the ring yet.
457 *
458 * First, the elements popped here are still in use - it is not
459 * safe to overwrite them until the matching call to
460 * mpdu_desc_list_next. Second, for efficiency it is preferable to
461 * refill the rx ring with 1 PPDU's worth of rx buffers (something
462 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
463 * (something like 3 buffers). Consequently, we'll rely on the txrx
464 * SW to tell us when it is done pulling all the PPDU's rx buffers
465 * out of the rx ring, and then refill it just once.
466 */
467
468 return msdu_chaining;
469}
470
Michal Kazior6e712d42013-09-24 10:18:36 +0200471static void ath10k_htt_rx_replenish_task(unsigned long ptr)
472{
473 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
474 ath10k_htt_rx_msdu_buff_replenish(htt);
475}
476
Kalle Valo5e3dd152013-06-12 20:52:10 +0300477int ath10k_htt_rx_attach(struct ath10k_htt *htt)
478{
479 dma_addr_t paddr;
480 void *vaddr;
481 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
482
483 htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
484 if (!is_power_of_2(htt->rx_ring.size)) {
485 ath10k_warn("htt rx ring size is not power of 2\n");
486 return -EINVAL;
487 }
488
489 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
490
491 /*
492 * Set the initial value for the level to which the rx ring
493 * should be filled, based on the max throughput and the
494 * worst likely latency for the host to fill the rx ring
495 * with new buffers. In theory, this fill level can be
496 * dynamically adjusted from the initial value set here, to
497 * reflect the actual host latency rather than a
498 * conservative assumption about the host latency.
499 */
500 htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
501
502 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300503 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300504 GFP_KERNEL);
505 if (!htt->rx_ring.netbufs_ring)
506 goto err_netbuf;
507
508 vaddr = dma_alloc_coherent(htt->ar->dev,
509 (htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring)),
510 &paddr, GFP_DMA);
511 if (!vaddr)
512 goto err_dma_ring;
513
514 htt->rx_ring.paddrs_ring = vaddr;
515 htt->rx_ring.base_paddr = paddr;
516
517 vaddr = dma_alloc_coherent(htt->ar->dev,
518 sizeof(*htt->rx_ring.alloc_idx.vaddr),
519 &paddr, GFP_DMA);
520 if (!vaddr)
521 goto err_dma_idx;
522
523 htt->rx_ring.alloc_idx.vaddr = vaddr;
524 htt->rx_ring.alloc_idx.paddr = paddr;
525 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
526 *htt->rx_ring.alloc_idx.vaddr = 0;
527
528 /* Initialize the Rx refill retry timer */
529 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
530
531 spin_lock_init(&htt->rx_ring.lock);
532
533 htt->rx_ring.fill_cnt = 0;
534 if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
535 goto err_fill_ring;
536
Michal Kazior6e712d42013-09-24 10:18:36 +0200537 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
538 (unsigned long)htt);
539
Michal Kazior6c5151a2014-02-27 18:50:04 +0200540 skb_queue_head_init(&htt->tx_compl_q);
541 skb_queue_head_init(&htt->rx_compl_q);
542
543 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
544 (unsigned long)htt);
545
Kalle Valoaad0b652013-09-08 17:56:02 +0300546 ath10k_dbg(ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300547 htt->rx_ring.size, htt->rx_ring.fill_level);
548 return 0;
549
550err_fill_ring:
551 ath10k_htt_rx_ring_free(htt);
552 dma_free_coherent(htt->ar->dev,
553 sizeof(*htt->rx_ring.alloc_idx.vaddr),
554 htt->rx_ring.alloc_idx.vaddr,
555 htt->rx_ring.alloc_idx.paddr);
556err_dma_idx:
557 dma_free_coherent(htt->ar->dev,
558 (htt->rx_ring.size *
559 sizeof(htt->rx_ring.paddrs_ring)),
560 htt->rx_ring.paddrs_ring,
561 htt->rx_ring.base_paddr);
562err_dma_ring:
563 kfree(htt->rx_ring.netbufs_ring);
564err_netbuf:
565 return -ENOMEM;
566}
567
568static int ath10k_htt_rx_crypto_param_len(enum htt_rx_mpdu_encrypt_type type)
569{
570 switch (type) {
571 case HTT_RX_MPDU_ENCRYPT_WEP40:
572 case HTT_RX_MPDU_ENCRYPT_WEP104:
573 return 4;
574 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
575 case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */
576 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
577 case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */
578 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
579 return 8;
580 case HTT_RX_MPDU_ENCRYPT_NONE:
581 return 0;
582 }
583
584 ath10k_warn("unknown encryption type %d\n", type);
585 return 0;
586}
587
588static int ath10k_htt_rx_crypto_tail_len(enum htt_rx_mpdu_encrypt_type type)
589{
590 switch (type) {
591 case HTT_RX_MPDU_ENCRYPT_NONE:
592 case HTT_RX_MPDU_ENCRYPT_WEP40:
593 case HTT_RX_MPDU_ENCRYPT_WEP104:
594 case HTT_RX_MPDU_ENCRYPT_WEP128:
595 case HTT_RX_MPDU_ENCRYPT_WAPI:
596 return 0;
597 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
598 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
599 return 4;
600 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
601 return 8;
602 }
603
604 ath10k_warn("unknown encryption type %d\n", type);
605 return 0;
606}
607
608/* Applies for first msdu in chain, before altering it. */
609static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
610{
611 struct htt_rx_desc *rxd;
612 enum rx_msdu_decap_format fmt;
613
614 rxd = (void *)skb->data - sizeof(*rxd);
615 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
616 RX_MSDU_START_INFO1_DECAP_FORMAT);
617
618 if (fmt == RX_MSDU_DECAP_RAW)
619 return (void *)skb->data;
620 else
621 return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
622}
623
624/* This function only applies for first msdu in an msdu chain */
625static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
626{
627 if (ieee80211_is_data_qos(hdr->frame_control)) {
628 u8 *qc = ieee80211_get_qos_ctl(hdr);
629 if (qc[0] & 0x80)
630 return true;
631 }
632 return false;
633}
634
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300635struct rfc1042_hdr {
636 u8 llc_dsap;
637 u8 llc_ssap;
638 u8 llc_ctrl;
639 u8 snap_oui[3];
640 __be16 snap_type;
641} __packed;
642
643struct amsdu_subframe_hdr {
644 u8 dst[ETH_ALEN];
645 u8 src[ETH_ALEN];
646 __be16 len;
647} __packed;
648
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100649static const u8 rx_legacy_rate_idx[] = {
650 3, /* 0x00 - 11Mbps */
651 2, /* 0x01 - 5.5Mbps */
652 1, /* 0x02 - 2Mbps */
653 0, /* 0x03 - 1Mbps */
654 3, /* 0x04 - 11Mbps */
655 2, /* 0x05 - 5.5Mbps */
656 1, /* 0x06 - 2Mbps */
657 0, /* 0x07 - 1Mbps */
658 10, /* 0x08 - 48Mbps */
659 8, /* 0x09 - 24Mbps */
660 6, /* 0x0A - 12Mbps */
661 4, /* 0x0B - 6Mbps */
662 11, /* 0x0C - 54Mbps */
663 9, /* 0x0D - 36Mbps */
664 7, /* 0x0E - 18Mbps */
665 5, /* 0x0F - 9Mbps */
666};
667
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100668static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100669 enum ieee80211_band band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100670 u8 info0, u32 info1, u32 info2,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100671 struct ieee80211_rx_status *status)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100672{
673 u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100674 u8 preamble = 0;
675
676 /* Check if valid fields */
677 if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
678 return;
679
680 preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
681
682 switch (preamble) {
683 case HTT_RX_LEGACY:
684 cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
685 rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
686 rate_idx = 0;
687
688 if (rate < 0x08 || rate > 0x0F)
689 break;
690
691 switch (band) {
692 case IEEE80211_BAND_2GHZ:
693 if (cck)
694 rate &= ~BIT(3);
695 rate_idx = rx_legacy_rate_idx[rate];
696 break;
697 case IEEE80211_BAND_5GHZ:
698 rate_idx = rx_legacy_rate_idx[rate];
699 /* We are using same rate table registering
700 HW - ath10k_rates[]. In case of 5GHz skip
701 CCK rates, so -4 here */
702 rate_idx -= 4;
703 break;
704 default:
705 break;
706 }
707
708 status->rate_idx = rate_idx;
709 break;
710 case HTT_RX_HT:
711 case HTT_RX_HT_WITH_TXBF:
712 /* HT-SIG - Table 20-11 in info1 and info2 */
713 mcs = info1 & 0x1F;
714 nss = mcs >> 3;
715 bw = (info1 >> 7) & 1;
716 sgi = (info2 >> 7) & 1;
717
718 status->rate_idx = mcs;
719 status->flag |= RX_FLAG_HT;
720 if (sgi)
721 status->flag |= RX_FLAG_SHORT_GI;
722 if (bw)
723 status->flag |= RX_FLAG_40MHZ;
724 break;
725 case HTT_RX_VHT:
726 case HTT_RX_VHT_WITH_TXBF:
727 /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
728 TODO check this */
729 mcs = (info2 >> 4) & 0x0F;
730 nss = ((info1 >> 10) & 0x07) + 1;
731 bw = info1 & 3;
732 sgi = info2 & 1;
733
734 status->rate_idx = mcs;
735 status->vht_nss = nss;
736
737 if (sgi)
738 status->flag |= RX_FLAG_SHORT_GI;
739
740 switch (bw) {
741 /* 20MHZ */
742 case 0:
743 break;
744 /* 40MHZ */
745 case 1:
746 status->flag |= RX_FLAG_40MHZ;
747 break;
748 /* 80MHZ */
749 case 2:
750 status->vht_flag |= RX_VHT_FLAG_80MHZ;
751 }
752
753 status->flag |= RX_FLAG_VHT;
754 break;
755 default:
756 break;
757 }
758}
759
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100760static void ath10k_htt_rx_h_protected(struct ath10k_htt *htt,
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100761 struct ieee80211_rx_status *rx_status,
762 struct sk_buff *skb,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100763 enum htt_rx_mpdu_encrypt_type enctype)
764{
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100765 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100766
767
768 if (enctype == HTT_RX_MPDU_ENCRYPT_NONE) {
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100769 rx_status->flag &= ~(RX_FLAG_DECRYPTED |
770 RX_FLAG_IV_STRIPPED |
771 RX_FLAG_MMIC_STRIPPED);
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100772 return;
773 }
774
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100775 rx_status->flag |= RX_FLAG_DECRYPTED |
776 RX_FLAG_IV_STRIPPED |
777 RX_FLAG_MMIC_STRIPPED;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100778 hdr->frame_control = __cpu_to_le16(__le16_to_cpu(hdr->frame_control) &
779 ~IEEE80211_FCTL_PROTECTED);
780}
781
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100782static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
783 struct ieee80211_rx_status *status)
784{
785 struct ieee80211_channel *ch;
786
787 spin_lock_bh(&ar->data_lock);
788 ch = ar->scan_channel;
789 if (!ch)
790 ch = ar->rx_channel;
791 spin_unlock_bh(&ar->data_lock);
792
793 if (!ch)
794 return false;
795
796 status->band = ch->band;
797 status->freq = ch->center_freq;
798
799 return true;
800}
801
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100802static void ath10k_process_rx(struct ath10k *ar,
803 struct ieee80211_rx_status *rx_status,
804 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100805{
806 struct ieee80211_rx_status *status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100807
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100808 status = IEEE80211_SKB_RXCB(skb);
809 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100810
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100811 ath10k_dbg(ATH10K_DBG_DATA,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100812 "rx skb %p len %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %imic-err %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100813 skb,
814 skb->len,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100815 status->flag == 0 ? "legacy" : "",
816 status->flag & RX_FLAG_HT ? "ht" : "",
817 status->flag & RX_FLAG_VHT ? "vht" : "",
818 status->flag & RX_FLAG_40MHZ ? "40" : "",
819 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
820 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
821 status->rate_idx,
822 status->vht_nss,
823 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100824 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100825 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
826 !!(status->flag & RX_FLAG_MMIC_ERROR));
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100827 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100828 skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100829
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100830 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100831}
832
Michal Kaziord960c362014-02-25 09:29:57 +0200833static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
834{
835 /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
836 return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
837}
838
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300839static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100840 struct ieee80211_rx_status *rx_status,
841 struct sk_buff *skb_in)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300842{
843 struct htt_rx_desc *rxd;
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100844 struct sk_buff *skb = skb_in;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300845 struct sk_buff *first;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300846 enum rx_msdu_decap_format fmt;
847 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300848 struct ieee80211_hdr *hdr;
Michal Kazior784f69d2013-09-26 10:12:23 +0300849 u8 hdr_buf[64], addr[ETH_ALEN], *qos;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300850 unsigned int hdr_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300851
852 rxd = (void *)skb->data - sizeof(*rxd);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300853 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
854 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
855
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300856 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
857 hdr_len = ieee80211_hdrlen(hdr->frame_control);
858 memcpy(hdr_buf, hdr, hdr_len);
859 hdr = (struct ieee80211_hdr *)hdr_buf;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300860
Kalle Valo5e3dd152013-06-12 20:52:10 +0300861 first = skb;
862 while (skb) {
863 void *decap_hdr;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300864 int len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300865
866 rxd = (void *)skb->data - sizeof(*rxd);
867 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300868 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300869 decap_hdr = (void *)rxd->rx_hdr_status;
870
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300871 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
872
873 /* First frame in an A-MSDU chain has more decapped data. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300874 if (skb == first) {
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300875 len = round_up(ieee80211_hdrlen(hdr->frame_control), 4);
876 len += round_up(ath10k_htt_rx_crypto_param_len(enctype),
877 4);
878 decap_hdr += len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300879 }
880
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300881 switch (fmt) {
882 case RX_MSDU_DECAP_RAW:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300883 /* remove trailing FCS */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300884 skb_trim(skb, skb->len - FCS_LEN);
885 break;
886 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior784f69d2013-09-26 10:12:23 +0300887 /* pull decapped header and copy DA */
888 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +0200889 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Michal Kazior784f69d2013-09-26 10:12:23 +0300890 memcpy(addr, ieee80211_get_DA(hdr), ETH_ALEN);
891 skb_pull(skb, hdr_len);
892
893 /* push original 802.11 header */
894 hdr = (struct ieee80211_hdr *)hdr_buf;
895 hdr_len = ieee80211_hdrlen(hdr->frame_control);
896 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
897
898 /* original A-MSDU header has the bit set but we're
899 * not including A-MSDU subframe header */
900 hdr = (struct ieee80211_hdr *)skb->data;
901 qos = ieee80211_get_qos_ctl(hdr);
902 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
903
904 /* original 802.11 header has a different DA */
905 memcpy(ieee80211_get_DA(hdr), addr, ETH_ALEN);
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300906 break;
907 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300908 /* strip ethernet header and insert decapped 802.11
909 * header, amsdu subframe header and rfc1042 header */
910
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300911 len = 0;
912 len += sizeof(struct rfc1042_hdr);
913 len += sizeof(struct amsdu_subframe_hdr);
Michal Kaziordfa95b52013-08-13 07:59:37 +0200914
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300915 skb_pull(skb, sizeof(struct ethhdr));
916 memcpy(skb_push(skb, len), decap_hdr, len);
917 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
918 break;
919 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300920 /* insert decapped 802.11 header making a singly
921 * A-MSDU */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300922 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
923 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300924 }
925
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100926 skb_in = skb;
927 ath10k_htt_rx_h_protected(htt, rx_status, skb_in, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300928 skb = skb->next;
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100929 skb_in->next = NULL;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300930
Kalle Valo652de352013-11-13 15:23:30 +0200931 if (skb)
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100932 rx_status->flag |= RX_FLAG_AMSDU_MORE;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100933 else
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100934 rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
Kalle Valo652de352013-11-13 15:23:30 +0200935
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100936 ath10k_process_rx(htt->ar, rx_status, skb_in);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300937 }
938
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300939 /* FIXME: It might be nice to re-assemble the A-MSDU when there's a
940 * monitor interface active for sniffing purposes. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300941}
942
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100943static void ath10k_htt_rx_msdu(struct ath10k_htt *htt,
944 struct ieee80211_rx_status *rx_status,
945 struct sk_buff *skb)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300946{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300947 struct htt_rx_desc *rxd;
948 struct ieee80211_hdr *hdr;
949 enum rx_msdu_decap_format fmt;
950 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300951 int hdr_len;
952 void *rfc1042;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300953
954 /* This shouldn't happen. If it does than it may be a FW bug. */
955 if (skb->next) {
Ben Greear75fb2f92014-02-05 13:58:34 -0800956 ath10k_warn("htt rx received chained non A-MSDU frame\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300957 ath10k_htt_rx_free_msdu_chain(skb->next);
958 skb->next = NULL;
959 }
960
961 rxd = (void *)skb->data - sizeof(*rxd);
962 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
963 RX_MSDU_START_INFO1_DECAP_FORMAT);
964 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
965 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300966 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
967 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300968
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300969 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
970
Kalle Valo5e3dd152013-06-12 20:52:10 +0300971 switch (fmt) {
972 case RX_MSDU_DECAP_RAW:
973 /* remove trailing FCS */
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300974 skb_trim(skb, skb->len - FCS_LEN);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300975 break;
976 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior784f69d2013-09-26 10:12:23 +0300977 /* Pull decapped header */
978 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +0200979 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Michal Kazior784f69d2013-09-26 10:12:23 +0300980 skb_pull(skb, hdr_len);
981
982 /* Push original header */
983 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
984 hdr_len = ieee80211_hdrlen(hdr->frame_control);
985 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300986 break;
987 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300988 /* strip ethernet header and insert decapped 802.11 header and
989 * rfc1042 header */
990
991 rfc1042 = hdr;
992 rfc1042 += roundup(hdr_len, 4);
993 rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(enctype), 4);
994
995 skb_pull(skb, sizeof(struct ethhdr));
996 memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)),
997 rfc1042, sizeof(struct rfc1042_hdr));
998 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300999 break;
1000 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001001 /* remove A-MSDU subframe header and insert
1002 * decapped 802.11 header. rfc1042 header is already there */
1003
1004 skb_pull(skb, sizeof(struct amsdu_subframe_hdr));
1005 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001006 break;
1007 }
1008
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001009 ath10k_htt_rx_h_protected(htt, rx_status, skb, enctype);
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001010
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001011 ath10k_process_rx(htt->ar, rx_status, skb);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001012}
1013
Michal Kazior605f81a2013-07-31 10:47:56 +02001014static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1015{
1016 struct htt_rx_desc *rxd;
1017 u32 flags, info;
1018 bool is_ip4, is_ip6;
1019 bool is_tcp, is_udp;
1020 bool ip_csum_ok, tcpudp_csum_ok;
1021
1022 rxd = (void *)skb->data - sizeof(*rxd);
1023 flags = __le32_to_cpu(rxd->attention.flags);
1024 info = __le32_to_cpu(rxd->msdu_start.info1);
1025
1026 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1027 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1028 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1029 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1030 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1031 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1032
1033 if (!is_ip4 && !is_ip6)
1034 return CHECKSUM_NONE;
1035 if (!is_tcp && !is_udp)
1036 return CHECKSUM_NONE;
1037 if (!ip_csum_ok)
1038 return CHECKSUM_NONE;
1039 if (!tcpudp_csum_ok)
1040 return CHECKSUM_NONE;
1041
1042 return CHECKSUM_UNNECESSARY;
1043}
1044
Ben Greearbfa35362014-03-03 14:07:09 -08001045static int ath10k_unchain_msdu(struct sk_buff *msdu_head)
1046{
1047 struct sk_buff *next = msdu_head->next;
1048 struct sk_buff *to_free = next;
1049 int space;
1050 int total_len = 0;
1051
1052 /* TODO: Might could optimize this by using
1053 * skb_try_coalesce or similar method to
1054 * decrease copying, or maybe get mac80211 to
1055 * provide a way to just receive a list of
1056 * skb?
1057 */
1058
1059 msdu_head->next = NULL;
1060
1061 /* Allocate total length all at once. */
1062 while (next) {
1063 total_len += next->len;
1064 next = next->next;
1065 }
1066
1067 space = total_len - skb_tailroom(msdu_head);
1068 if ((space > 0) &&
1069 (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) {
1070 /* TODO: bump some rx-oom error stat */
1071 /* put it back together so we can free the
1072 * whole list at once.
1073 */
1074 msdu_head->next = to_free;
1075 return -1;
1076 }
1077
1078 /* Walk list again, copying contents into
1079 * msdu_head
1080 */
1081 next = to_free;
1082 while (next) {
1083 skb_copy_from_linear_data(next, skb_put(msdu_head, next->len),
1084 next->len);
1085 next = next->next;
1086 }
1087
1088 /* If here, we have consolidated skb. Free the
1089 * fragments and pass the main skb on up the
1090 * stack.
1091 */
1092 ath10k_htt_rx_free_msdu_chain(to_free);
1093 return 0;
1094}
1095
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001096static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
1097 struct sk_buff *head,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001098 enum htt_rx_mpdu_status status,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001099 bool channel_set,
1100 u32 attention)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001101{
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001102 if (head->len == 0) {
1103 ath10k_dbg(ATH10K_DBG_HTT,
1104 "htt rx dropping due to zero-len\n");
1105 return false;
1106 }
1107
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001108 if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) {
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001109 ath10k_dbg(ATH10K_DBG_HTT,
1110 "htt rx dropping due to decrypt-err\n");
1111 return false;
1112 }
1113
Janusz Dziedzic36653f02014-03-24 21:23:18 +01001114 if (!channel_set) {
1115 ath10k_warn("no channel configured; ignoring frame!\n");
1116 return false;
1117 }
1118
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001119 /* Skip mgmt frames while we handle this in WMI */
1120 if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL ||
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001121 attention & RX_ATTENTION_FLAGS_MGMT_TYPE) {
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001122 ath10k_dbg(ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
1123 return false;
1124 }
1125
1126 if (status != HTT_RX_IND_MPDU_STATUS_OK &&
1127 status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
1128 status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER &&
Michal Kazior1bbc0972014-04-08 09:45:47 +03001129 !htt->ar->monitor_started) {
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001130 ath10k_dbg(ATH10K_DBG_HTT,
1131 "htt rx ignoring frame w/ status %d\n",
1132 status);
1133 return false;
1134 }
1135
1136 if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
1137 ath10k_dbg(ATH10K_DBG_HTT,
1138 "htt rx CAC running\n");
1139 return false;
1140 }
1141
1142 return true;
1143}
1144
Kalle Valo5e3dd152013-06-12 20:52:10 +03001145static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1146 struct htt_rx_indication *rx)
1147{
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001148 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001149 struct htt_rx_indication_mpdu_range *mpdu_ranges;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001150 struct htt_rx_desc *rxd;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001151 enum htt_rx_mpdu_status status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001152 struct ieee80211_hdr *hdr;
1153 int num_mpdu_ranges;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001154 u32 attention;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001155 int fw_desc_len;
1156 u8 *fw_desc;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001157 bool channel_set;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001158 int i, j;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001159 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001160
Michal Kazior45967082014-02-27 18:50:05 +02001161 lockdep_assert_held(&htt->rx_ring.lock);
1162
Kalle Valo5e3dd152013-06-12 20:52:10 +03001163 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1164 fw_desc = (u8 *)&rx->fw_desc;
1165
1166 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1167 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1168 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1169
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001170 /* Fill this once, while this is per-ppdu */
Janusz Dziedzic22891882014-03-24 21:24:58 +01001171 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) {
1172 memset(rx_status, 0, sizeof(*rx_status));
1173 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
1174 rx->ppdu.combined_rssi;
1175 }
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001176
1177 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) {
1178 /* TSF available only in 32-bit */
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001179 rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff;
1180 rx_status->flag |= RX_FLAG_MACTIME_END;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001181 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001182
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001183 channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status);
Janusz Dziedzic36653f02014-03-24 21:23:18 +01001184
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001185 if (channel_set) {
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001186 ath10k_htt_rx_h_rates(htt->ar, rx_status->band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001187 rx->ppdu.info0,
1188 __le32_to_cpu(rx->ppdu.info1),
1189 __le32_to_cpu(rx->ppdu.info2),
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001190 rx_status);
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001191 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001192
Kalle Valo5e3dd152013-06-12 20:52:10 +03001193 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
1194 rx, sizeof(*rx) +
1195 (sizeof(struct htt_rx_indication_mpdu_range) *
1196 num_mpdu_ranges));
1197
1198 for (i = 0; i < num_mpdu_ranges; i++) {
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001199 status = mpdu_ranges[i].mpdu_range_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001200
1201 for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
1202 struct sk_buff *msdu_head, *msdu_tail;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001203
1204 msdu_head = NULL;
1205 msdu_tail = NULL;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001206 ret = ath10k_htt_rx_amsdu_pop(htt,
1207 &fw_desc,
1208 &fw_desc_len,
1209 &msdu_head,
1210 &msdu_tail);
1211
1212 if (ret < 0) {
1213 ath10k_warn("failed to pop amsdu from htt rx ring %d\n",
1214 ret);
1215 ath10k_htt_rx_free_msdu_chain(msdu_head);
1216 continue;
1217 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001218
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001219 rxd = container_of((void *)msdu_head->data,
1220 struct htt_rx_desc,
1221 msdu_payload);
1222 attention = __le32_to_cpu(rxd->attention.flags);
1223
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001224 if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001225 status,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001226 channel_set,
1227 attention)) {
Marek Puzyniake8a50f82013-11-20 09:59:47 +02001228 ath10k_htt_rx_free_msdu_chain(msdu_head);
1229 continue;
1230 }
1231
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001232 if (ret > 0 &&
1233 ath10k_unchain_msdu(msdu_head) < 0) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001234 ath10k_htt_rx_free_msdu_chain(msdu_head);
1235 continue;
1236 }
1237
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001238 if (attention & RX_ATTENTION_FLAGS_FCS_ERR)
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001239 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001240 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001241 rx_status->flag &= ~RX_FLAG_FAILED_FCS_CRC;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001242
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001243 if (attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR)
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001244 rx_status->flag |= RX_FLAG_MMIC_ERROR;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001245 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001246 rx_status->flag &= ~RX_FLAG_MMIC_ERROR;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001247
Kalle Valo5e3dd152013-06-12 20:52:10 +03001248 hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
1249
1250 if (ath10k_htt_rx_hdr_is_amsdu(hdr))
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001251 ath10k_htt_rx_amsdu(htt, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001252 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001253 ath10k_htt_rx_msdu(htt, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001254 }
1255 }
1256
Michal Kazior6e712d42013-09-24 10:18:36 +02001257 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001258}
1259
1260static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
1261 struct htt_rx_fragment_indication *frag)
1262{
1263 struct sk_buff *msdu_head, *msdu_tail;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001264 enum htt_rx_mpdu_encrypt_type enctype;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001265 struct htt_rx_desc *rxd;
1266 enum rx_msdu_decap_format fmt;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001267 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001268 struct ieee80211_hdr *hdr;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001269 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001270 bool tkip_mic_err;
1271 bool decrypt_err;
1272 u8 *fw_desc;
1273 int fw_desc_len, hdrlen, paramlen;
1274 int trim;
1275
1276 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1277 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1278
1279 msdu_head = NULL;
1280 msdu_tail = NULL;
Michal Kazior45967082014-02-27 18:50:05 +02001281
1282 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001283 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
1284 &msdu_head, &msdu_tail);
Michal Kazior45967082014-02-27 18:50:05 +02001285 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001286
1287 ath10k_dbg(ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
1288
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001289 if (ret) {
1290 ath10k_warn("failed to pop amsdu from httr rx ring for fragmented rx %d\n",
1291 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001292 ath10k_htt_rx_free_msdu_chain(msdu_head);
1293 return;
1294 }
1295
1296 /* FIXME: implement signal strength */
1297
1298 hdr = (struct ieee80211_hdr *)msdu_head->data;
1299 rxd = (void *)msdu_head->data - sizeof(*rxd);
1300 tkip_mic_err = !!(__le32_to_cpu(rxd->attention.flags) &
1301 RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1302 decrypt_err = !!(__le32_to_cpu(rxd->attention.flags) &
1303 RX_ATTENTION_FLAGS_DECRYPT_ERR);
1304 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
1305 RX_MSDU_START_INFO1_DECAP_FORMAT);
1306
1307 if (fmt != RX_MSDU_DECAP_RAW) {
1308 ath10k_warn("we dont support non-raw fragmented rx yet\n");
1309 dev_kfree_skb_any(msdu_head);
1310 goto end;
1311 }
1312
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001313 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1314 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001315 ath10k_htt_rx_h_protected(htt, rx_status, msdu_head, enctype);
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001316 msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001317
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001318 if (tkip_mic_err)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001319 ath10k_warn("tkip mic error\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001320
1321 if (decrypt_err) {
1322 ath10k_warn("decryption err in fragmented rx\n");
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001323 dev_kfree_skb_any(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001324 goto end;
1325 }
1326
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001327 if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001328 hdrlen = ieee80211_hdrlen(hdr->frame_control);
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001329 paramlen = ath10k_htt_rx_crypto_param_len(enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001330
1331 /* It is more efficient to move the header than the payload */
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001332 memmove((void *)msdu_head->data + paramlen,
1333 (void *)msdu_head->data,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001334 hdrlen);
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001335 skb_pull(msdu_head, paramlen);
1336 hdr = (struct ieee80211_hdr *)msdu_head->data;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001337 }
1338
1339 /* remove trailing FCS */
1340 trim = 4;
1341
1342 /* remove crypto trailer */
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001343 trim += ath10k_htt_rx_crypto_tail_len(enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001344
1345 /* last fragment of TKIP frags has MIC */
1346 if (!ieee80211_has_morefrags(hdr->frame_control) &&
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001347 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001348 trim += 8;
1349
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001350 if (trim > msdu_head->len) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001351 ath10k_warn("htt rx fragment: trailer longer than the frame itself? drop\n");
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001352 dev_kfree_skb_any(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001353 goto end;
1354 }
1355
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001356 skb_trim(msdu_head, msdu_head->len - trim);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001357
Ben Greear75fb2f92014-02-05 13:58:34 -08001358 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001359 msdu_head->data, msdu_head->len);
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001360 ath10k_process_rx(htt->ar, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001361
1362end:
1363 if (fw_desc_len > 0) {
1364 ath10k_dbg(ATH10K_DBG_HTT,
1365 "expecting more fragmented rx in one indication %d\n",
1366 fw_desc_len);
1367 }
1368}
1369
Michal Kazior6c5151a2014-02-27 18:50:04 +02001370static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1371 struct sk_buff *skb)
1372{
1373 struct ath10k_htt *htt = &ar->htt;
1374 struct htt_resp *resp = (struct htt_resp *)skb->data;
1375 struct htt_tx_done tx_done = {};
1376 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1377 __le16 msdu_id;
1378 int i;
1379
Michal Kazior45967082014-02-27 18:50:05 +02001380 lockdep_assert_held(&htt->tx_lock);
1381
Michal Kazior6c5151a2014-02-27 18:50:04 +02001382 switch (status) {
1383 case HTT_DATA_TX_STATUS_NO_ACK:
1384 tx_done.no_ack = true;
1385 break;
1386 case HTT_DATA_TX_STATUS_OK:
1387 break;
1388 case HTT_DATA_TX_STATUS_DISCARD:
1389 case HTT_DATA_TX_STATUS_POSTPONE:
1390 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1391 tx_done.discard = true;
1392 break;
1393 default:
1394 ath10k_warn("unhandled tx completion status %d\n", status);
1395 tx_done.discard = true;
1396 break;
1397 }
1398
1399 ath10k_dbg(ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
1400 resp->data_tx_completion.num_msdus);
1401
1402 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1403 msdu_id = resp->data_tx_completion.msdus[i];
1404 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1405 ath10k_txrx_tx_unref(htt, &tx_done);
1406 }
1407}
1408
Kalle Valo5e3dd152013-06-12 20:52:10 +03001409void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1410{
Michal Kazioredb82362013-07-05 16:15:14 +03001411 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001412 struct htt_resp *resp = (struct htt_resp *)skb->data;
1413
1414 /* confirm alignment */
1415 if (!IS_ALIGNED((unsigned long)skb->data, 4))
1416 ath10k_warn("unaligned htt message, expect trouble\n");
1417
Ben Greear75fb2f92014-02-05 13:58:34 -08001418 ath10k_dbg(ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001419 resp->hdr.msg_type);
1420 switch (resp->hdr.msg_type) {
1421 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1422 htt->target_version_major = resp->ver_resp.major;
1423 htt->target_version_minor = resp->ver_resp.minor;
1424 complete(&htt->target_version_received);
1425 break;
1426 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001427 case HTT_T2H_MSG_TYPE_RX_IND:
Michal Kazior45967082014-02-27 18:50:05 +02001428 spin_lock_bh(&htt->rx_ring.lock);
1429 __skb_queue_tail(&htt->rx_compl_q, skb);
1430 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001431 tasklet_schedule(&htt->txrx_compl_task);
1432 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001433 case HTT_T2H_MSG_TYPE_PEER_MAP: {
1434 struct htt_peer_map_event ev = {
1435 .vdev_id = resp->peer_map.vdev_id,
1436 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1437 };
1438 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1439 ath10k_peer_map_event(htt, &ev);
1440 break;
1441 }
1442 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1443 struct htt_peer_unmap_event ev = {
1444 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1445 };
1446 ath10k_peer_unmap_event(htt, &ev);
1447 break;
1448 }
1449 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
1450 struct htt_tx_done tx_done = {};
1451 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
1452
1453 tx_done.msdu_id =
1454 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
1455
1456 switch (status) {
1457 case HTT_MGMT_TX_STATUS_OK:
1458 break;
1459 case HTT_MGMT_TX_STATUS_RETRY:
1460 tx_done.no_ack = true;
1461 break;
1462 case HTT_MGMT_TX_STATUS_DROP:
1463 tx_done.discard = true;
1464 break;
1465 }
1466
Michal Kazior6c5151a2014-02-27 18:50:04 +02001467 spin_lock_bh(&htt->tx_lock);
Michal Kazior0a89f8a2013-09-18 14:43:20 +02001468 ath10k_txrx_tx_unref(htt, &tx_done);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001469 spin_unlock_bh(&htt->tx_lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001470 break;
1471 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001472 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
1473 spin_lock_bh(&htt->tx_lock);
1474 __skb_queue_tail(&htt->tx_compl_q, skb);
1475 spin_unlock_bh(&htt->tx_lock);
1476 tasklet_schedule(&htt->txrx_compl_task);
1477 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001478 case HTT_T2H_MSG_TYPE_SEC_IND: {
1479 struct ath10k *ar = htt->ar;
1480 struct htt_security_indication *ev = &resp->security_indication;
1481
1482 ath10k_dbg(ATH10K_DBG_HTT,
1483 "sec ind peer_id %d unicast %d type %d\n",
1484 __le16_to_cpu(ev->peer_id),
1485 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
1486 MS(ev->flags, HTT_SECURITY_TYPE));
1487 complete(&ar->install_key_done);
1488 break;
1489 }
1490 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
1491 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
1492 skb->data, skb->len);
1493 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
1494 break;
1495 }
1496 case HTT_T2H_MSG_TYPE_TEST:
1497 /* FIX THIS */
1498 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001499 case HTT_T2H_MSG_TYPE_STATS_CONF:
Kalle Valoa9bf0502013-09-03 11:43:55 +03001500 trace_ath10k_htt_stats(skb->data, skb->len);
1501 break;
1502 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Kalle Valo5e3dd152013-06-12 20:52:10 +03001503 case HTT_T2H_MSG_TYPE_RX_ADDBA:
1504 case HTT_T2H_MSG_TYPE_RX_DELBA:
1505 case HTT_T2H_MSG_TYPE_RX_FLUSH:
1506 default:
1507 ath10k_dbg(ATH10K_DBG_HTT, "htt event (%d) not handled\n",
1508 resp->hdr.msg_type);
1509 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
1510 skb->data, skb->len);
1511 break;
1512 };
1513
1514 /* Free the indication buffer */
1515 dev_kfree_skb_any(skb);
1516}
Michal Kazior6c5151a2014-02-27 18:50:04 +02001517
1518static void ath10k_htt_txrx_compl_task(unsigned long ptr)
1519{
1520 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
1521 struct htt_resp *resp;
1522 struct sk_buff *skb;
1523
Michal Kazior45967082014-02-27 18:50:05 +02001524 spin_lock_bh(&htt->tx_lock);
1525 while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001526 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
1527 dev_kfree_skb_any(skb);
1528 }
Michal Kazior45967082014-02-27 18:50:05 +02001529 spin_unlock_bh(&htt->tx_lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001530
Michal Kazior45967082014-02-27 18:50:05 +02001531 spin_lock_bh(&htt->rx_ring.lock);
1532 while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001533 resp = (struct htt_resp *)skb->data;
1534 ath10k_htt_rx_handler(htt, &resp->rx_ind);
1535 dev_kfree_skb_any(skb);
1536 }
Michal Kazior45967082014-02-27 18:50:05 +02001537 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001538}