blob: c5fd011567fb2d554a215599a5c899dedd9d9c47 [file] [log] [blame]
Wu, Fengguang91504872008-11-05 11:16:56 +08001/*
2 *
3 * patch_intelhdmi.c - Patch for Intel HDMI codecs
4 *
5 * Copyright(c) 2008 Intel Corporation. All rights reserved.
6 *
7 * Authors:
8 * Jiang Zhe <zhe.jiang@intel.com>
9 * Wu Fengguang <wfg@linux.intel.com>
10 *
11 * Maintained by:
12 * Wu Fengguang <wfg@linux.intel.com>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the Free
16 * Software Foundation; either version 2 of the License, or (at your option)
17 * any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
21 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 * for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software Foundation,
26 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 */
28
29#include <linux/init.h>
30#include <linux/delay.h>
31#include <linux/slab.h>
32#include <sound/core.h>
Wu, Fengguang91504872008-11-05 11:16:56 +080033#include "hda_codec.h"
34#include "hda_local.h"
Wu, Fengguang91504872008-11-05 11:16:56 +080035
Wu Fengguang54a25f82009-10-30 11:44:26 +010036/*
37 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
38 * could support two independent pipes, each of them can be connected to one or
39 * more ports (DVI, HDMI or DisplayPort).
40 *
41 * The HDA correspondence of pipes/ports are converter/pin nodes.
42 */
43#define INTEL_HDMI_CVTS 2
44#define INTEL_HDMI_PINS 3
Wu, Fengguang91504872008-11-05 11:16:56 +080045
Wu Fengguang54a25f82009-10-30 11:44:26 +010046static char *intel_hdmi_pcm_names[INTEL_HDMI_CVTS] = {
47 "INTEL HDMI 0",
48 "INTEL HDMI 1",
49};
Wu, Fengguang91504872008-11-05 11:16:56 +080050
Wu, Fengguang91504872008-11-05 11:16:56 +080051struct intel_hdmi_spec {
Wu Fengguang54a25f82009-10-30 11:44:26 +010052 int num_cvts;
53 int num_pins;
54 hda_nid_t cvt[INTEL_HDMI_CVTS+1]; /* audio sources */
55 hda_nid_t pin[INTEL_HDMI_PINS+1]; /* audio sinks */
56
57 /*
58 * source connection for each pin
59 */
60 hda_nid_t pin_cvt[INTEL_HDMI_PINS+1];
61
62 /*
63 * HDMI sink attached to each pin
64 */
Wu Fengguang54a25f82009-10-30 11:44:26 +010065 struct hdmi_eld sink_eld[INTEL_HDMI_PINS];
66
67 /*
68 * export one pcm per pipe
69 */
70 struct hda_pcm pcm_rec[INTEL_HDMI_CVTS];
Wu, Fengguang91504872008-11-05 11:16:56 +080071};
72
Wu, Fengguang91504872008-11-05 11:16:56 +080073struct hdmi_audio_infoframe {
74 u8 type; /* 0x84 */
75 u8 ver; /* 0x01 */
76 u8 len; /* 0x0a */
77
78 u8 checksum; /* PB0 */
79 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
80 u8 SS01_SF24;
81 u8 CXT04;
82 u8 CA;
83 u8 LFEPBL01_LSV36_DM_INH7;
Wu Fengguang4e19c582008-11-19 15:13:59 +080084 u8 reserved[5]; /* PB6 - PB10 */
Wu, Fengguang91504872008-11-05 11:16:56 +080085};
86
87/*
Wu Fengguang698544d2008-11-19 08:56:17 +080088 * CEA speaker placement:
89 *
90 * FLH FCH FRH
91 * FLW FL FLC FC FRC FR FRW
92 *
93 * LFE
94 * TC
95 *
96 * RL RLC RC RRC RR
97 *
98 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
99 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
100 */
101enum cea_speaker_placement {
102 FL = (1 << 0), /* Front Left */
103 FC = (1 << 1), /* Front Center */
104 FR = (1 << 2), /* Front Right */
105 FLC = (1 << 3), /* Front Left Center */
106 FRC = (1 << 4), /* Front Right Center */
107 RL = (1 << 5), /* Rear Left */
108 RC = (1 << 6), /* Rear Center */
109 RR = (1 << 7), /* Rear Right */
110 RLC = (1 << 8), /* Rear Left Center */
111 RRC = (1 << 9), /* Rear Right Center */
112 LFE = (1 << 10), /* Low Frequency Effect */
113 FLW = (1 << 11), /* Front Left Wide */
114 FRW = (1 << 12), /* Front Right Wide */
115 FLH = (1 << 13), /* Front Left High */
116 FCH = (1 << 14), /* Front Center High */
117 FRH = (1 << 15), /* Front Right High */
118 TC = (1 << 16), /* Top Center */
119};
120
121/*
122 * ELD SA bits in the CEA Speaker Allocation data block
123 */
124static int eld_speaker_allocation_bits[] = {
125 [0] = FL | FR,
126 [1] = LFE,
127 [2] = FC,
128 [3] = RL | RR,
129 [4] = RC,
130 [5] = FLC | FRC,
131 [6] = RLC | RRC,
132 /* the following are not defined in ELD yet */
133 [7] = FLW | FRW,
134 [8] = FLH | FRH,
135 [9] = TC,
136 [10] = FCH,
137};
138
139struct cea_channel_speaker_allocation {
140 int ca_index;
141 int speakers[8];
142
143 /* derived values, just for convenience */
144 int channels;
145 int spk_mask;
146};
147
148/*
149 * This is an ordered list!
150 *
151 * The preceding ones have better chances to be selected by
152 * hdmi_setup_channel_allocation().
153 */
154static struct cea_channel_speaker_allocation channel_allocations[] = {
155/* channel: 8 7 6 5 4 3 2 1 */
156{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
157 /* 2.1 */
158{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
Wu Fengguang4e19c582008-11-19 15:13:59 +0800159 /* Dolby Surround */
Wu Fengguang698544d2008-11-19 08:56:17 +0800160{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
161{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
162{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
163{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
164{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
165{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
166{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
167{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
168{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
169 /* 5.1 */
170{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
171{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
172{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
173{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
174 /* 6.1 */
175{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
176{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
177{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
178{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
179 /* 7.1 */
180{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
181{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
182{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
183{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
184{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
185{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
186{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
187{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
188{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
189{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
190{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
191{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
192{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
193{ .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
194{ .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
195{ .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
196{ .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
197{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
198{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
199{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
200{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
201{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
202{ .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
203{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
204{ .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
205{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
206{ .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
207{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
208{ .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
209{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
210{ .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
211};
212
Wu Fengguang54a25f82009-10-30 11:44:26 +0100213
Wu Fengguangf4243672009-10-30 11:45:35 +0100214/*
215 * HDA/HDMI auto parsing
216 */
217
Wu Fengguang54a25f82009-10-30 11:44:26 +0100218static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
219{
220 int i;
221
222 for (i = 0; nids[i]; i++)
223 if (nids[i] == nid)
224 return i;
225
226 snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
227 return -EINVAL;
228}
229
Wu Fengguangf4243672009-10-30 11:45:35 +0100230static int intel_hdmi_read_pin_conn(struct hda_codec *codec, hda_nid_t pin_nid)
231{
232 struct intel_hdmi_spec *spec = codec->spec;
233 hda_nid_t conn_list[HDA_MAX_CONNECTIONS];
234 int conn_len, curr;
235 int index;
236
237 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
238 snd_printk(KERN_WARNING
239 "HDMI: pin %d wcaps %#x "
240 "does not support connection list\n",
241 pin_nid, get_wcaps(codec, pin_nid));
242 return -EINVAL;
243 }
244
245 conn_len = snd_hda_get_connections(codec, pin_nid, conn_list,
246 HDA_MAX_CONNECTIONS);
247 if (conn_len > 1)
248 curr = snd_hda_codec_read(codec, pin_nid, 0,
249 AC_VERB_GET_CONNECT_SEL, 0);
250 else
251 curr = 0;
252
253 index = hda_node_index(spec->pin, pin_nid);
254 if (index < 0)
255 return -EINVAL;
256
257 spec->pin_cvt[index] = conn_list[curr];
258
259 return 0;
260}
261
Wu Fengguang3f54aa52009-11-18 12:38:03 +0800262static void hdmi_get_show_eld(struct hda_codec *codec, hda_nid_t pin_nid,
263 struct hdmi_eld *eld)
264{
265 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
266 snd_hdmi_show_eld(eld);
267}
268
269static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
270 struct hdmi_eld *eld)
271{
272 int present = snd_hda_pin_sense(codec, pin_nid);
273
274 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
275 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
276
277 if (present & AC_PINSENSE_ELDV)
278 hdmi_get_show_eld(codec, pin_nid, eld);
279}
280
Wu Fengguangf4243672009-10-30 11:45:35 +0100281static int intel_hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
282{
283 struct intel_hdmi_spec *spec = codec->spec;
284
285 if (spec->num_pins >= INTEL_HDMI_PINS) {
286 snd_printk(KERN_WARNING
287 "HDMI: no space for pin %d \n", pin_nid);
288 return -EINVAL;
289 }
290
Wu Fengguang3f54aa52009-11-18 12:38:03 +0800291 hdmi_present_sense(codec, pin_nid, &spec->sink_eld[spec->num_pins]);
292
Wu Fengguangf4243672009-10-30 11:45:35 +0100293 spec->pin[spec->num_pins] = pin_nid;
294 spec->num_pins++;
295
296 /*
297 * It is assumed that converter nodes come first in the node list and
298 * hence have been registered and usable now.
299 */
300 return intel_hdmi_read_pin_conn(codec, pin_nid);
301}
302
303static int intel_hdmi_add_cvt(struct hda_codec *codec, hda_nid_t nid)
304{
305 struct intel_hdmi_spec *spec = codec->spec;
306
307 if (spec->num_cvts >= INTEL_HDMI_CVTS) {
308 snd_printk(KERN_WARNING
309 "HDMI: no space for converter %d \n", nid);
310 return -EINVAL;
311 }
312
313 spec->cvt[spec->num_cvts] = nid;
314 spec->num_cvts++;
315
316 return 0;
317}
318
319static int intel_hdmi_parse_codec(struct hda_codec *codec)
320{
321 hda_nid_t nid;
322 int i, nodes;
323
324 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
325 if (!nid || nodes < 0) {
326 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
327 return -EINVAL;
328 }
329
330 for (i = 0; i < nodes; i++, nid++) {
331 unsigned int caps;
332 unsigned int type;
333
334 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
335 type = get_wcaps_type(caps);
336
337 if (!(caps & AC_WCAP_DIGITAL))
338 continue;
339
340 switch (type) {
341 case AC_WID_AUD_OUT:
342 if (intel_hdmi_add_cvt(codec, nid) < 0)
343 return -EINVAL;
344 break;
345 case AC_WID_PIN:
346 caps = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
347 if (!(caps & AC_PINCAP_HDMI))
348 continue;
349 if (intel_hdmi_add_pin(codec, nid) < 0)
350 return -EINVAL;
351 break;
352 }
353 }
354
355 return 0;
356}
357
Wu Fengguang698544d2008-11-19 08:56:17 +0800358/*
Wu, Fengguang91504872008-11-05 11:16:56 +0800359 * HDMI routines
360 */
361
Takashi Iwaibeb0b9cf2008-11-05 07:58:25 +0100362#ifdef BE_PARANOID
Wu Fengguang6797cf22009-10-30 11:40:40 +0100363static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
Wu, Fengguang91504872008-11-05 11:16:56 +0800364 int *packet_index, int *byte_index)
365{
366 int val;
367
Wu Fengguang6797cf22009-10-30 11:40:40 +0100368 val = snd_hda_codec_read(codec, pin_nid, 0,
369 AC_VERB_GET_HDMI_DIP_INDEX, 0);
Wu, Fengguang91504872008-11-05 11:16:56 +0800370
371 *packet_index = val >> 5;
372 *byte_index = val & 0x1f;
373}
Takashi Iwaibeb0b9cf2008-11-05 07:58:25 +0100374#endif
Wu, Fengguang91504872008-11-05 11:16:56 +0800375
Wu Fengguang6797cf22009-10-30 11:40:40 +0100376static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
Wu, Fengguang91504872008-11-05 11:16:56 +0800377 int packet_index, int byte_index)
378{
379 int val;
380
381 val = (packet_index << 5) | (byte_index & 0x1f);
382
Wu Fengguang6797cf22009-10-30 11:40:40 +0100383 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
Wu, Fengguang91504872008-11-05 11:16:56 +0800384}
385
Wu Fengguang6797cf22009-10-30 11:40:40 +0100386static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
Wu, Fengguang91504872008-11-05 11:16:56 +0800387 unsigned char val)
388{
Wu Fengguang6797cf22009-10-30 11:40:40 +0100389 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
Wu, Fengguang91504872008-11-05 11:16:56 +0800390}
391
Wu Fengguang6797cf22009-10-30 11:40:40 +0100392static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800393{
Wu Fengguang796359d2008-11-17 16:57:33 +0800394 /* Unmute */
Wu Fengguang559059b2009-08-02 16:48:55 +0800395 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
396 snd_hda_codec_write(codec, pin_nid, 0,
Wu Fengguang796359d2008-11-17 16:57:33 +0800397 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
398 /* Enable pin out */
Wu Fengguang559059b2009-08-02 16:48:55 +0800399 snd_hda_codec_write(codec, pin_nid, 0,
400 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
Wu, Fengguang91504872008-11-05 11:16:56 +0800401}
402
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800403/*
404 * Enable Audio InfoFrame Transmission
405 */
Wu Fengguang6797cf22009-10-30 11:40:40 +0100406static void hdmi_start_infoframe_trans(struct hda_codec *codec,
407 hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800408{
Wu Fengguang559059b2009-08-02 16:48:55 +0800409 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
410 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800411 AC_DIPXMIT_BEST);
412}
Wu, Fengguang91504872008-11-05 11:16:56 +0800413
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800414/*
415 * Disable Audio InfoFrame Transmission
416 */
Wu Fengguang6797cf22009-10-30 11:40:40 +0100417static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
418 hda_nid_t pin_nid)
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800419{
Wu Fengguang559059b2009-08-02 16:48:55 +0800420 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
421 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800422 AC_DIPXMIT_DISABLE);
Wu, Fengguang91504872008-11-05 11:16:56 +0800423}
424
Takashi Iwai6a5f96c2009-10-30 12:31:39 +0100425#ifdef CONFIG_SND_DEBUG_VERBOSE
Wu Fengguang6797cf22009-10-30 11:40:40 +0100426static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800427{
Wu Fengguang6797cf22009-10-30 11:40:40 +0100428 return 1 + snd_hda_codec_read(codec, nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800429 AC_VERB_GET_CVT_CHAN_COUNT, 0);
430}
Takashi Iwai6a5f96c2009-10-30 12:31:39 +0100431#endif
Wu, Fengguang91504872008-11-05 11:16:56 +0800432
Wu Fengguang6797cf22009-10-30 11:40:40 +0100433static void hdmi_set_channel_count(struct hda_codec *codec,
434 hda_nid_t nid, int chs)
Wu, Fengguang91504872008-11-05 11:16:56 +0800435{
Wu Fengguang6797cf22009-10-30 11:40:40 +0100436 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
Wu, Fengguang91504872008-11-05 11:16:56 +0800437
Wu Fengguang6797cf22009-10-30 11:40:40 +0100438#ifdef CONFIG_SND_DEBUG_VERBOSE
439 if (chs != hdmi_get_channel_count(codec, nid))
Wu Fengguang03284c82008-11-22 09:40:53 +0800440 snd_printd(KERN_INFO "HDMI channel count: expect %d, get %d\n",
Wu Fengguang6797cf22009-10-30 11:40:40 +0100441 chs, hdmi_get_channel_count(codec, nid));
442#endif
Wu, Fengguang91504872008-11-05 11:16:56 +0800443}
444
Wu Fengguang6797cf22009-10-30 11:40:40 +0100445static void hdmi_debug_channel_mapping(struct hda_codec *codec, hda_nid_t nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800446{
447#ifdef CONFIG_SND_DEBUG_VERBOSE
448 int i;
449 int slot;
450
451 for (i = 0; i < 8; i++) {
Wu Fengguang6797cf22009-10-30 11:40:40 +0100452 slot = snd_hda_codec_read(codec, nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800453 AC_VERB_GET_HDMI_CHAN_SLOT, i);
Wu Fengguang03284c82008-11-22 09:40:53 +0800454 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
Wu Fengguang1e7c10f2009-11-18 12:38:00 +0800455 slot >> 4, slot & 0xf);
Wu, Fengguang91504872008-11-05 11:16:56 +0800456 }
457#endif
458}
459
Wu, Fengguang91504872008-11-05 11:16:56 +0800460
461/*
Wu Fengguang4e19c582008-11-19 15:13:59 +0800462 * Audio InfoFrame routines
Wu, Fengguang91504872008-11-05 11:16:56 +0800463 */
464
Wu Fengguang6797cf22009-10-30 11:40:40 +0100465static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800466{
467#ifdef CONFIG_SND_DEBUG_VERBOSE
468 int i;
469 int size;
470
Wu Fengguang559059b2009-08-02 16:48:55 +0800471 size = snd_hdmi_get_eld_size(codec, pin_nid);
Wu Fengguang03284c82008-11-22 09:40:53 +0800472 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
Wu, Fengguang91504872008-11-05 11:16:56 +0800473
474 for (i = 0; i < 8; i++) {
Wu Fengguang559059b2009-08-02 16:48:55 +0800475 size = snd_hda_codec_read(codec, pin_nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800476 AC_VERB_GET_HDMI_DIP_SIZE, i);
Wu Fengguang03284c82008-11-22 09:40:53 +0800477 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
Wu, Fengguang91504872008-11-05 11:16:56 +0800478 }
479#endif
480}
481
Wu Fengguang6797cf22009-10-30 11:40:40 +0100482static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800483{
484#ifdef BE_PARANOID
485 int i, j;
486 int size;
487 int pi, bi;
488 for (i = 0; i < 8; i++) {
Wu Fengguang559059b2009-08-02 16:48:55 +0800489 size = snd_hda_codec_read(codec, pin_nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800490 AC_VERB_GET_HDMI_DIP_SIZE, i);
491 if (size == 0)
492 continue;
493
Wu Fengguang559059b2009-08-02 16:48:55 +0800494 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
Wu, Fengguang91504872008-11-05 11:16:56 +0800495 for (j = 1; j < 1000; j++) {
Wu Fengguang559059b2009-08-02 16:48:55 +0800496 hdmi_write_dip_byte(codec, pin_nid, 0x0);
497 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
Wu, Fengguang91504872008-11-05 11:16:56 +0800498 if (pi != i)
499 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
500 bi, pi, i);
501 if (bi == 0) /* byte index wrapped around */
502 break;
503 }
504 snd_printd(KERN_INFO
Wu Fengguang03284c82008-11-22 09:40:53 +0800505 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
506 i, size, j);
Wu, Fengguang91504872008-11-05 11:16:56 +0800507 }
508#endif
509}
510
Wu Fengguang5457a982008-11-19 08:56:15 +0800511static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
Wu Fengguang6797cf22009-10-30 11:40:40 +0100512 hda_nid_t pin_nid,
513 struct hdmi_audio_infoframe *ai)
Wu, Fengguang91504872008-11-05 11:16:56 +0800514{
Wu Fengguang5457a982008-11-19 08:56:15 +0800515 u8 *params = (u8 *)ai;
Wu Fengguang9a957a22009-02-11 15:22:30 +0800516 u8 sum = 0;
Wu, Fengguang91504872008-11-05 11:16:56 +0800517 int i;
518
Wu Fengguang6797cf22009-10-30 11:40:40 +0100519 hdmi_debug_dip_size(codec, pin_nid);
520 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
Wu, Fengguang91504872008-11-05 11:16:56 +0800521
Wu Fengguang6f539a92009-11-18 12:37:59 +0800522 for (i = 0; i < sizeof(*ai); i++)
Wu Fengguang9a957a22009-02-11 15:22:30 +0800523 sum += params[i];
524 ai->checksum = - sum;
525
Wu Fengguang559059b2009-08-02 16:48:55 +0800526 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
Wu Fengguang6f539a92009-11-18 12:37:59 +0800527 for (i = 0; i < sizeof(*ai); i++)
Wu Fengguang559059b2009-08-02 16:48:55 +0800528 hdmi_write_dip_byte(codec, pin_nid, params[i]);
Wu, Fengguang91504872008-11-05 11:16:56 +0800529}
530
Wu Fengguang698544d2008-11-19 08:56:17 +0800531/*
532 * Compute derived values in channel_allocations[].
533 */
534static void init_channel_allocations(void)
535{
536 int i, j;
537 struct cea_channel_speaker_allocation *p;
538
539 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
540 p = channel_allocations + i;
541 p->channels = 0;
542 p->spk_mask = 0;
543 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
544 if (p->speakers[j]) {
545 p->channels++;
546 p->spk_mask |= p->speakers[j];
547 }
548 }
549}
550
551/*
552 * The transformation takes two steps:
553 *
554 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
555 * spk_mask => (channel_allocations[]) => ai->CA
556 *
557 * TODO: it could select the wrong CA from multiple candidates.
558*/
Wu Fengguang6797cf22009-10-30 11:40:40 +0100559static int hdmi_setup_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
Wu Fengguang698544d2008-11-19 08:56:17 +0800560 struct hdmi_audio_infoframe *ai)
561{
562 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100563 struct hdmi_eld *eld;
Wu Fengguang698544d2008-11-19 08:56:17 +0800564 int i;
565 int spk_mask = 0;
566 int channels = 1 + (ai->CC02_CT47 & 0x7);
567 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
568
569 /*
570 * CA defaults to 0 for basic stereo audio
571 */
Wu Fengguang698544d2008-11-19 08:56:17 +0800572 if (channels <= 2)
573 return 0;
574
Wu Fengguang54a25f82009-10-30 11:44:26 +0100575 i = hda_node_index(spec->pin_cvt, nid);
576 if (i < 0)
577 return 0;
578 eld = &spec->sink_eld[i];
579
Wu Fengguang698544d2008-11-19 08:56:17 +0800580 /*
Wu Fengguanga1667e42009-02-11 15:22:28 +0800581 * HDMI sink's ELD info cannot always be retrieved for now, e.g.
582 * in console or for audio devices. Assume the highest speakers
583 * configuration, to _not_ prohibit multi-channel audio playback.
584 */
585 if (!eld->spk_alloc)
586 eld->spk_alloc = 0xffff;
587
588 /*
Wu Fengguang698544d2008-11-19 08:56:17 +0800589 * expand ELD's speaker allocation mask
590 *
591 * ELD tells the speaker mask in a compact(paired) form,
Wu Fengguangb83923a2008-11-22 09:40:51 +0800592 * expand ELD's notions to match the ones used by Audio InfoFrame.
Wu Fengguang698544d2008-11-19 08:56:17 +0800593 */
594 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
595 if (eld->spk_alloc & (1 << i))
596 spk_mask |= eld_speaker_allocation_bits[i];
597 }
598
599 /* search for the first working match in the CA table */
600 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
601 if (channels == channel_allocations[i].channels &&
602 (spk_mask & channel_allocations[i].spk_mask) ==
603 channel_allocations[i].spk_mask) {
604 ai->CA = channel_allocations[i].ca_index;
Wu Fengguangcc02b832008-11-22 09:40:52 +0800605 break;
Wu Fengguang698544d2008-11-19 08:56:17 +0800606 }
607 }
608
609 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
Wu Fengguangcc02b832008-11-22 09:40:52 +0800610 snd_printdd(KERN_INFO
611 "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
612 ai->CA, channels, buf);
613
614 return ai->CA;
Wu Fengguang698544d2008-11-19 08:56:17 +0800615}
616
Wu Fengguang6797cf22009-10-30 11:40:40 +0100617static void hdmi_setup_channel_mapping(struct hda_codec *codec, hda_nid_t nid,
618 struct hdmi_audio_infoframe *ai)
Wu Fengguang9c8641e2008-11-19 08:56:18 +0800619{
Wu Fengguang559059b2009-08-02 16:48:55 +0800620 int i;
621
Wu Fengguang9c8641e2008-11-19 08:56:18 +0800622 if (!ai->CA)
623 return;
624
625 /*
626 * TODO: adjust channel mapping if necessary
627 * ALSA sequence is front/surr/clfe/side?
628 */
629
Wu Fengguang559059b2009-08-02 16:48:55 +0800630 for (i = 0; i < 8; i++)
Wu Fengguang6797cf22009-10-30 11:40:40 +0100631 snd_hda_codec_write(codec, nid, 0,
Wu Fengguang559059b2009-08-02 16:48:55 +0800632 AC_VERB_SET_HDMI_CHAN_SLOT,
633 (i << 4) | i);
634
Wu Fengguang6797cf22009-10-30 11:40:40 +0100635 hdmi_debug_channel_mapping(codec, nid);
Wu Fengguang9c8641e2008-11-19 08:56:18 +0800636}
637
638
Wu Fengguang6797cf22009-10-30 11:40:40 +0100639static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
Wu Fengguang5457a982008-11-19 08:56:15 +0800640 struct snd_pcm_substream *substream)
641{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100642 struct intel_hdmi_spec *spec = codec->spec;
643 hda_nid_t pin_nid;
644 int i;
Wu Fengguang5457a982008-11-19 08:56:15 +0800645 struct hdmi_audio_infoframe ai = {
646 .type = 0x84,
647 .ver = 0x01,
648 .len = 0x0a,
649 .CC02_CT47 = substream->runtime->channels - 1,
650 };
651
Wu Fengguang6797cf22009-10-30 11:40:40 +0100652 hdmi_setup_channel_allocation(codec, nid, &ai);
653 hdmi_setup_channel_mapping(codec, nid, &ai);
Wu Fengguang698544d2008-11-19 08:56:17 +0800654
Wu Fengguang54a25f82009-10-30 11:44:26 +0100655 for (i = 0; i < spec->num_pins; i++) {
656 if (spec->pin_cvt[i] != nid)
657 continue;
Wu Fengguang23ccc2b2009-11-18 12:38:01 +0800658 if (!spec->sink_eld[i].monitor_present)
Wu Fengguang54a25f82009-10-30 11:44:26 +0100659 continue;
660
661 pin_nid = spec->pin[i];
662 hdmi_fill_audio_infoframe(codec, pin_nid, &ai);
663 hdmi_start_infoframe_trans(codec, pin_nid);
664 }
Wu Fengguang5457a982008-11-19 08:56:15 +0800665}
666
Wu, Fengguang91504872008-11-05 11:16:56 +0800667
668/*
669 * Unsolicited events
670 */
671
672static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
673{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100674 struct intel_hdmi_spec *spec = codec->spec;
675 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
Wu, Fengguang91504872008-11-05 11:16:56 +0800676 int pind = !!(res & AC_UNSOL_RES_PD);
677 int eldv = !!(res & AC_UNSOL_RES_ELDV);
Wu Fengguang54a25f82009-10-30 11:44:26 +0100678 int index;
Wu, Fengguang91504872008-11-05 11:16:56 +0800679
Wu Fengguang03284c82008-11-22 09:40:53 +0800680 printk(KERN_INFO
Wu Fengguang54a25f82009-10-30 11:44:26 +0100681 "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
682 tag, pind, eldv);
683
684 index = hda_node_index(spec->pin, tag);
685 if (index < 0)
686 return;
687
Wu Fengguang23ccc2b2009-11-18 12:38:01 +0800688 spec->sink_eld[index].monitor_present = pind;
689 spec->sink_eld[index].eld_valid = eldv;
Wu, Fengguang91504872008-11-05 11:16:56 +0800690
691 if (pind && eldv) {
Wu Fengguang3f54aa52009-11-18 12:38:03 +0800692 hdmi_get_show_eld(codec, spec->pin[index], &spec->sink_eld[index]);
Wu, Fengguang91504872008-11-05 11:16:56 +0800693 /* TODO: do real things about ELD */
694 }
695}
696
697static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
698{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100699 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
Wu, Fengguang91504872008-11-05 11:16:56 +0800700 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
701 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
702 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
703
Wu Fengguang03284c82008-11-22 09:40:53 +0800704 printk(KERN_INFO
Wu Fengguang54a25f82009-10-30 11:44:26 +0100705 "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
706 tag,
Wu Fengguang03284c82008-11-22 09:40:53 +0800707 subtag,
708 cp_state,
709 cp_ready);
Wu, Fengguang91504872008-11-05 11:16:56 +0800710
Wu Fengguang03284c82008-11-22 09:40:53 +0800711 /* TODO */
Wu, Fengguang91504872008-11-05 11:16:56 +0800712 if (cp_state)
713 ;
714 if (cp_ready)
715 ;
716}
717
718
719static void intel_hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
720{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100721 struct intel_hdmi_spec *spec = codec->spec;
Wu, Fengguang91504872008-11-05 11:16:56 +0800722 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
723 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
724
Wu Fengguang54a25f82009-10-30 11:44:26 +0100725 if (hda_node_index(spec->pin, tag) < 0) {
Wu Fengguang03284c82008-11-22 09:40:53 +0800726 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
Wu, Fengguang91504872008-11-05 11:16:56 +0800727 return;
728 }
729
730 if (subtag == 0)
731 hdmi_intrinsic_event(codec, res);
732 else
733 hdmi_non_intrinsic_event(codec, res);
734}
735
736/*
737 * Callbacks
738 */
739
Wu, Fengguang91504872008-11-05 11:16:56 +0800740static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
741 struct hda_codec *codec,
742 unsigned int stream_tag,
743 unsigned int format,
744 struct snd_pcm_substream *substream)
745{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100746 hdmi_set_channel_count(codec, hinfo->nid,
Wu Fengguang7bedb012009-10-30 11:41:44 +0100747 substream->runtime->channels);
Wu, Fengguang91504872008-11-05 11:16:56 +0800748
Wu Fengguang54a25f82009-10-30 11:44:26 +0100749 hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
Wu, Fengguang91504872008-11-05 11:16:56 +0800750
Wu Fengguang7bedb012009-10-30 11:41:44 +0100751 snd_hda_codec_setup_stream(codec, hinfo->nid, stream_tag, 0, format);
Wu, Fengguang91504872008-11-05 11:16:56 +0800752 return 0;
753}
754
Wu Fengguangddb81522009-10-30 11:43:03 +0100755static int intel_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
756 struct hda_codec *codec,
757 struct snd_pcm_substream *substream)
758{
759 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100760 int i;
Wu Fengguangddb81522009-10-30 11:43:03 +0100761
Wu Fengguang54a25f82009-10-30 11:44:26 +0100762 for (i = 0; i < spec->num_pins; i++) {
763 if (spec->pin_cvt[i] != hinfo->nid)
764 continue;
765
766 hdmi_stop_infoframe_trans(codec, spec->pin[i]);
767 }
Wu Fengguangddb81522009-10-30 11:43:03 +0100768
769 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
770 return 0;
771}
772
Wu, Fengguang91504872008-11-05 11:16:56 +0800773static struct hda_pcm_stream intel_hdmi_pcm_playback = {
774 .substreams = 1,
775 .channels_min = 2,
Wu, Fengguang91504872008-11-05 11:16:56 +0800776 .ops = {
Wu Fengguang70ca35f2009-10-30 11:42:18 +0100777 .prepare = intel_hdmi_playback_pcm_prepare,
778 .cleanup = intel_hdmi_playback_pcm_cleanup,
Wu, Fengguang91504872008-11-05 11:16:56 +0800779 },
780};
781
782static int intel_hdmi_build_pcms(struct hda_codec *codec)
783{
784 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100785 struct hda_pcm *info = spec->pcm_rec;
786 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800787
Wu Fengguang54a25f82009-10-30 11:44:26 +0100788 codec->num_pcms = spec->num_cvts;
Wu, Fengguang91504872008-11-05 11:16:56 +0800789 codec->pcm_info = info;
790
Wu Fengguang54a25f82009-10-30 11:44:26 +0100791 for (i = 0; i < codec->num_pcms; i++, info++) {
Wu Fengguang69fb3462009-10-30 11:45:04 +0100792 unsigned int chans;
793
794 chans = get_wcaps(codec, spec->cvt[i]);
795 chans = get_wcaps_channels(chans);
796
Wu Fengguang54a25f82009-10-30 11:44:26 +0100797 info->name = intel_hdmi_pcm_names[i];
798 info->pcm_type = HDA_PCM_TYPE_HDMI;
799 info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
800 intel_hdmi_pcm_playback;
801 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
Wu Fengguang69fb3462009-10-30 11:45:04 +0100802 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100803 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800804
805 return 0;
806}
807
808static int intel_hdmi_build_controls(struct hda_codec *codec)
809{
810 struct intel_hdmi_spec *spec = codec->spec;
811 int err;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100812 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800813
Wu Fengguang54a25f82009-10-30 11:44:26 +0100814 for (i = 0; i < codec->num_pcms; i++) {
815 err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
816 if (err < 0)
817 return err;
818 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800819
820 return 0;
821}
822
823static int intel_hdmi_init(struct hda_codec *codec)
824{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100825 struct intel_hdmi_spec *spec = codec->spec;
826 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800827
Wu Fengguang54a25f82009-10-30 11:44:26 +0100828 for (i = 0; spec->pin[i]; i++) {
829 hdmi_enable_output(codec, spec->pin[i]);
830 snd_hda_codec_write(codec, spec->pin[i], 0,
831 AC_VERB_SET_UNSOLICITED_ENABLE,
832 AC_USRSP_EN | spec->pin[i]);
833 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800834 return 0;
835}
836
837static void intel_hdmi_free(struct hda_codec *codec)
838{
Takashi Iwaif208dba2008-11-21 09:11:50 +0100839 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100840 int i;
Takashi Iwaif208dba2008-11-21 09:11:50 +0100841
Wu Fengguang54a25f82009-10-30 11:44:26 +0100842 for (i = 0; i < spec->num_pins; i++)
843 snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
844
Takashi Iwaif208dba2008-11-21 09:11:50 +0100845 kfree(spec);
Wu, Fengguang91504872008-11-05 11:16:56 +0800846}
847
848static struct hda_codec_ops intel_hdmi_patch_ops = {
849 .init = intel_hdmi_init,
850 .free = intel_hdmi_free,
851 .build_pcms = intel_hdmi_build_pcms,
852 .build_controls = intel_hdmi_build_controls,
853 .unsol_event = intel_hdmi_unsol_event,
854};
855
Wu Fengguangfd080b22009-10-30 11:46:22 +0100856static int patch_intel_hdmi(struct hda_codec *codec)
Wu, Fengguang91504872008-11-05 11:16:56 +0800857{
858 struct intel_hdmi_spec *spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100859 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800860
861 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
862 if (spec == NULL)
863 return -ENOMEM;
864
Wu, Fengguang91504872008-11-05 11:16:56 +0800865 codec->spec = spec;
Wu Fengguangf4243672009-10-30 11:45:35 +0100866 if (intel_hdmi_parse_codec(codec) < 0) {
867 codec->spec = NULL;
868 kfree(spec);
869 return -EINVAL;
870 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800871 codec->patch_ops = intel_hdmi_patch_ops;
872
Wu Fengguang54a25f82009-10-30 11:44:26 +0100873 for (i = 0; i < spec->num_pins; i++)
874 snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
Wu Fengguang5f1e71b2008-11-18 11:47:53 +0800875
Wu Fengguang698544d2008-11-19 08:56:17 +0800876 init_channel_allocations();
877
Wu, Fengguang91504872008-11-05 11:16:56 +0800878 return 0;
879}
880
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100881static struct hda_codec_preset snd_hda_preset_intelhdmi[] = {
Takashi Iwai74c61132008-12-18 09:11:33 +0100882 { .id = 0x808629fb, .name = "G45 DEVCL", .patch = patch_intel_hdmi },
883 { .id = 0x80862801, .name = "G45 DEVBLC", .patch = patch_intel_hdmi },
884 { .id = 0x80862802, .name = "G45 DEVCTG", .patch = patch_intel_hdmi },
885 { .id = 0x80862803, .name = "G45 DEVELK", .patch = patch_intel_hdmi },
Wu Fengguangfd080b22009-10-30 11:46:22 +0100886 { .id = 0x80862804, .name = "G45 DEVIBX", .patch = patch_intel_hdmi },
887 { .id = 0x80860054, .name = "Q57 DEVIBX", .patch = patch_intel_hdmi },
Wu Fengguang3a95cb92008-11-13 10:19:38 +0800888 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi },
Wu, Fengguang91504872008-11-05 11:16:56 +0800889 {} /* terminator */
890};
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100891
892MODULE_ALIAS("snd-hda-codec-id:808629fb");
893MODULE_ALIAS("snd-hda-codec-id:80862801");
894MODULE_ALIAS("snd-hda-codec-id:80862802");
895MODULE_ALIAS("snd-hda-codec-id:80862803");
Wu Fengguanga57c0eb2009-02-11 15:22:31 +0800896MODULE_ALIAS("snd-hda-codec-id:80862804");
Jaroslav Kysela87a8c372009-07-23 10:58:29 +0200897MODULE_ALIAS("snd-hda-codec-id:80860054");
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100898MODULE_ALIAS("snd-hda-codec-id:10951392");
899
900MODULE_LICENSE("GPL");
901MODULE_DESCRIPTION("Intel HDMI HD-audio codec");
902
903static struct hda_codec_preset_list intel_list = {
904 .preset = snd_hda_preset_intelhdmi,
905 .owner = THIS_MODULE,
906};
907
908static int __init patch_intelhdmi_init(void)
909{
910 return snd_hda_add_codec_preset(&intel_list);
911}
912
913static void __exit patch_intelhdmi_exit(void)
914{
915 snd_hda_delete_codec_preset(&intel_list);
916}
917
918module_init(patch_intelhdmi_init)
919module_exit(patch_intelhdmi_exit)