Peter Ujfalusi | a53b8e3 | 2011-06-04 08:16:41 +0300 | [diff] [blame] | 1 | /* |
| 2 | * twl-common.c |
| 3 | * |
| 4 | * Copyright (C) 2011 Texas Instruments, Inc.. |
| 5 | * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License |
| 9 | * version 2 as published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, but |
| 12 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA |
| 19 | * 02110-1301 USA |
| 20 | * |
| 21 | */ |
| 22 | |
| 23 | #include <linux/i2c.h> |
| 24 | #include <linux/i2c/twl.h> |
| 25 | #include <linux/gpio.h> |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 26 | #include <linux/regulator/machine.h> |
| 27 | #include <linux/regulator/fixed.h> |
Peter Ujfalusi | a53b8e3 | 2011-06-04 08:16:41 +0300 | [diff] [blame] | 28 | |
Tony Lindgren | dbc0416 | 2012-08-31 10:59:07 -0700 | [diff] [blame] | 29 | #include "soc.h" |
Peter Ujfalusi | a53b8e3 | 2011-06-04 08:16:41 +0300 | [diff] [blame] | 30 | #include "twl-common.h" |
Kevin Hilman | 46232a3 | 2011-11-23 14:43:01 -0800 | [diff] [blame] | 31 | #include "pm.h" |
Tero Kristo | 49c008e | 2012-02-20 12:26:08 +0200 | [diff] [blame] | 32 | #include "voltage.h" |
Kevin Hilman | 5941b81 | 2012-06-28 10:01:32 -0700 | [diff] [blame] | 33 | #include "mux.h" |
Peter Ujfalusi | a53b8e3 | 2011-06-04 08:16:41 +0300 | [diff] [blame] | 34 | |
| 35 | static struct i2c_board_info __initdata pmic_i2c_board_info = { |
| 36 | .addr = 0x48, |
| 37 | .flags = I2C_CLIENT_WAKE, |
| 38 | }; |
| 39 | |
Peter Ujfalusi | da0085f | 2012-06-21 01:36:02 -0700 | [diff] [blame] | 40 | #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) |
Tero Kristo | 49c008e | 2012-02-20 12:26:08 +0200 | [diff] [blame] | 41 | static int twl_set_voltage(void *data, int target_uV) |
| 42 | { |
| 43 | struct voltagedomain *voltdm = (struct voltagedomain *)data; |
| 44 | return voltdm_scale(voltdm, target_uV); |
| 45 | } |
| 46 | |
| 47 | static int twl_get_voltage(void *data) |
| 48 | { |
| 49 | struct voltagedomain *voltdm = (struct voltagedomain *)data; |
| 50 | return voltdm_get_voltage(voltdm); |
| 51 | } |
Peter Ujfalusi | da0085f | 2012-06-21 01:36:02 -0700 | [diff] [blame] | 52 | #endif |
Tero Kristo | 49c008e | 2012-02-20 12:26:08 +0200 | [diff] [blame] | 53 | |
Peter Ujfalusi | a53b8e3 | 2011-06-04 08:16:41 +0300 | [diff] [blame] | 54 | void __init omap_pmic_init(int bus, u32 clkrate, |
| 55 | const char *pmic_type, int pmic_irq, |
| 56 | struct twl4030_platform_data *pmic_data) |
| 57 | { |
Kevin Hilman | 265a2bc | 2012-07-16 16:56:15 -0700 | [diff] [blame] | 58 | omap_mux_init_signal("sys_nirq", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); |
Peter Ujfalusi | a53b8e3 | 2011-06-04 08:16:41 +0300 | [diff] [blame] | 59 | strncpy(pmic_i2c_board_info.type, pmic_type, |
| 60 | sizeof(pmic_i2c_board_info.type)); |
| 61 | pmic_i2c_board_info.irq = pmic_irq; |
| 62 | pmic_i2c_board_info.platform_data = pmic_data; |
| 63 | |
| 64 | omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); |
| 65 | } |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 66 | |
Peter Ujfalusi | 8eaeb93 | 2012-04-03 11:56:51 +0300 | [diff] [blame] | 67 | void __init omap4_pmic_init(const char *pmic_type, |
| 68 | struct twl4030_platform_data *pmic_data, |
Peter Ujfalusi | 9495d1e | 2012-09-24 12:24:48 +0300 | [diff] [blame] | 69 | struct i2c_board_info *devices, int nr_devices) |
Peter Ujfalusi | 8eaeb93 | 2012-04-03 11:56:51 +0300 | [diff] [blame] | 70 | { |
| 71 | /* PMIC part*/ |
Kevin Hilman | 5941b81 | 2012-06-28 10:01:32 -0700 | [diff] [blame] | 72 | omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); |
Kevin Hilman | 1ef4336 | 2012-11-08 11:08:50 -0800 | [diff] [blame] | 73 | omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT); |
Peter Ujfalusi | 9495d1e | 2012-09-24 12:24:48 +0300 | [diff] [blame] | 74 | omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data); |
Peter Ujfalusi | 8eaeb93 | 2012-04-03 11:56:51 +0300 | [diff] [blame] | 75 | |
Peter Ujfalusi | 9495d1e | 2012-09-24 12:24:48 +0300 | [diff] [blame] | 76 | /* Register additional devices on i2c1 bus if needed */ |
| 77 | if (devices) |
| 78 | i2c_register_board_info(1, devices, nr_devices); |
Peter Ujfalusi | 8eaeb93 | 2012-04-03 11:56:51 +0300 | [diff] [blame] | 79 | } |
| 80 | |
Kevin Hilman | 46232a3 | 2011-11-23 14:43:01 -0800 | [diff] [blame] | 81 | void __init omap_pmic_late_init(void) |
| 82 | { |
Peter Ujfalusi | 9495d1e | 2012-09-24 12:24:48 +0300 | [diff] [blame] | 83 | /* Init the OMAP TWL parameters (if PMIC has been registerd) */ |
| 84 | if (!pmic_i2c_board_info.irq) |
| 85 | return; |
| 86 | |
| 87 | omap3_twl_init(); |
| 88 | omap4_twl_init(); |
Kevin Hilman | 46232a3 | 2011-11-23 14:43:01 -0800 | [diff] [blame] | 89 | } |
| 90 | |
Peter Ujfalusi | d12d1fc | 2011-08-09 15:36:50 +0300 | [diff] [blame] | 91 | #if defined(CONFIG_ARCH_OMAP3) |
Peter Ujfalusi | 827ed9a | 2011-06-07 10:28:54 +0300 | [diff] [blame] | 92 | static struct twl4030_usb_data omap3_usb_pdata = { |
| 93 | .usb_mode = T2_USB_MODE_ULPI, |
| 94 | }; |
| 95 | |
| 96 | static int omap3_batt_table[] = { |
| 97 | /* 0 C */ |
| 98 | 30800, 29500, 28300, 27100, |
| 99 | 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, |
| 100 | 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, |
| 101 | 11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, |
| 102 | 8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, |
| 103 | 5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, |
| 104 | 4040, 3910, 3790, 3670, 3550 |
| 105 | }; |
| 106 | |
| 107 | static struct twl4030_bci_platform_data omap3_bci_pdata = { |
| 108 | .battery_tmp_tbl = omap3_batt_table, |
| 109 | .tblsize = ARRAY_SIZE(omap3_batt_table), |
| 110 | }; |
| 111 | |
| 112 | static struct twl4030_madc_platform_data omap3_madc_pdata = { |
| 113 | .irq_line = 1, |
| 114 | }; |
| 115 | |
Peter Ujfalusi | 4ae6df5e | 2011-05-31 15:21:13 +0300 | [diff] [blame] | 116 | static struct twl4030_codec_data omap3_codec; |
Peter Ujfalusi | 827ed9a | 2011-06-07 10:28:54 +0300 | [diff] [blame] | 117 | |
Peter Ujfalusi | 4ae6df5e | 2011-05-31 15:21:13 +0300 | [diff] [blame] | 118 | static struct twl4030_audio_data omap3_audio_pdata = { |
Peter Ujfalusi | 827ed9a | 2011-06-07 10:28:54 +0300 | [diff] [blame] | 119 | .audio_mclk = 26000000, |
Peter Ujfalusi | 4ae6df5e | 2011-05-31 15:21:13 +0300 | [diff] [blame] | 120 | .codec = &omap3_codec, |
Peter Ujfalusi | 827ed9a | 2011-06-07 10:28:54 +0300 | [diff] [blame] | 121 | }; |
| 122 | |
Peter Ujfalusi | b252b0ef | 2011-06-07 11:38:24 +0300 | [diff] [blame] | 123 | static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = { |
| 124 | REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), |
| 125 | }; |
| 126 | |
| 127 | static struct regulator_init_data omap3_vdac_idata = { |
| 128 | .constraints = { |
| 129 | .min_uV = 1800000, |
| 130 | .max_uV = 1800000, |
| 131 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 132 | | REGULATOR_MODE_STANDBY, |
| 133 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 134 | | REGULATOR_CHANGE_STATUS, |
| 135 | }, |
| 136 | .num_consumer_supplies = ARRAY_SIZE(omap3_vdda_dac_supplies), |
| 137 | .consumer_supplies = omap3_vdda_dac_supplies, |
| 138 | }; |
| 139 | |
| 140 | static struct regulator_consumer_supply omap3_vpll2_supplies[] = { |
| 141 | REGULATOR_SUPPLY("vdds_dsi", "omapdss"), |
Tomi Valkeinen | 7c68dd9 | 2011-08-03 14:00:57 +0300 | [diff] [blame] | 142 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"), |
Peter Ujfalusi | b252b0ef | 2011-06-07 11:38:24 +0300 | [diff] [blame] | 143 | }; |
| 144 | |
| 145 | static struct regulator_init_data omap3_vpll2_idata = { |
| 146 | .constraints = { |
| 147 | .min_uV = 1800000, |
| 148 | .max_uV = 1800000, |
| 149 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 150 | | REGULATOR_MODE_STANDBY, |
| 151 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 152 | | REGULATOR_CHANGE_STATUS, |
| 153 | }, |
| 154 | .num_consumer_supplies = ARRAY_SIZE(omap3_vpll2_supplies), |
| 155 | .consumer_supplies = omap3_vpll2_supplies, |
| 156 | }; |
| 157 | |
Tero Kristo | 23e22a5 | 2012-02-20 12:26:07 +0200 | [diff] [blame] | 158 | static struct regulator_consumer_supply omap3_vdd1_supply[] = { |
Kevin Hilman | 24d7b40 | 2012-09-06 14:03:08 -0700 | [diff] [blame] | 159 | REGULATOR_SUPPLY("vcc", "cpu0"), |
Tero Kristo | 23e22a5 | 2012-02-20 12:26:07 +0200 | [diff] [blame] | 160 | }; |
| 161 | |
| 162 | static struct regulator_consumer_supply omap3_vdd2_supply[] = { |
| 163 | REGULATOR_SUPPLY("vcc", "l3_main.0"), |
| 164 | }; |
| 165 | |
| 166 | static struct regulator_init_data omap3_vdd1 = { |
| 167 | .constraints = { |
| 168 | .name = "vdd_mpu_iva", |
| 169 | .min_uV = 600000, |
| 170 | .max_uV = 1450000, |
| 171 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
| 172 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
| 173 | }, |
| 174 | .num_consumer_supplies = ARRAY_SIZE(omap3_vdd1_supply), |
| 175 | .consumer_supplies = omap3_vdd1_supply, |
| 176 | }; |
| 177 | |
| 178 | static struct regulator_init_data omap3_vdd2 = { |
| 179 | .constraints = { |
| 180 | .name = "vdd_core", |
| 181 | .min_uV = 600000, |
| 182 | .max_uV = 1450000, |
| 183 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
| 184 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
| 185 | }, |
| 186 | .num_consumer_supplies = ARRAY_SIZE(omap3_vdd2_supply), |
| 187 | .consumer_supplies = omap3_vdd2_supply, |
| 188 | }; |
| 189 | |
Tero Kristo | 49c008e | 2012-02-20 12:26:08 +0200 | [diff] [blame] | 190 | static struct twl_regulator_driver_data omap3_vdd1_drvdata = { |
| 191 | .get_voltage = twl_get_voltage, |
| 192 | .set_voltage = twl_set_voltage, |
| 193 | }; |
| 194 | |
| 195 | static struct twl_regulator_driver_data omap3_vdd2_drvdata = { |
| 196 | .get_voltage = twl_get_voltage, |
| 197 | .set_voltage = twl_set_voltage, |
| 198 | }; |
| 199 | |
Peter Ujfalusi | d12d1fc | 2011-08-09 15:36:50 +0300 | [diff] [blame] | 200 | void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, |
| 201 | u32 pdata_flags, u32 regulators_flags) |
| 202 | { |
Tero Kristo | 49c008e | 2012-02-20 12:26:08 +0200 | [diff] [blame] | 203 | if (!pmic_data->vdd1) { |
| 204 | omap3_vdd1.driver_data = &omap3_vdd1_drvdata; |
| 205 | omap3_vdd1_drvdata.data = voltdm_lookup("mpu_iva"); |
Tero Kristo | 23e22a5 | 2012-02-20 12:26:07 +0200 | [diff] [blame] | 206 | pmic_data->vdd1 = &omap3_vdd1; |
Tero Kristo | 49c008e | 2012-02-20 12:26:08 +0200 | [diff] [blame] | 207 | } |
| 208 | if (!pmic_data->vdd2) { |
| 209 | omap3_vdd2.driver_data = &omap3_vdd2_drvdata; |
| 210 | omap3_vdd2_drvdata.data = voltdm_lookup("core"); |
Tero Kristo | 23e22a5 | 2012-02-20 12:26:07 +0200 | [diff] [blame] | 211 | pmic_data->vdd2 = &omap3_vdd2; |
Tero Kristo | 49c008e | 2012-02-20 12:26:08 +0200 | [diff] [blame] | 212 | } |
Peter Ujfalusi | d12d1fc | 2011-08-09 15:36:50 +0300 | [diff] [blame] | 213 | |
| 214 | /* Common platform data configurations */ |
| 215 | if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) |
| 216 | pmic_data->usb = &omap3_usb_pdata; |
| 217 | |
| 218 | if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) |
| 219 | pmic_data->bci = &omap3_bci_pdata; |
| 220 | |
| 221 | if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc) |
| 222 | pmic_data->madc = &omap3_madc_pdata; |
| 223 | |
| 224 | if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio) |
| 225 | pmic_data->audio = &omap3_audio_pdata; |
| 226 | |
| 227 | /* Common regulator configurations */ |
| 228 | if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) |
| 229 | pmic_data->vdac = &omap3_vdac_idata; |
| 230 | |
| 231 | if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2) |
| 232 | pmic_data->vpll2 = &omap3_vpll2_idata; |
| 233 | } |
| 234 | #endif /* CONFIG_ARCH_OMAP3 */ |
| 235 | |
| 236 | #if defined(CONFIG_ARCH_OMAP4) |
| 237 | static struct twl4030_usb_data omap4_usb_pdata = { |
Peter Ujfalusi | d12d1fc | 2011-08-09 15:36:50 +0300 | [diff] [blame] | 238 | }; |
| 239 | |
Tomi Valkeinen | 8a3d895 | 2012-08-15 15:54:53 +0300 | [diff] [blame] | 240 | static struct regulator_consumer_supply omap4_vdda_hdmi_dac_supplies[] = { |
| 241 | REGULATOR_SUPPLY("vdda_hdmi_dac", "omapdss_hdmi"), |
| 242 | }; |
| 243 | |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 244 | static struct regulator_init_data omap4_vdac_idata = { |
| 245 | .constraints = { |
| 246 | .min_uV = 1800000, |
| 247 | .max_uV = 1800000, |
| 248 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 249 | | REGULATOR_MODE_STANDBY, |
| 250 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 251 | | REGULATOR_CHANGE_STATUS, |
| 252 | }, |
Tomi Valkeinen | 8a3d895 | 2012-08-15 15:54:53 +0300 | [diff] [blame] | 253 | .num_consumer_supplies = ARRAY_SIZE(omap4_vdda_hdmi_dac_supplies), |
| 254 | .consumer_supplies = omap4_vdda_hdmi_dac_supplies, |
Peter Ujfalusi | fde0190 | 2012-05-09 14:19:16 -0700 | [diff] [blame] | 255 | .supply_regulator = "V2V1", |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 256 | }; |
| 257 | |
| 258 | static struct regulator_init_data omap4_vaux2_idata = { |
| 259 | .constraints = { |
| 260 | .min_uV = 1200000, |
| 261 | .max_uV = 2800000, |
| 262 | .apply_uV = true, |
| 263 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 264 | | REGULATOR_MODE_STANDBY, |
| 265 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
| 266 | | REGULATOR_CHANGE_MODE |
| 267 | | REGULATOR_CHANGE_STATUS, |
| 268 | }, |
| 269 | }; |
| 270 | |
| 271 | static struct regulator_init_data omap4_vaux3_idata = { |
| 272 | .constraints = { |
| 273 | .min_uV = 1000000, |
| 274 | .max_uV = 3000000, |
| 275 | .apply_uV = true, |
| 276 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 277 | | REGULATOR_MODE_STANDBY, |
| 278 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
| 279 | | REGULATOR_CHANGE_MODE |
| 280 | | REGULATOR_CHANGE_STATUS, |
| 281 | }, |
| 282 | }; |
| 283 | |
| 284 | static struct regulator_consumer_supply omap4_vmmc_supply[] = { |
| 285 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), |
| 286 | }; |
| 287 | |
| 288 | /* VMMC1 for MMC1 card */ |
| 289 | static struct regulator_init_data omap4_vmmc_idata = { |
| 290 | .constraints = { |
| 291 | .min_uV = 1200000, |
| 292 | .max_uV = 3000000, |
| 293 | .apply_uV = true, |
| 294 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 295 | | REGULATOR_MODE_STANDBY, |
| 296 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
| 297 | | REGULATOR_CHANGE_MODE |
| 298 | | REGULATOR_CHANGE_STATUS, |
| 299 | }, |
| 300 | .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply), |
| 301 | .consumer_supplies = omap4_vmmc_supply, |
| 302 | }; |
| 303 | |
| 304 | static struct regulator_init_data omap4_vpp_idata = { |
| 305 | .constraints = { |
| 306 | .min_uV = 1800000, |
| 307 | .max_uV = 2500000, |
| 308 | .apply_uV = true, |
| 309 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 310 | | REGULATOR_MODE_STANDBY, |
| 311 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
| 312 | | REGULATOR_CHANGE_MODE |
| 313 | | REGULATOR_CHANGE_STATUS, |
| 314 | }, |
| 315 | }; |
| 316 | |
| 317 | static struct regulator_init_data omap4_vana_idata = { |
| 318 | .constraints = { |
| 319 | .min_uV = 2100000, |
| 320 | .max_uV = 2100000, |
| 321 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 322 | | REGULATOR_MODE_STANDBY, |
| 323 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 324 | | REGULATOR_CHANGE_STATUS, |
| 325 | }, |
| 326 | }; |
| 327 | |
Tomi Valkeinen | 4e6a0ab | 2011-08-03 14:13:52 +0300 | [diff] [blame] | 328 | static struct regulator_consumer_supply omap4_vcxio_supply[] = { |
| 329 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dss"), |
| 330 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"), |
| 331 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.1"), |
| 332 | }; |
| 333 | |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 334 | static struct regulator_init_data omap4_vcxio_idata = { |
| 335 | .constraints = { |
| 336 | .min_uV = 1800000, |
| 337 | .max_uV = 1800000, |
| 338 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 339 | | REGULATOR_MODE_STANDBY, |
| 340 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 341 | | REGULATOR_CHANGE_STATUS, |
Tomi Valkeinen | 4e6a0ab | 2011-08-03 14:13:52 +0300 | [diff] [blame] | 342 | .always_on = true, |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 343 | }, |
Tomi Valkeinen | 4e6a0ab | 2011-08-03 14:13:52 +0300 | [diff] [blame] | 344 | .num_consumer_supplies = ARRAY_SIZE(omap4_vcxio_supply), |
| 345 | .consumer_supplies = omap4_vcxio_supply, |
Peter Ujfalusi | fde0190 | 2012-05-09 14:19:16 -0700 | [diff] [blame] | 346 | .supply_regulator = "V2V1", |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 347 | }; |
| 348 | |
| 349 | static struct regulator_init_data omap4_vusb_idata = { |
| 350 | .constraints = { |
| 351 | .min_uV = 3300000, |
| 352 | .max_uV = 3300000, |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 353 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 354 | | REGULATOR_MODE_STANDBY, |
| 355 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 356 | | REGULATOR_CHANGE_STATUS, |
| 357 | }, |
| 358 | }; |
| 359 | |
| 360 | static struct regulator_init_data omap4_clk32kg_idata = { |
| 361 | .constraints = { |
| 362 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
| 363 | }, |
| 364 | }; |
| 365 | |
Tero Kristo | e160dda | 2012-02-22 12:40:40 +0200 | [diff] [blame] | 366 | static struct regulator_consumer_supply omap4_vdd1_supply[] = { |
Kevin Hilman | 73c503c | 2012-11-05 15:46:36 -0800 | [diff] [blame] | 367 | REGULATOR_SUPPLY("vcc", "cpu0"), |
Tero Kristo | e160dda | 2012-02-22 12:40:40 +0200 | [diff] [blame] | 368 | }; |
| 369 | |
| 370 | static struct regulator_consumer_supply omap4_vdd2_supply[] = { |
| 371 | REGULATOR_SUPPLY("vcc", "iva.0"), |
| 372 | }; |
| 373 | |
| 374 | static struct regulator_consumer_supply omap4_vdd3_supply[] = { |
| 375 | REGULATOR_SUPPLY("vcc", "l3_main.0"), |
| 376 | }; |
| 377 | |
| 378 | static struct regulator_init_data omap4_vdd1 = { |
| 379 | .constraints = { |
| 380 | .name = "vdd_mpu", |
| 381 | .min_uV = 500000, |
| 382 | .max_uV = 1500000, |
| 383 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
| 384 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
| 385 | }, |
| 386 | .num_consumer_supplies = ARRAY_SIZE(omap4_vdd1_supply), |
| 387 | .consumer_supplies = omap4_vdd1_supply, |
| 388 | }; |
| 389 | |
| 390 | static struct regulator_init_data omap4_vdd2 = { |
| 391 | .constraints = { |
| 392 | .name = "vdd_iva", |
| 393 | .min_uV = 500000, |
| 394 | .max_uV = 1500000, |
| 395 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
| 396 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
| 397 | }, |
| 398 | .num_consumer_supplies = ARRAY_SIZE(omap4_vdd2_supply), |
| 399 | .consumer_supplies = omap4_vdd2_supply, |
| 400 | }; |
| 401 | |
| 402 | static struct regulator_init_data omap4_vdd3 = { |
| 403 | .constraints = { |
| 404 | .name = "vdd_core", |
| 405 | .min_uV = 500000, |
| 406 | .max_uV = 1500000, |
| 407 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
| 408 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
| 409 | }, |
| 410 | .num_consumer_supplies = ARRAY_SIZE(omap4_vdd3_supply), |
| 411 | .consumer_supplies = omap4_vdd3_supply, |
| 412 | }; |
| 413 | |
| 414 | |
| 415 | static struct twl_regulator_driver_data omap4_vdd1_drvdata = { |
| 416 | .get_voltage = twl_get_voltage, |
| 417 | .set_voltage = twl_set_voltage, |
| 418 | }; |
| 419 | |
| 420 | static struct twl_regulator_driver_data omap4_vdd2_drvdata = { |
| 421 | .get_voltage = twl_get_voltage, |
| 422 | .set_voltage = twl_set_voltage, |
| 423 | }; |
| 424 | |
| 425 | static struct twl_regulator_driver_data omap4_vdd3_drvdata = { |
| 426 | .get_voltage = twl_get_voltage, |
| 427 | .set_voltage = twl_set_voltage, |
| 428 | }; |
| 429 | |
Peter Ujfalusi | fde0190 | 2012-05-09 14:19:16 -0700 | [diff] [blame] | 430 | static struct regulator_consumer_supply omap4_v1v8_supply[] = { |
| 431 | REGULATOR_SUPPLY("vio", "1-004b"), |
| 432 | }; |
| 433 | |
| 434 | static struct regulator_init_data omap4_v1v8_idata = { |
| 435 | .constraints = { |
| 436 | .min_uV = 1800000, |
| 437 | .max_uV = 1800000, |
| 438 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 439 | | REGULATOR_MODE_STANDBY, |
| 440 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 441 | | REGULATOR_CHANGE_STATUS, |
| 442 | .always_on = true, |
| 443 | }, |
| 444 | .num_consumer_supplies = ARRAY_SIZE(omap4_v1v8_supply), |
| 445 | .consumer_supplies = omap4_v1v8_supply, |
| 446 | }; |
| 447 | |
| 448 | static struct regulator_consumer_supply omap4_v2v1_supply[] = { |
| 449 | REGULATOR_SUPPLY("v2v1", "1-004b"), |
| 450 | }; |
| 451 | |
| 452 | static struct regulator_init_data omap4_v2v1_idata = { |
| 453 | .constraints = { |
| 454 | .min_uV = 2100000, |
| 455 | .max_uV = 2100000, |
| 456 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 457 | | REGULATOR_MODE_STANDBY, |
| 458 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 459 | | REGULATOR_CHANGE_STATUS, |
| 460 | }, |
| 461 | .num_consumer_supplies = ARRAY_SIZE(omap4_v2v1_supply), |
| 462 | .consumer_supplies = omap4_v2v1_supply, |
| 463 | }; |
| 464 | |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 465 | void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, |
| 466 | u32 pdata_flags, u32 regulators_flags) |
| 467 | { |
Tero Kristo | e160dda | 2012-02-22 12:40:40 +0200 | [diff] [blame] | 468 | if (!pmic_data->vdd1) { |
| 469 | omap4_vdd1.driver_data = &omap4_vdd1_drvdata; |
| 470 | omap4_vdd1_drvdata.data = voltdm_lookup("mpu"); |
| 471 | pmic_data->vdd1 = &omap4_vdd1; |
| 472 | } |
| 473 | |
| 474 | if (!pmic_data->vdd2) { |
| 475 | omap4_vdd2.driver_data = &omap4_vdd2_drvdata; |
| 476 | omap4_vdd2_drvdata.data = voltdm_lookup("iva"); |
| 477 | pmic_data->vdd2 = &omap4_vdd2; |
| 478 | } |
| 479 | |
| 480 | if (!pmic_data->vdd3) { |
| 481 | omap4_vdd3.driver_data = &omap4_vdd3_drvdata; |
| 482 | omap4_vdd3_drvdata.data = voltdm_lookup("core"); |
| 483 | pmic_data->vdd3 = &omap4_vdd3; |
| 484 | } |
| 485 | |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 486 | /* Common platform data configurations */ |
| 487 | if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) |
| 488 | pmic_data->usb = &omap4_usb_pdata; |
| 489 | |
| 490 | /* Common regulator configurations */ |
| 491 | if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) |
| 492 | pmic_data->vdac = &omap4_vdac_idata; |
| 493 | |
| 494 | if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2) |
| 495 | pmic_data->vaux2 = &omap4_vaux2_idata; |
| 496 | |
| 497 | if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3) |
| 498 | pmic_data->vaux3 = &omap4_vaux3_idata; |
| 499 | |
| 500 | if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc) |
| 501 | pmic_data->vmmc = &omap4_vmmc_idata; |
| 502 | |
| 503 | if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp) |
| 504 | pmic_data->vpp = &omap4_vpp_idata; |
| 505 | |
| 506 | if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana) |
| 507 | pmic_data->vana = &omap4_vana_idata; |
| 508 | |
| 509 | if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio) |
| 510 | pmic_data->vcxio = &omap4_vcxio_idata; |
| 511 | |
| 512 | if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb) |
| 513 | pmic_data->vusb = &omap4_vusb_idata; |
| 514 | |
| 515 | if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG && |
| 516 | !pmic_data->clk32kg) |
| 517 | pmic_data->clk32kg = &omap4_clk32kg_idata; |
Peter Ujfalusi | fde0190 | 2012-05-09 14:19:16 -0700 | [diff] [blame] | 518 | |
| 519 | if (regulators_flags & TWL_COMMON_REGULATOR_V1V8 && !pmic_data->v1v8) |
| 520 | pmic_data->v1v8 = &omap4_v1v8_idata; |
| 521 | |
| 522 | if (regulators_flags & TWL_COMMON_REGULATOR_V2V1 && !pmic_data->v2v1) |
| 523 | pmic_data->v2v1 = &omap4_v2v1_idata; |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 524 | } |
Peter Ujfalusi | d12d1fc | 2011-08-09 15:36:50 +0300 | [diff] [blame] | 525 | #endif /* CONFIG_ARCH_OMAP4 */ |
Peter Ujfalusi | 552d9dc | 2012-08-14 12:07:57 +0300 | [diff] [blame] | 526 | |
| 527 | #if defined(CONFIG_SND_OMAP_SOC_OMAP_TWL4030) || \ |
| 528 | defined(CONFIG_SND_OMAP_SOC_OMAP_TWL4030_MODULE) |
| 529 | #include <linux/platform_data/omap-twl4030.h> |
| 530 | |
Peter Ujfalusi | 02553f5a | 2012-12-05 14:40:30 +0100 | [diff] [blame] | 531 | /* Commonly used configuration */ |
Peter Ujfalusi | 40234bf | 2012-12-05 14:45:23 +0100 | [diff] [blame^] | 532 | static struct omap_tw4030_pdata omap_twl4030_audio_data; |
Peter Ujfalusi | 552d9dc | 2012-08-14 12:07:57 +0300 | [diff] [blame] | 533 | |
| 534 | static struct platform_device audio_device = { |
| 535 | .name = "omap-twl4030", |
| 536 | .id = -1, |
Peter Ujfalusi | 552d9dc | 2012-08-14 12:07:57 +0300 | [diff] [blame] | 537 | }; |
| 538 | |
Peter Ujfalusi | 40234bf | 2012-12-05 14:45:23 +0100 | [diff] [blame^] | 539 | void __init omap_twl4030_audio_init(char *card_name, |
| 540 | struct omap_tw4030_pdata *pdata) |
Peter Ujfalusi | 552d9dc | 2012-08-14 12:07:57 +0300 | [diff] [blame] | 541 | { |
Peter Ujfalusi | 40234bf | 2012-12-05 14:45:23 +0100 | [diff] [blame^] | 542 | if (!pdata) |
| 543 | pdata = &omap_twl4030_audio_data; |
| 544 | |
| 545 | pdata->card_name = card_name; |
| 546 | |
| 547 | audio_device.dev.platform_data = pdata; |
Peter Ujfalusi | 552d9dc | 2012-08-14 12:07:57 +0300 | [diff] [blame] | 548 | platform_device_register(&audio_device); |
| 549 | } |
| 550 | |
| 551 | #else /* SOC_OMAP_TWL4030 */ |
Peter Ujfalusi | 40234bf | 2012-12-05 14:45:23 +0100 | [diff] [blame^] | 552 | void __init omap_twl4030_audio_init(char *card_name, |
| 553 | struct omap_tw4030_pdata *pdata) |
Peter Ujfalusi | 552d9dc | 2012-08-14 12:07:57 +0300 | [diff] [blame] | 554 | { |
| 555 | return; |
| 556 | } |
| 557 | #endif /* SOC_OMAP_TWL4030 */ |