| Ganesan Ramalingam | f32671a | 2011-08-23 13:36:10 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights |
| 3 | * reserved. |
| 4 | * |
| 5 | * This software is available to you under a choice of one of two |
| 6 | * licenses. You may choose to be licensed under the terms of the GNU |
| 7 | * General Public License (GPL) Version 2, available from the file |
| 8 | * COPYING in the main directory of this source tree, or the NetLogic |
| 9 | * license below: |
| 10 | * |
| 11 | * Redistribution and use in source and binary forms, with or without |
| 12 | * modification, are permitted provided that the following conditions |
| 13 | * are met: |
| 14 | * |
| 15 | * 1. Redistributions of source code must retain the above copyright |
| 16 | * notice, this list of conditions and the following disclaimer. |
| 17 | * 2. Redistributions in binary form must reproduce the above copyright |
| 18 | * notice, this list of conditions and the following disclaimer in |
| 19 | * the documentation and/or other materials provided with the |
| 20 | * distribution. |
| 21 | * |
| 22 | * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR |
| 23 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 24 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 25 | * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE |
| 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 29 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 30 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 31 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 32 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 33 | */ |
| 34 | |
| 35 | #ifndef ASM_RMI_MSIDEF_H |
| 36 | #define ASM_RMI_MSIDEF_H |
| 37 | |
| 38 | /* |
| 39 | * Constants for Intel APIC based MSI messages. |
| 40 | * Adapted for the RMI XLR using identical defines |
| 41 | */ |
| 42 | |
| 43 | /* |
| 44 | * Shifts for MSI data |
| 45 | */ |
| 46 | |
| 47 | #define MSI_DATA_VECTOR_SHIFT 0 |
| 48 | #define MSI_DATA_VECTOR_MASK 0x000000ff |
| 49 | #define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT) & \ |
| 50 | MSI_DATA_VECTOR_MASK) |
| 51 | |
| 52 | #define MSI_DATA_DELIVERY_MODE_SHIFT 8 |
| 53 | #define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT) |
| 54 | #define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT) |
| 55 | |
| 56 | #define MSI_DATA_LEVEL_SHIFT 14 |
| 57 | #define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT) |
| 58 | #define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT) |
| 59 | |
| 60 | #define MSI_DATA_TRIGGER_SHIFT 15 |
| 61 | #define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT) |
| 62 | #define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT) |
| 63 | |
| 64 | /* |
| 65 | * Shift/mask fields for msi address |
| 66 | */ |
| 67 | |
| 68 | #define MSI_ADDR_BASE_HI 0 |
| 69 | #define MSI_ADDR_BASE_LO 0xfee00000 |
| 70 | |
| 71 | #define MSI_ADDR_DEST_MODE_SHIFT 2 |
| 72 | #define MSI_ADDR_DEST_MODE_PHYSICAL (0 << MSI_ADDR_DEST_MODE_SHIFT) |
| 73 | #define MSI_ADDR_DEST_MODE_LOGICAL (1 << MSI_ADDR_DEST_MODE_SHIFT) |
| 74 | |
| 75 | #define MSI_ADDR_REDIRECTION_SHIFT 3 |
| 76 | #define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT) |
| 77 | #define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT) |
| 78 | |
| 79 | #define MSI_ADDR_DEST_ID_SHIFT 12 |
| 80 | #define MSI_ADDR_DEST_ID_MASK 0x00ffff0 |
| 81 | #define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & \ |
| 82 | MSI_ADDR_DEST_ID_MASK) |
| 83 | |
| 84 | #endif /* ASM_RMI_MSIDEF_H */ |