blob: e76d75c9d1ba5635dbbddf70fc6c53a0c9898afa [file] [log] [blame]
Shawn Guo17723112012-04-28 13:00:50 +08001/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/of_device.h>
15#include <linux/pinctrl/pinctrl.h>
16#include "pinctrl-mxs.h"
17
18enum imx23_pin_enum {
19 GPMI_D00 = PINID(0, 0),
20 GPMI_D01 = PINID(0, 1),
21 GPMI_D02 = PINID(0, 2),
22 GPMI_D03 = PINID(0, 3),
23 GPMI_D04 = PINID(0, 4),
24 GPMI_D05 = PINID(0, 5),
25 GPMI_D06 = PINID(0, 6),
26 GPMI_D07 = PINID(0, 7),
27 GPMI_D08 = PINID(0, 8),
28 GPMI_D09 = PINID(0, 9),
29 GPMI_D10 = PINID(0, 10),
30 GPMI_D11 = PINID(0, 11),
31 GPMI_D12 = PINID(0, 12),
32 GPMI_D13 = PINID(0, 13),
33 GPMI_D14 = PINID(0, 14),
34 GPMI_D15 = PINID(0, 15),
35 GPMI_CLE = PINID(0, 16),
36 GPMI_ALE = PINID(0, 17),
37 GPMI_CE2N = PINID(0, 18),
38 GPMI_RDY0 = PINID(0, 19),
39 GPMI_RDY1 = PINID(0, 20),
40 GPMI_RDY2 = PINID(0, 21),
41 GPMI_RDY3 = PINID(0, 22),
42 GPMI_WPN = PINID(0, 23),
43 GPMI_WRN = PINID(0, 24),
44 GPMI_RDN = PINID(0, 25),
45 AUART1_CTS = PINID(0, 26),
46 AUART1_RTS = PINID(0, 27),
47 AUART1_RX = PINID(0, 28),
48 AUART1_TX = PINID(0, 29),
49 I2C_SCL = PINID(0, 30),
50 I2C_SDA = PINID(0, 31),
51 LCD_D00 = PINID(1, 0),
52 LCD_D01 = PINID(1, 1),
53 LCD_D02 = PINID(1, 2),
54 LCD_D03 = PINID(1, 3),
55 LCD_D04 = PINID(1, 4),
56 LCD_D05 = PINID(1, 5),
57 LCD_D06 = PINID(1, 6),
58 LCD_D07 = PINID(1, 7),
59 LCD_D08 = PINID(1, 8),
60 LCD_D09 = PINID(1, 9),
61 LCD_D10 = PINID(1, 10),
62 LCD_D11 = PINID(1, 11),
63 LCD_D12 = PINID(1, 12),
64 LCD_D13 = PINID(1, 13),
65 LCD_D14 = PINID(1, 14),
66 LCD_D15 = PINID(1, 15),
67 LCD_D16 = PINID(1, 16),
68 LCD_D17 = PINID(1, 17),
69 LCD_RESET = PINID(1, 18),
70 LCD_RS = PINID(1, 19),
71 LCD_WR = PINID(1, 20),
72 LCD_CS = PINID(1, 21),
73 LCD_DOTCK = PINID(1, 22),
74 LCD_ENABLE = PINID(1, 23),
75 LCD_HSYNC = PINID(1, 24),
76 LCD_VSYNC = PINID(1, 25),
77 PWM0 = PINID(1, 26),
78 PWM1 = PINID(1, 27),
79 PWM2 = PINID(1, 28),
80 PWM3 = PINID(1, 29),
81 PWM4 = PINID(1, 30),
82 SSP1_CMD = PINID(2, 0),
83 SSP1_DETECT = PINID(2, 1),
84 SSP1_DATA0 = PINID(2, 2),
85 SSP1_DATA1 = PINID(2, 3),
86 SSP1_DATA2 = PINID(2, 4),
87 SSP1_DATA3 = PINID(2, 5),
88 SSP1_SCK = PINID(2, 6),
89 ROTARYA = PINID(2, 7),
90 ROTARYB = PINID(2, 8),
91 EMI_A00 = PINID(2, 9),
92 EMI_A01 = PINID(2, 10),
93 EMI_A02 = PINID(2, 11),
94 EMI_A03 = PINID(2, 12),
95 EMI_A04 = PINID(2, 13),
96 EMI_A05 = PINID(2, 14),
97 EMI_A06 = PINID(2, 15),
98 EMI_A07 = PINID(2, 16),
99 EMI_A08 = PINID(2, 17),
100 EMI_A09 = PINID(2, 18),
101 EMI_A10 = PINID(2, 19),
102 EMI_A11 = PINID(2, 20),
103 EMI_A12 = PINID(2, 21),
104 EMI_BA0 = PINID(2, 22),
105 EMI_BA1 = PINID(2, 23),
106 EMI_CASN = PINID(2, 24),
107 EMI_CE0N = PINID(2, 25),
108 EMI_CE1N = PINID(2, 26),
109 GPMI_CE1N = PINID(2, 27),
110 GPMI_CE0N = PINID(2, 28),
111 EMI_CKE = PINID(2, 29),
112 EMI_RASN = PINID(2, 30),
113 EMI_WEN = PINID(2, 31),
114 EMI_D00 = PINID(3, 0),
115 EMI_D01 = PINID(3, 1),
116 EMI_D02 = PINID(3, 2),
117 EMI_D03 = PINID(3, 3),
118 EMI_D04 = PINID(3, 4),
119 EMI_D05 = PINID(3, 5),
120 EMI_D06 = PINID(3, 6),
121 EMI_D07 = PINID(3, 7),
122 EMI_D08 = PINID(3, 8),
123 EMI_D09 = PINID(3, 9),
124 EMI_D10 = PINID(3, 10),
125 EMI_D11 = PINID(3, 11),
126 EMI_D12 = PINID(3, 12),
127 EMI_D13 = PINID(3, 13),
128 EMI_D14 = PINID(3, 14),
129 EMI_D15 = PINID(3, 15),
130 EMI_DQM0 = PINID(3, 16),
131 EMI_DQM1 = PINID(3, 17),
132 EMI_DQS0 = PINID(3, 18),
133 EMI_DQS1 = PINID(3, 19),
134 EMI_CLK = PINID(3, 20),
135 EMI_CLKN = PINID(3, 21),
136};
137
138static const struct pinctrl_pin_desc imx23_pins[] = {
139 MXS_PINCTRL_PIN(GPMI_D00),
140 MXS_PINCTRL_PIN(GPMI_D01),
141 MXS_PINCTRL_PIN(GPMI_D02),
142 MXS_PINCTRL_PIN(GPMI_D03),
143 MXS_PINCTRL_PIN(GPMI_D04),
144 MXS_PINCTRL_PIN(GPMI_D05),
145 MXS_PINCTRL_PIN(GPMI_D06),
146 MXS_PINCTRL_PIN(GPMI_D07),
147 MXS_PINCTRL_PIN(GPMI_D08),
148 MXS_PINCTRL_PIN(GPMI_D09),
149 MXS_PINCTRL_PIN(GPMI_D10),
150 MXS_PINCTRL_PIN(GPMI_D11),
151 MXS_PINCTRL_PIN(GPMI_D12),
152 MXS_PINCTRL_PIN(GPMI_D13),
153 MXS_PINCTRL_PIN(GPMI_D14),
154 MXS_PINCTRL_PIN(GPMI_D15),
155 MXS_PINCTRL_PIN(GPMI_CLE),
156 MXS_PINCTRL_PIN(GPMI_ALE),
157 MXS_PINCTRL_PIN(GPMI_CE2N),
158 MXS_PINCTRL_PIN(GPMI_RDY0),
159 MXS_PINCTRL_PIN(GPMI_RDY1),
160 MXS_PINCTRL_PIN(GPMI_RDY2),
161 MXS_PINCTRL_PIN(GPMI_RDY3),
162 MXS_PINCTRL_PIN(GPMI_WPN),
163 MXS_PINCTRL_PIN(GPMI_WRN),
164 MXS_PINCTRL_PIN(GPMI_RDN),
165 MXS_PINCTRL_PIN(AUART1_CTS),
166 MXS_PINCTRL_PIN(AUART1_RTS),
167 MXS_PINCTRL_PIN(AUART1_RX),
168 MXS_PINCTRL_PIN(AUART1_TX),
169 MXS_PINCTRL_PIN(I2C_SCL),
170 MXS_PINCTRL_PIN(I2C_SDA),
171 MXS_PINCTRL_PIN(LCD_D00),
172 MXS_PINCTRL_PIN(LCD_D01),
173 MXS_PINCTRL_PIN(LCD_D02),
174 MXS_PINCTRL_PIN(LCD_D03),
175 MXS_PINCTRL_PIN(LCD_D04),
176 MXS_PINCTRL_PIN(LCD_D05),
177 MXS_PINCTRL_PIN(LCD_D06),
178 MXS_PINCTRL_PIN(LCD_D07),
179 MXS_PINCTRL_PIN(LCD_D08),
180 MXS_PINCTRL_PIN(LCD_D09),
181 MXS_PINCTRL_PIN(LCD_D10),
182 MXS_PINCTRL_PIN(LCD_D11),
183 MXS_PINCTRL_PIN(LCD_D12),
184 MXS_PINCTRL_PIN(LCD_D13),
185 MXS_PINCTRL_PIN(LCD_D14),
186 MXS_PINCTRL_PIN(LCD_D15),
187 MXS_PINCTRL_PIN(LCD_D16),
188 MXS_PINCTRL_PIN(LCD_D17),
189 MXS_PINCTRL_PIN(LCD_RESET),
190 MXS_PINCTRL_PIN(LCD_RS),
191 MXS_PINCTRL_PIN(LCD_WR),
192 MXS_PINCTRL_PIN(LCD_CS),
193 MXS_PINCTRL_PIN(LCD_DOTCK),
194 MXS_PINCTRL_PIN(LCD_ENABLE),
195 MXS_PINCTRL_PIN(LCD_HSYNC),
196 MXS_PINCTRL_PIN(LCD_VSYNC),
197 MXS_PINCTRL_PIN(PWM0),
198 MXS_PINCTRL_PIN(PWM1),
199 MXS_PINCTRL_PIN(PWM2),
200 MXS_PINCTRL_PIN(PWM3),
201 MXS_PINCTRL_PIN(PWM4),
202 MXS_PINCTRL_PIN(SSP1_CMD),
203 MXS_PINCTRL_PIN(SSP1_DETECT),
204 MXS_PINCTRL_PIN(SSP1_DATA0),
205 MXS_PINCTRL_PIN(SSP1_DATA1),
206 MXS_PINCTRL_PIN(SSP1_DATA2),
207 MXS_PINCTRL_PIN(SSP1_DATA3),
208 MXS_PINCTRL_PIN(SSP1_SCK),
209 MXS_PINCTRL_PIN(ROTARYA),
210 MXS_PINCTRL_PIN(ROTARYB),
211 MXS_PINCTRL_PIN(EMI_A00),
212 MXS_PINCTRL_PIN(EMI_A01),
213 MXS_PINCTRL_PIN(EMI_A02),
214 MXS_PINCTRL_PIN(EMI_A03),
215 MXS_PINCTRL_PIN(EMI_A04),
216 MXS_PINCTRL_PIN(EMI_A05),
217 MXS_PINCTRL_PIN(EMI_A06),
218 MXS_PINCTRL_PIN(EMI_A07),
219 MXS_PINCTRL_PIN(EMI_A08),
220 MXS_PINCTRL_PIN(EMI_A09),
221 MXS_PINCTRL_PIN(EMI_A10),
222 MXS_PINCTRL_PIN(EMI_A11),
223 MXS_PINCTRL_PIN(EMI_A12),
224 MXS_PINCTRL_PIN(EMI_BA0),
225 MXS_PINCTRL_PIN(EMI_BA1),
226 MXS_PINCTRL_PIN(EMI_CASN),
227 MXS_PINCTRL_PIN(EMI_CE0N),
228 MXS_PINCTRL_PIN(EMI_CE1N),
229 MXS_PINCTRL_PIN(GPMI_CE1N),
230 MXS_PINCTRL_PIN(GPMI_CE0N),
231 MXS_PINCTRL_PIN(EMI_CKE),
232 MXS_PINCTRL_PIN(EMI_RASN),
233 MXS_PINCTRL_PIN(EMI_WEN),
234 MXS_PINCTRL_PIN(EMI_D00),
235 MXS_PINCTRL_PIN(EMI_D01),
236 MXS_PINCTRL_PIN(EMI_D02),
237 MXS_PINCTRL_PIN(EMI_D03),
238 MXS_PINCTRL_PIN(EMI_D04),
239 MXS_PINCTRL_PIN(EMI_D05),
240 MXS_PINCTRL_PIN(EMI_D06),
241 MXS_PINCTRL_PIN(EMI_D07),
242 MXS_PINCTRL_PIN(EMI_D08),
243 MXS_PINCTRL_PIN(EMI_D09),
244 MXS_PINCTRL_PIN(EMI_D10),
245 MXS_PINCTRL_PIN(EMI_D11),
246 MXS_PINCTRL_PIN(EMI_D12),
247 MXS_PINCTRL_PIN(EMI_D13),
248 MXS_PINCTRL_PIN(EMI_D14),
249 MXS_PINCTRL_PIN(EMI_D15),
250 MXS_PINCTRL_PIN(EMI_DQM0),
251 MXS_PINCTRL_PIN(EMI_DQM1),
252 MXS_PINCTRL_PIN(EMI_DQS0),
253 MXS_PINCTRL_PIN(EMI_DQS1),
254 MXS_PINCTRL_PIN(EMI_CLK),
255 MXS_PINCTRL_PIN(EMI_CLKN),
256};
257
258static struct mxs_regs imx23_regs = {
259 .muxsel = 0x100,
260 .drive = 0x200,
261 .pull = 0x400,
262};
263
264static struct mxs_pinctrl_soc_data imx23_pinctrl_data = {
265 .regs = &imx23_regs,
266 .pins = imx23_pins,
267 .npins = ARRAY_SIZE(imx23_pins),
268};
269
Greg Kroah-Hartman150632b2012-12-21 13:10:23 -0800270static int imx23_pinctrl_probe(struct platform_device *pdev)
Shawn Guo17723112012-04-28 13:00:50 +0800271{
272 return mxs_pinctrl_probe(pdev, &imx23_pinctrl_data);
273}
274
Bill Pemberton99688ed2012-11-19 13:24:27 -0500275static struct of_device_id imx23_pinctrl_of_match[] = {
Shawn Guo17723112012-04-28 13:00:50 +0800276 { .compatible = "fsl,imx23-pinctrl", },
277 { /* sentinel */ }
278};
279MODULE_DEVICE_TABLE(of, imx23_pinctrl_of_match);
280
281static struct platform_driver imx23_pinctrl_driver = {
282 .driver = {
283 .name = "imx23-pinctrl",
284 .owner = THIS_MODULE,
285 .of_match_table = imx23_pinctrl_of_match,
286 },
287 .probe = imx23_pinctrl_probe,
Bill Pemberton2a36f082012-11-19 13:21:27 -0500288 .remove = mxs_pinctrl_remove,
Shawn Guo17723112012-04-28 13:00:50 +0800289};
290
291static int __init imx23_pinctrl_init(void)
292{
293 return platform_driver_register(&imx23_pinctrl_driver);
294}
Shawn Guoc43ba802012-07-19 16:41:10 +0800295postcore_initcall(imx23_pinctrl_init);
Shawn Guo17723112012-04-28 13:00:50 +0800296
297static void __exit imx23_pinctrl_exit(void)
298{
299 platform_driver_unregister(&imx23_pinctrl_driver);
300}
301module_exit(imx23_pinctrl_exit);
302
303MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
304MODULE_DESCRIPTION("Freescale i.MX23 pinctrl driver");
305MODULE_LICENSE("GPL v2");