blob: a6b9c9790d11e6778bd827e32964b38cd627b4b3 [file] [log] [blame]
Jose Abreu42de0472018-04-16 16:08:12 +01001// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2// Copyright (c) 2018 Synopsys, Inc. and/or its affiliates.
3// stmmac HW Interface Callbacks
4
5#ifndef __STMMAC_HWIF_H__
6#define __STMMAC_HWIF_H__
7
Jose Abreu4dbbe8d2018-05-04 10:01:38 +01008#include <linux/netdevice.h>
9
Jose Abreu42de0472018-04-16 16:08:12 +010010#define stmmac_do_void_callback(__priv, __module, __cname, __arg0, __args...) \
11({ \
12 int __result = -EINVAL; \
Jose Abreu4dbbe8d2018-05-04 10:01:38 +010013 if ((__priv)->hw->__module && (__priv)->hw->__module->__cname) { \
Jose Abreu42de0472018-04-16 16:08:12 +010014 (__priv)->hw->__module->__cname((__arg0), ##__args); \
15 __result = 0; \
16 } \
17 __result; \
18})
19#define stmmac_do_callback(__priv, __module, __cname, __arg0, __args...) \
20({ \
21 int __result = -EINVAL; \
Jose Abreu4dbbe8d2018-05-04 10:01:38 +010022 if ((__priv)->hw->__module && (__priv)->hw->__module->__cname) \
Jose Abreu42de0472018-04-16 16:08:12 +010023 __result = (__priv)->hw->__module->__cname((__arg0), ##__args); \
24 __result; \
25})
26
27struct stmmac_extra_stats;
28struct stmmac_safety_stats;
29struct dma_desc;
30struct dma_extended_desc;
31
32/* Descriptors helpers */
33struct stmmac_desc_ops {
34 /* DMA RX descriptor ring initialization */
35 void (*init_rx_desc)(struct dma_desc *p, int disable_rx_ic, int mode,
36 int end);
37 /* DMA TX descriptor ring initialization */
38 void (*init_tx_desc)(struct dma_desc *p, int mode, int end);
39 /* Invoked by the xmit function to prepare the tx descriptor */
40 void (*prepare_tx_desc)(struct dma_desc *p, int is_fs, int len,
41 bool csum_flag, int mode, bool tx_own, bool ls,
42 unsigned int tot_pkt_len);
43 void (*prepare_tso_tx_desc)(struct dma_desc *p, int is_fs, int len1,
44 int len2, bool tx_own, bool ls, unsigned int tcphdrlen,
45 unsigned int tcppayloadlen);
46 /* Set/get the owner of the descriptor */
47 void (*set_tx_owner)(struct dma_desc *p);
48 int (*get_tx_owner)(struct dma_desc *p);
49 /* Clean the tx descriptor as soon as the tx irq is received */
50 void (*release_tx_desc)(struct dma_desc *p, int mode);
51 /* Clear interrupt on tx frame completion. When this bit is
52 * set an interrupt happens as soon as the frame is transmitted */
53 void (*set_tx_ic)(struct dma_desc *p);
54 /* Last tx segment reports the transmit status */
55 int (*get_tx_ls)(struct dma_desc *p);
56 /* Return the transmit status looking at the TDES1 */
57 int (*tx_status)(void *data, struct stmmac_extra_stats *x,
58 struct dma_desc *p, void __iomem *ioaddr);
59 /* Get the buffer size from the descriptor */
60 int (*get_tx_len)(struct dma_desc *p);
61 /* Handle extra events on specific interrupts hw dependent */
62 void (*set_rx_owner)(struct dma_desc *p);
63 /* Get the receive frame size */
64 int (*get_rx_frame_len)(struct dma_desc *p, int rx_coe_type);
65 /* Return the reception status looking at the RDES1 */
66 int (*rx_status)(void *data, struct stmmac_extra_stats *x,
67 struct dma_desc *p);
68 void (*rx_extended_status)(void *data, struct stmmac_extra_stats *x,
69 struct dma_extended_desc *p);
70 /* Set tx timestamp enable bit */
71 void (*enable_tx_timestamp) (struct dma_desc *p);
72 /* get tx timestamp status */
73 int (*get_tx_timestamp_status) (struct dma_desc *p);
74 /* get timestamp value */
75 void (*get_timestamp)(void *desc, u32 ats, u64 *ts);
76 /* get rx timestamp status */
77 int (*get_rx_timestamp_status)(void *desc, void *next_desc, u32 ats);
78 /* Display ring */
79 void (*display_ring)(void *head, unsigned int size, bool rx);
80 /* set MSS via context descriptor */
81 void (*set_mss)(struct dma_desc *p, unsigned int mss);
Jose Abreu68441712018-05-18 14:56:00 +010082 /* set descriptor skbuff address */
83 void (*set_addr)(struct dma_desc *p, dma_addr_t addr);
Jose Abreu44c67f82018-05-18 14:56:01 +010084 /* clear descriptor */
85 void (*clear)(struct dma_desc *p);
Jose Abreu42de0472018-04-16 16:08:12 +010086};
87
88#define stmmac_init_rx_desc(__priv, __args...) \
89 stmmac_do_void_callback(__priv, desc, init_rx_desc, __args)
90#define stmmac_init_tx_desc(__priv, __args...) \
91 stmmac_do_void_callback(__priv, desc, init_tx_desc, __args)
92#define stmmac_prepare_tx_desc(__priv, __args...) \
93 stmmac_do_void_callback(__priv, desc, prepare_tx_desc, __args)
94#define stmmac_prepare_tso_tx_desc(__priv, __args...) \
95 stmmac_do_void_callback(__priv, desc, prepare_tso_tx_desc, __args)
96#define stmmac_set_tx_owner(__priv, __args...) \
97 stmmac_do_void_callback(__priv, desc, set_tx_owner, __args)
98#define stmmac_get_tx_owner(__priv, __args...) \
99 stmmac_do_callback(__priv, desc, get_tx_owner, __args)
100#define stmmac_release_tx_desc(__priv, __args...) \
101 stmmac_do_void_callback(__priv, desc, release_tx_desc, __args)
102#define stmmac_set_tx_ic(__priv, __args...) \
103 stmmac_do_void_callback(__priv, desc, set_tx_ic, __args)
104#define stmmac_get_tx_ls(__priv, __args...) \
105 stmmac_do_callback(__priv, desc, get_tx_ls, __args)
106#define stmmac_tx_status(__priv, __args...) \
107 stmmac_do_callback(__priv, desc, tx_status, __args)
108#define stmmac_get_tx_len(__priv, __args...) \
109 stmmac_do_callback(__priv, desc, get_tx_len, __args)
110#define stmmac_set_rx_owner(__priv, __args...) \
111 stmmac_do_void_callback(__priv, desc, set_rx_owner, __args)
112#define stmmac_get_rx_frame_len(__priv, __args...) \
113 stmmac_do_callback(__priv, desc, get_rx_frame_len, __args)
114#define stmmac_rx_status(__priv, __args...) \
115 stmmac_do_callback(__priv, desc, rx_status, __args)
116#define stmmac_rx_extended_status(__priv, __args...) \
117 stmmac_do_void_callback(__priv, desc, rx_extended_status, __args)
118#define stmmac_enable_tx_timestamp(__priv, __args...) \
119 stmmac_do_void_callback(__priv, desc, enable_tx_timestamp, __args)
120#define stmmac_get_tx_timestamp_status(__priv, __args...) \
121 stmmac_do_callback(__priv, desc, get_tx_timestamp_status, __args)
122#define stmmac_get_timestamp(__priv, __args...) \
123 stmmac_do_void_callback(__priv, desc, get_timestamp, __args)
124#define stmmac_get_rx_timestamp_status(__priv, __args...) \
125 stmmac_do_callback(__priv, desc, get_rx_timestamp_status, __args)
126#define stmmac_display_ring(__priv, __args...) \
127 stmmac_do_void_callback(__priv, desc, display_ring, __args)
128#define stmmac_set_mss(__priv, __args...) \
129 stmmac_do_void_callback(__priv, desc, set_mss, __args)
Jose Abreu68441712018-05-18 14:56:00 +0100130#define stmmac_set_desc_addr(__priv, __args...) \
131 stmmac_do_void_callback(__priv, desc, set_addr, __args)
Jose Abreu44c67f82018-05-18 14:56:01 +0100132#define stmmac_clear_desc(__priv, __args...) \
133 stmmac_do_void_callback(__priv, desc, clear, __args)
Jose Abreu42de0472018-04-16 16:08:12 +0100134
Jose Abreua4e887f2018-04-16 16:08:13 +0100135struct stmmac_dma_cfg;
136struct dma_features;
137
138/* Specific DMA helpers */
139struct stmmac_dma_ops {
140 /* DMA core initialization */
141 int (*reset)(void __iomem *ioaddr);
142 void (*init)(void __iomem *ioaddr, struct stmmac_dma_cfg *dma_cfg,
143 u32 dma_tx, u32 dma_rx, int atds);
144 void (*init_chan)(void __iomem *ioaddr,
145 struct stmmac_dma_cfg *dma_cfg, u32 chan);
146 void (*init_rx_chan)(void __iomem *ioaddr,
147 struct stmmac_dma_cfg *dma_cfg,
148 u32 dma_rx_phy, u32 chan);
149 void (*init_tx_chan)(void __iomem *ioaddr,
150 struct stmmac_dma_cfg *dma_cfg,
151 u32 dma_tx_phy, u32 chan);
152 /* Configure the AXI Bus Mode Register */
153 void (*axi)(void __iomem *ioaddr, struct stmmac_axi *axi);
154 /* Dump DMA registers */
155 void (*dump_regs)(void __iomem *ioaddr, u32 *reg_space);
156 /* Set tx/rx threshold in the csr6 register
157 * An invalid value enables the store-and-forward mode */
158 void (*dma_mode)(void __iomem *ioaddr, int txmode, int rxmode,
159 int rxfifosz);
160 void (*dma_rx_mode)(void __iomem *ioaddr, int mode, u32 channel,
161 int fifosz, u8 qmode);
162 void (*dma_tx_mode)(void __iomem *ioaddr, int mode, u32 channel,
163 int fifosz, u8 qmode);
164 /* To track extra statistic (if supported) */
165 void (*dma_diagnostic_fr) (void *data, struct stmmac_extra_stats *x,
166 void __iomem *ioaddr);
167 void (*enable_dma_transmission) (void __iomem *ioaddr);
168 void (*enable_dma_irq)(void __iomem *ioaddr, u32 chan);
169 void (*disable_dma_irq)(void __iomem *ioaddr, u32 chan);
170 void (*start_tx)(void __iomem *ioaddr, u32 chan);
171 void (*stop_tx)(void __iomem *ioaddr, u32 chan);
172 void (*start_rx)(void __iomem *ioaddr, u32 chan);
173 void (*stop_rx)(void __iomem *ioaddr, u32 chan);
174 int (*dma_interrupt) (void __iomem *ioaddr,
175 struct stmmac_extra_stats *x, u32 chan);
176 /* If supported then get the optional core features */
177 void (*get_hw_feature)(void __iomem *ioaddr,
178 struct dma_features *dma_cap);
179 /* Program the HW RX Watchdog */
180 void (*rx_watchdog)(void __iomem *ioaddr, u32 riwt, u32 number_chan);
181 void (*set_tx_ring_len)(void __iomem *ioaddr, u32 len, u32 chan);
182 void (*set_rx_ring_len)(void __iomem *ioaddr, u32 len, u32 chan);
183 void (*set_rx_tail_ptr)(void __iomem *ioaddr, u32 tail_ptr, u32 chan);
184 void (*set_tx_tail_ptr)(void __iomem *ioaddr, u32 tail_ptr, u32 chan);
185 void (*enable_tso)(void __iomem *ioaddr, bool en, u32 chan);
186};
187
188#define stmmac_reset(__priv, __args...) \
189 stmmac_do_callback(__priv, dma, reset, __args)
190#define stmmac_dma_init(__priv, __args...) \
191 stmmac_do_void_callback(__priv, dma, init, __args)
192#define stmmac_init_chan(__priv, __args...) \
193 stmmac_do_void_callback(__priv, dma, init_chan, __args)
194#define stmmac_init_rx_chan(__priv, __args...) \
195 stmmac_do_void_callback(__priv, dma, init_rx_chan, __args)
196#define stmmac_init_tx_chan(__priv, __args...) \
197 stmmac_do_void_callback(__priv, dma, init_tx_chan, __args)
198#define stmmac_axi(__priv, __args...) \
199 stmmac_do_void_callback(__priv, dma, axi, __args)
200#define stmmac_dump_dma_regs(__priv, __args...) \
201 stmmac_do_void_callback(__priv, dma, dump_regs, __args)
202#define stmmac_dma_mode(__priv, __args...) \
203 stmmac_do_void_callback(__priv, dma, dma_mode, __args)
204#define stmmac_dma_rx_mode(__priv, __args...) \
205 stmmac_do_void_callback(__priv, dma, dma_rx_mode, __args)
206#define stmmac_dma_tx_mode(__priv, __args...) \
207 stmmac_do_void_callback(__priv, dma, dma_tx_mode, __args)
208#define stmmac_dma_diagnostic_fr(__priv, __args...) \
209 stmmac_do_void_callback(__priv, dma, dma_diagnostic_fr, __args)
210#define stmmac_enable_dma_transmission(__priv, __args...) \
211 stmmac_do_void_callback(__priv, dma, enable_dma_transmission, __args)
212#define stmmac_enable_dma_irq(__priv, __args...) \
213 stmmac_do_void_callback(__priv, dma, enable_dma_irq, __args)
214#define stmmac_disable_dma_irq(__priv, __args...) \
215 stmmac_do_void_callback(__priv, dma, disable_dma_irq, __args)
216#define stmmac_start_tx(__priv, __args...) \
217 stmmac_do_void_callback(__priv, dma, start_tx, __args)
218#define stmmac_stop_tx(__priv, __args...) \
219 stmmac_do_void_callback(__priv, dma, stop_tx, __args)
220#define stmmac_start_rx(__priv, __args...) \
221 stmmac_do_void_callback(__priv, dma, start_rx, __args)
222#define stmmac_stop_rx(__priv, __args...) \
223 stmmac_do_void_callback(__priv, dma, stop_rx, __args)
224#define stmmac_dma_interrupt_status(__priv, __args...) \
225 stmmac_do_callback(__priv, dma, dma_interrupt, __args)
226#define stmmac_get_hw_feature(__priv, __args...) \
227 stmmac_do_void_callback(__priv, dma, get_hw_feature, __args)
228#define stmmac_rx_watchdog(__priv, __args...) \
229 stmmac_do_void_callback(__priv, dma, rx_watchdog, __args)
230#define stmmac_set_tx_ring_len(__priv, __args...) \
231 stmmac_do_void_callback(__priv, dma, set_tx_ring_len, __args)
232#define stmmac_set_rx_ring_len(__priv, __args...) \
233 stmmac_do_void_callback(__priv, dma, set_rx_ring_len, __args)
234#define stmmac_set_rx_tail_ptr(__priv, __args...) \
235 stmmac_do_void_callback(__priv, dma, set_rx_tail_ptr, __args)
236#define stmmac_set_tx_tail_ptr(__priv, __args...) \
237 stmmac_do_void_callback(__priv, dma, set_tx_tail_ptr, __args)
238#define stmmac_enable_tso(__priv, __args...) \
239 stmmac_do_void_callback(__priv, dma, enable_tso, __args)
240
Jose Abreuc10d4c82018-04-16 16:08:14 +0100241struct mac_device_info;
242struct net_device;
243struct rgmii_adv;
244struct stmmac_safety_stats;
Jose Abreu4dbbe8d2018-05-04 10:01:38 +0100245struct stmmac_tc_entry;
Jose Abreuc10d4c82018-04-16 16:08:14 +0100246
247/* Helpers to program the MAC core */
248struct stmmac_ops {
249 /* MAC core initialization */
250 void (*core_init)(struct mac_device_info *hw, struct net_device *dev);
251 /* Enable the MAC RX/TX */
252 void (*set_mac)(void __iomem *ioaddr, bool enable);
253 /* Enable and verify that the IPC module is supported */
254 int (*rx_ipc)(struct mac_device_info *hw);
255 /* Enable RX Queues */
256 void (*rx_queue_enable)(struct mac_device_info *hw, u8 mode, u32 queue);
257 /* RX Queues Priority */
258 void (*rx_queue_prio)(struct mac_device_info *hw, u32 prio, u32 queue);
259 /* TX Queues Priority */
260 void (*tx_queue_prio)(struct mac_device_info *hw, u32 prio, u32 queue);
261 /* RX Queues Routing */
262 void (*rx_queue_routing)(struct mac_device_info *hw, u8 packet,
263 u32 queue);
264 /* Program RX Algorithms */
265 void (*prog_mtl_rx_algorithms)(struct mac_device_info *hw, u32 rx_alg);
266 /* Program TX Algorithms */
267 void (*prog_mtl_tx_algorithms)(struct mac_device_info *hw, u32 tx_alg);
268 /* Set MTL TX queues weight */
269 void (*set_mtl_tx_queue_weight)(struct mac_device_info *hw,
270 u32 weight, u32 queue);
271 /* RX MTL queue to RX dma mapping */
272 void (*map_mtl_to_dma)(struct mac_device_info *hw, u32 queue, u32 chan);
273 /* Configure AV Algorithm */
274 void (*config_cbs)(struct mac_device_info *hw, u32 send_slope,
275 u32 idle_slope, u32 high_credit, u32 low_credit,
276 u32 queue);
277 /* Dump MAC registers */
278 void (*dump_regs)(struct mac_device_info *hw, u32 *reg_space);
279 /* Handle extra events on specific interrupts hw dependent */
280 int (*host_irq_status)(struct mac_device_info *hw,
281 struct stmmac_extra_stats *x);
282 /* Handle MTL interrupts */
283 int (*host_mtl_irq_status)(struct mac_device_info *hw, u32 chan);
284 /* Multicast filter setting */
285 void (*set_filter)(struct mac_device_info *hw, struct net_device *dev);
286 /* Flow control setting */
287 void (*flow_ctrl)(struct mac_device_info *hw, unsigned int duplex,
288 unsigned int fc, unsigned int pause_time, u32 tx_cnt);
289 /* Set power management mode (e.g. magic frame) */
290 void (*pmt)(struct mac_device_info *hw, unsigned long mode);
291 /* Set/Get Unicast MAC addresses */
292 void (*set_umac_addr)(struct mac_device_info *hw, unsigned char *addr,
293 unsigned int reg_n);
294 void (*get_umac_addr)(struct mac_device_info *hw, unsigned char *addr,
295 unsigned int reg_n);
296 void (*set_eee_mode)(struct mac_device_info *hw,
297 bool en_tx_lpi_clockgating);
298 void (*reset_eee_mode)(struct mac_device_info *hw);
299 void (*set_eee_timer)(struct mac_device_info *hw, int ls, int tw);
300 void (*set_eee_pls)(struct mac_device_info *hw, int link);
301 void (*debug)(void __iomem *ioaddr, struct stmmac_extra_stats *x,
302 u32 rx_queues, u32 tx_queues);
303 /* PCS calls */
304 void (*pcs_ctrl_ane)(void __iomem *ioaddr, bool ane, bool srgmi_ral,
305 bool loopback);
306 void (*pcs_rane)(void __iomem *ioaddr, bool restart);
307 void (*pcs_get_adv_lp)(void __iomem *ioaddr, struct rgmii_adv *adv);
308 /* Safety Features */
309 int (*safety_feat_config)(void __iomem *ioaddr, unsigned int asp);
310 int (*safety_feat_irq_status)(struct net_device *ndev,
311 void __iomem *ioaddr, unsigned int asp,
312 struct stmmac_safety_stats *stats);
313 int (*safety_feat_dump)(struct stmmac_safety_stats *stats,
314 int index, unsigned long *count, const char **desc);
Jose Abreu4dbbe8d2018-05-04 10:01:38 +0100315 /* Flexible RX Parser */
316 int (*rxp_config)(void __iomem *ioaddr, struct stmmac_tc_entry *entries,
317 unsigned int count);
Jose Abreuc10d4c82018-04-16 16:08:14 +0100318};
319
320#define stmmac_core_init(__priv, __args...) \
321 stmmac_do_void_callback(__priv, mac, core_init, __args)
322#define stmmac_mac_set(__priv, __args...) \
323 stmmac_do_void_callback(__priv, mac, set_mac, __args)
324#define stmmac_rx_ipc(__priv, __args...) \
325 stmmac_do_callback(__priv, mac, rx_ipc, __args)
326#define stmmac_rx_queue_enable(__priv, __args...) \
327 stmmac_do_void_callback(__priv, mac, rx_queue_enable, __args)
328#define stmmac_rx_queue_prio(__priv, __args...) \
329 stmmac_do_void_callback(__priv, mac, rx_queue_prio, __args)
330#define stmmac_tx_queue_prio(__priv, __args...) \
331 stmmac_do_void_callback(__priv, mac, tx_queue_prio, __args)
332#define stmmac_rx_queue_routing(__priv, __args...) \
333 stmmac_do_void_callback(__priv, mac, rx_queue_routing, __args)
334#define stmmac_prog_mtl_rx_algorithms(__priv, __args...) \
335 stmmac_do_void_callback(__priv, mac, prog_mtl_rx_algorithms, __args)
336#define stmmac_prog_mtl_tx_algorithms(__priv, __args...) \
337 stmmac_do_void_callback(__priv, mac, prog_mtl_tx_algorithms, __args)
338#define stmmac_set_mtl_tx_queue_weight(__priv, __args...) \
339 stmmac_do_void_callback(__priv, mac, set_mtl_tx_queue_weight, __args)
340#define stmmac_map_mtl_to_dma(__priv, __args...) \
341 stmmac_do_void_callback(__priv, mac, map_mtl_to_dma, __args)
342#define stmmac_config_cbs(__priv, __args...) \
343 stmmac_do_void_callback(__priv, mac, config_cbs, __args)
344#define stmmac_dump_mac_regs(__priv, __args...) \
345 stmmac_do_void_callback(__priv, mac, dump_regs, __args)
346#define stmmac_host_irq_status(__priv, __args...) \
347 stmmac_do_callback(__priv, mac, host_irq_status, __args)
348#define stmmac_host_mtl_irq_status(__priv, __args...) \
349 stmmac_do_callback(__priv, mac, host_mtl_irq_status, __args)
350#define stmmac_set_filter(__priv, __args...) \
351 stmmac_do_void_callback(__priv, mac, set_filter, __args)
352#define stmmac_flow_ctrl(__priv, __args...) \
353 stmmac_do_void_callback(__priv, mac, flow_ctrl, __args)
354#define stmmac_pmt(__priv, __args...) \
355 stmmac_do_void_callback(__priv, mac, pmt, __args)
356#define stmmac_set_umac_addr(__priv, __args...) \
357 stmmac_do_void_callback(__priv, mac, set_umac_addr, __args)
358#define stmmac_get_umac_addr(__priv, __args...) \
359 stmmac_do_void_callback(__priv, mac, get_umac_addr, __args)
360#define stmmac_set_eee_mode(__priv, __args...) \
361 stmmac_do_void_callback(__priv, mac, set_eee_mode, __args)
362#define stmmac_reset_eee_mode(__priv, __args...) \
363 stmmac_do_void_callback(__priv, mac, reset_eee_mode, __args)
364#define stmmac_set_eee_timer(__priv, __args...) \
365 stmmac_do_void_callback(__priv, mac, set_eee_timer, __args)
366#define stmmac_set_eee_pls(__priv, __args...) \
367 stmmac_do_void_callback(__priv, mac, set_eee_pls, __args)
368#define stmmac_mac_debug(__priv, __args...) \
369 stmmac_do_void_callback(__priv, mac, debug, __args)
370#define stmmac_pcs_ctrl_ane(__priv, __args...) \
371 stmmac_do_void_callback(__priv, mac, pcs_ctrl_ane, __args)
372#define stmmac_pcs_rane(__priv, __args...) \
373 stmmac_do_void_callback(__priv, mac, pcs_rane, __args)
374#define stmmac_pcs_get_adv_lp(__priv, __args...) \
375 stmmac_do_void_callback(__priv, mac, pcs_get_adv_lp, __args)
376#define stmmac_safety_feat_config(__priv, __args...) \
377 stmmac_do_callback(__priv, mac, safety_feat_config, __args)
378#define stmmac_safety_feat_irq_status(__priv, __args...) \
379 stmmac_do_callback(__priv, mac, safety_feat_irq_status, __args)
380#define stmmac_safety_feat_dump(__priv, __args...) \
381 stmmac_do_callback(__priv, mac, safety_feat_dump, __args)
Jose Abreu4dbbe8d2018-05-04 10:01:38 +0100382#define stmmac_rxp_config(__priv, __args...) \
383 stmmac_do_callback(__priv, mac, rxp_config, __args)
Jose Abreuc10d4c82018-04-16 16:08:14 +0100384
Jose Abreucc4c9002018-04-16 16:08:15 +0100385/* PTP and HW Timer helpers */
386struct stmmac_hwtimestamp {
387 void (*config_hw_tstamping) (void __iomem *ioaddr, u32 data);
388 void (*config_sub_second_increment)(void __iomem *ioaddr, u32 ptp_clock,
389 int gmac4, u32 *ssinc);
390 int (*init_systime) (void __iomem *ioaddr, u32 sec, u32 nsec);
391 int (*config_addend) (void __iomem *ioaddr, u32 addend);
392 int (*adjust_systime) (void __iomem *ioaddr, u32 sec, u32 nsec,
393 int add_sub, int gmac4);
394 void (*get_systime) (void __iomem *ioaddr, u64 *systime);
395};
396
397#define stmmac_config_hw_tstamping(__priv, __args...) \
398 stmmac_do_void_callback(__priv, ptp, config_hw_tstamping, __args)
399#define stmmac_config_sub_second_increment(__priv, __args...) \
400 stmmac_do_void_callback(__priv, ptp, config_sub_second_increment, __args)
401#define stmmac_init_systime(__priv, __args...) \
402 stmmac_do_callback(__priv, ptp, init_systime, __args)
403#define stmmac_config_addend(__priv, __args...) \
404 stmmac_do_callback(__priv, ptp, config_addend, __args)
405#define stmmac_adjust_systime(__priv, __args...) \
406 stmmac_do_callback(__priv, ptp, adjust_systime, __args)
407#define stmmac_get_systime(__priv, __args...) \
408 stmmac_do_void_callback(__priv, ptp, get_systime, __args)
409
Jose Abreu2c520b12018-04-16 16:08:16 +0100410/* Helpers to manage the descriptors for chain and ring modes */
411struct stmmac_mode_ops {
412 void (*init) (void *des, dma_addr_t phy_addr, unsigned int size,
413 unsigned int extend_desc);
414 unsigned int (*is_jumbo_frm) (int len, int ehn_desc);
415 int (*jumbo_frm)(void *priv, struct sk_buff *skb, int csum);
416 int (*set_16kib_bfsize)(int mtu);
417 void (*init_desc3)(struct dma_desc *p);
418 void (*refill_desc3) (void *priv, struct dma_desc *p);
419 void (*clean_desc3) (void *priv, struct dma_desc *p);
420};
421
422#define stmmac_mode_init(__priv, __args...) \
423 stmmac_do_void_callback(__priv, mode, init, __args)
424#define stmmac_is_jumbo_frm(__priv, __args...) \
425 stmmac_do_callback(__priv, mode, is_jumbo_frm, __args)
426#define stmmac_jumbo_frm(__priv, __args...) \
427 stmmac_do_callback(__priv, mode, jumbo_frm, __args)
428#define stmmac_set_16kib_bfsize(__priv, __args...) \
429 stmmac_do_callback(__priv, mode, set_16kib_bfsize, __args)
430#define stmmac_init_desc3(__priv, __args...) \
431 stmmac_do_void_callback(__priv, mode, init_desc3, __args)
432#define stmmac_refill_desc3(__priv, __args...) \
433 stmmac_do_void_callback(__priv, mode, refill_desc3, __args)
434#define stmmac_clean_desc3(__priv, __args...) \
435 stmmac_do_void_callback(__priv, mode, clean_desc3, __args)
436
Jose Abreu5f0456b2018-04-23 09:05:15 +0100437struct stmmac_priv;
Jose Abreu4dbbe8d2018-05-04 10:01:38 +0100438struct tc_cls_u32_offload;
439
440struct stmmac_tc_ops {
441 int (*init)(struct stmmac_priv *priv);
442 int (*setup_cls_u32)(struct stmmac_priv *priv,
443 struct tc_cls_u32_offload *cls);
444};
445
446#define stmmac_tc_init(__priv, __args...) \
447 stmmac_do_callback(__priv, tc, init, __args)
448#define stmmac_tc_setup_cls_u32(__priv, __args...) \
449 stmmac_do_callback(__priv, tc, setup_cls_u32, __args)
Jose Abreu5f0456b2018-04-23 09:05:15 +0100450
451extern const struct stmmac_ops dwmac100_ops;
452extern const struct stmmac_dma_ops dwmac100_dma_ops;
453extern const struct stmmac_ops dwmac1000_ops;
454extern const struct stmmac_dma_ops dwmac1000_dma_ops;
455extern const struct stmmac_ops dwmac4_ops;
456extern const struct stmmac_dma_ops dwmac4_dma_ops;
457extern const struct stmmac_ops dwmac410_ops;
458extern const struct stmmac_dma_ops dwmac410_dma_ops;
459extern const struct stmmac_ops dwmac510_ops;
Jose Abreu4dbbe8d2018-05-04 10:01:38 +0100460extern const struct stmmac_tc_ops dwmac510_tc_ops;
Jose Abreu5f0456b2018-04-23 09:05:15 +0100461
462#define GMAC_VERSION 0x00000020 /* GMAC CORE Version */
463#define GMAC4_VERSION 0x00000110 /* GMAC4+ CORE Version */
464
465int stmmac_hwif_init(struct stmmac_priv *priv);
466
Jose Abreu42de0472018-04-16 16:08:12 +0100467#endif /* __STMMAC_HWIF_H__ */