blob: 06d1696b7d03d947466e86616c4c03ee0bde7716 [file] [log] [blame]
Ben Skeggs15907002018-05-08 20:39:47 +10001/*
2 * Copyright 2018 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22#include "wndw.h"
23
24#include <nvif/class.h>
25#include <nvif/cl0002.h>
26
27#include <drm/drm_atomic_helper.h>
28#include "nouveau_bo.h"
29
30static void
31nv50_wndw_ctxdma_del(struct nv50_wndw_ctxdma *ctxdma)
32{
33 nvif_object_fini(&ctxdma->object);
34 list_del(&ctxdma->head);
35 kfree(ctxdma);
36}
37
38static struct nv50_wndw_ctxdma *
39nv50_wndw_ctxdma_new(struct nv50_wndw *wndw, struct nouveau_framebuffer *fb)
40{
41 struct nouveau_drm *drm = nouveau_drm(fb->base.dev);
42 struct nv50_wndw_ctxdma *ctxdma;
43 const u8 kind = fb->nvbo->kind;
44 const u32 handle = 0xfb000000 | kind;
45 struct {
46 struct nv_dma_v0 base;
47 union {
48 struct nv50_dma_v0 nv50;
49 struct gf100_dma_v0 gf100;
50 struct gf119_dma_v0 gf119;
51 };
52 } args = {};
53 u32 argc = sizeof(args.base);
54 int ret;
55
56 list_for_each_entry(ctxdma, &wndw->ctxdma.list, head) {
57 if (ctxdma->object.handle == handle)
58 return ctxdma;
59 }
60
61 if (!(ctxdma = kzalloc(sizeof(*ctxdma), GFP_KERNEL)))
62 return ERR_PTR(-ENOMEM);
63 list_add(&ctxdma->head, &wndw->ctxdma.list);
64
65 args.base.target = NV_DMA_V0_TARGET_VRAM;
66 args.base.access = NV_DMA_V0_ACCESS_RDWR;
67 args.base.start = 0;
68 args.base.limit = drm->client.device.info.ram_user - 1;
69
70 if (drm->client.device.info.chipset < 0x80) {
71 args.nv50.part = NV50_DMA_V0_PART_256;
72 argc += sizeof(args.nv50);
73 } else
74 if (drm->client.device.info.chipset < 0xc0) {
75 args.nv50.part = NV50_DMA_V0_PART_256;
76 args.nv50.kind = kind;
77 argc += sizeof(args.nv50);
78 } else
79 if (drm->client.device.info.chipset < 0xd0) {
80 args.gf100.kind = kind;
81 argc += sizeof(args.gf100);
82 } else {
83 args.gf119.page = GF119_DMA_V0_PAGE_LP;
84 args.gf119.kind = kind;
85 argc += sizeof(args.gf119);
86 }
87
88 ret = nvif_object_init(wndw->ctxdma.parent, handle, NV_DMA_IN_MEMORY,
89 &args, argc, &ctxdma->object);
90 if (ret) {
91 nv50_wndw_ctxdma_del(ctxdma);
92 return ERR_PTR(ret);
93 }
94
95 return ctxdma;
96}
97
98int
99nv50_wndw_wait_armed(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
100{
Ben Skeggsccd27db2018-05-08 20:39:47 +1000101 struct nv50_disp *disp = nv50_disp(wndw->plane.dev);
102 if (asyw->set.ntfy) {
103 return wndw->func->ntfy_wait_begun(disp->sync,
104 asyw->ntfy.offset,
105 wndw->wndw.base.device);
106 }
Ben Skeggs15907002018-05-08 20:39:47 +1000107 return 0;
108}
109
Ben Skeggs53e0a3e2018-05-08 20:39:47 +1000110void
111nv50_wndw_flush_clr(struct nv50_wndw *wndw, u32 *interlock, bool flush,
Ben Skeggs15907002018-05-08 20:39:47 +1000112 struct nv50_wndw_atom *asyw)
113{
Ben Skeggsf88bc9d32018-05-08 20:39:47 +1000114 union nv50_wndw_atom_mask clr = {
115 .mask = asyw->clr.mask & ~(flush ? 0 : asyw->set.mask),
116 };
117 if (clr.sema ) wndw->func-> sema_clr(wndw);
118 if (clr.ntfy ) wndw->func-> ntfy_clr(wndw);
119 if (clr.image) wndw->func->image_clr(wndw);
Ben Skeggs15907002018-05-08 20:39:47 +1000120
Ben Skeggs53e0a3e2018-05-08 20:39:47 +1000121 interlock[wndw->interlock.type] |= wndw->interlock.data;
Ben Skeggs15907002018-05-08 20:39:47 +1000122}
123
Ben Skeggs53e0a3e2018-05-08 20:39:47 +1000124void
125nv50_wndw_flush_set(struct nv50_wndw *wndw, u32 *interlock,
Ben Skeggs15907002018-05-08 20:39:47 +1000126 struct nv50_wndw_atom *asyw)
127{
128 if (interlock) {
129 asyw->image.mode = 0;
130 asyw->image.interval = 1;
131 }
132
133 if (asyw->set.sema ) wndw->func->sema_set (wndw, asyw);
134 if (asyw->set.ntfy ) wndw->func->ntfy_set (wndw, asyw);
135 if (asyw->set.image) wndw->func->image_set(wndw, asyw);
136 if (asyw->set.lut ) wndw->func->lut (wndw, asyw);
137 if (asyw->set.point) {
138 wndw->immd->point(wndw, asyw);
139 wndw->immd->update(wndw, interlock);
140 }
141
Ben Skeggs53e0a3e2018-05-08 20:39:47 +1000142 interlock[wndw->interlock.type] |= wndw->interlock.data;
Ben Skeggs15907002018-05-08 20:39:47 +1000143}
144
Ben Skeggsccd27db2018-05-08 20:39:47 +1000145void
146nv50_wndw_ntfy_enable(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
147{
148 struct nv50_disp *disp = nv50_disp(wndw->plane.dev);
149
150 asyw->ntfy.handle = wndw->wndw.sync.handle;
151 asyw->ntfy.offset = wndw->ntfy;
152 asyw->ntfy.awaken = false;
153 asyw->set.ntfy = true;
154
155 wndw->func->ntfy_reset(disp->sync, wndw->ntfy);
156 wndw->ntfy ^= 0x10;
157}
158
Ben Skeggs15907002018-05-08 20:39:47 +1000159static void
160nv50_wndw_atomic_check_release(struct nv50_wndw *wndw,
161 struct nv50_wndw_atom *asyw,
162 struct nv50_head_atom *asyh)
163{
164 struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev);
165 NV_ATOMIC(drm, "%s release\n", wndw->plane.name);
166 wndw->func->release(wndw, asyw, asyh);
167 asyw->ntfy.handle = 0;
168 asyw->sema.handle = 0;
169}
170
171static int
Ben Skeggs43c181e2018-05-08 20:39:47 +1000172nv50_wndw_atomic_check_acquire_rgb(struct nv50_wndw_atom *asyw)
173{
174 switch (asyw->state.fb->format->format) {
175 case DRM_FORMAT_C8 : asyw->image.format = 0x1e; break;
176 case DRM_FORMAT_XRGB8888 :
177 case DRM_FORMAT_ARGB8888 : asyw->image.format = 0xcf; break;
178 case DRM_FORMAT_RGB565 : asyw->image.format = 0xe8; break;
179 case DRM_FORMAT_XRGB1555 :
180 case DRM_FORMAT_ARGB1555 : asyw->image.format = 0xe9; break;
181 case DRM_FORMAT_XBGR2101010:
182 case DRM_FORMAT_ABGR2101010: asyw->image.format = 0xd1; break;
183 case DRM_FORMAT_XBGR8888 :
184 case DRM_FORMAT_ABGR8888 : asyw->image.format = 0xd5; break;
185 default:
186 WARN_ON(1);
187 return -EINVAL;
188 }
189 return 0;
190}
191
192static int
Ben Skeggs15907002018-05-08 20:39:47 +1000193nv50_wndw_atomic_check_acquire(struct nv50_wndw *wndw,
194 struct nv50_wndw_atom *asyw,
195 struct nv50_head_atom *asyh)
196{
197 struct nouveau_framebuffer *fb = nouveau_framebuffer(asyw->state.fb);
198 struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev);
199 int ret;
200
201 NV_ATOMIC(drm, "%s acquire\n", wndw->plane.name);
202
203 asyw->image.w = fb->base.width;
204 asyw->image.h = fb->base.height;
205 asyw->image.kind = fb->nvbo->kind;
206
Ben Skeggs43c181e2018-05-08 20:39:47 +1000207 ret = nv50_wndw_atomic_check_acquire_rgb(asyw);
208 if (ret)
209 return ret;
210
Ben Skeggs15907002018-05-08 20:39:47 +1000211 if (asyw->image.kind) {
212 asyw->image.layout = 0;
213 if (drm->client.device.info.chipset >= 0xc0)
214 asyw->image.block = fb->nvbo->mode >> 4;
215 else
216 asyw->image.block = fb->nvbo->mode;
Ben Skeggs261fcfa2018-05-08 20:39:47 +1000217 asyw->image.pitch[0] = (fb->base.pitches[0] / 4) << 4;
Ben Skeggs15907002018-05-08 20:39:47 +1000218 } else {
219 asyw->image.layout = 1;
220 asyw->image.block = 0;
Ben Skeggs261fcfa2018-05-08 20:39:47 +1000221 asyw->image.pitch[0] = fb->base.pitches[0];
Ben Skeggs15907002018-05-08 20:39:47 +1000222 }
223
224 ret = wndw->func->acquire(wndw, asyw, asyh);
225 if (ret)
226 return ret;
227
228 if (asyw->set.image) {
Ben Skeggs45a29452018-05-08 20:39:47 +1000229 if (!(asyh->state.pageflip_flags & DRM_MODE_PAGE_FLIP_ASYNC))
230 asyw->image.interval = 1;
Ben Skeggs15907002018-05-08 20:39:47 +1000231 else
232 asyw->image.interval = 0;
Ben Skeggs45a29452018-05-08 20:39:47 +1000233 asyw->image.mode = asyw->image.interval ? 0 : 1;
Ben Skeggs15907002018-05-08 20:39:47 +1000234 }
235
236 return 0;
237}
238
239int
240nv50_wndw_atomic_check(struct drm_plane *plane, struct drm_plane_state *state)
241{
242 struct nouveau_drm *drm = nouveau_drm(plane->dev);
243 struct nv50_wndw *wndw = nv50_wndw(plane);
244 struct nv50_wndw_atom *armw = nv50_wndw_atom(wndw->plane.state);
245 struct nv50_wndw_atom *asyw = nv50_wndw_atom(state);
246 struct nv50_head_atom *harm = NULL, *asyh = NULL;
247 bool varm = false, asyv = false, asym = false;
248 int ret;
249
250 NV_ATOMIC(drm, "%s atomic_check\n", plane->name);
251 if (asyw->state.crtc) {
252 asyh = nv50_head_atom_get(asyw->state.state, asyw->state.crtc);
253 if (IS_ERR(asyh))
254 return PTR_ERR(asyh);
255 asym = drm_atomic_crtc_needs_modeset(&asyh->state);
256 asyv = asyh->state.active;
257 }
258
259 if (armw->state.crtc) {
260 harm = nv50_head_atom_get(asyw->state.state, armw->state.crtc);
261 if (IS_ERR(harm))
262 return PTR_ERR(harm);
263 varm = harm->state.crtc->state->active;
264 }
265
266 if (asyv) {
267 asyw->point.x = asyw->state.crtc_x;
268 asyw->point.y = asyw->state.crtc_y;
269 if (memcmp(&armw->point, &asyw->point, sizeof(asyw->point)))
270 asyw->set.point = true;
271
272 ret = nv50_wndw_atomic_check_acquire(wndw, asyw, asyh);
273 if (ret)
274 return ret;
275 } else
276 if (varm) {
277 nv50_wndw_atomic_check_release(wndw, asyw, harm);
278 } else {
279 return 0;
280 }
281
282 if (!asyv || asym) {
283 asyw->clr.ntfy = armw->ntfy.handle != 0;
284 asyw->clr.sema = armw->sema.handle != 0;
285 if (wndw->func->image_clr)
Ben Skeggs261fcfa2018-05-08 20:39:47 +1000286 asyw->clr.image = armw->image.handle[0] != 0;
Ben Skeggs15907002018-05-08 20:39:47 +1000287 asyw->set.lut = wndw->func->lut && asyv;
288 }
289
290 return 0;
291}
292
293static void
294nv50_wndw_cleanup_fb(struct drm_plane *plane, struct drm_plane_state *old_state)
295{
296 struct nouveau_framebuffer *fb = nouveau_framebuffer(old_state->fb);
297 struct nouveau_drm *drm = nouveau_drm(plane->dev);
298
299 NV_ATOMIC(drm, "%s cleanup: %p\n", plane->name, old_state->fb);
300 if (!old_state->fb)
301 return;
302
303 nouveau_bo_unpin(fb->nvbo);
304}
305
306static int
307nv50_wndw_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state)
308{
309 struct nouveau_framebuffer *fb = nouveau_framebuffer(state->fb);
310 struct nouveau_drm *drm = nouveau_drm(plane->dev);
311 struct nv50_wndw *wndw = nv50_wndw(plane);
312 struct nv50_wndw_atom *asyw = nv50_wndw_atom(state);
313 struct nv50_head_atom *asyh;
314 struct nv50_wndw_ctxdma *ctxdma;
315 int ret;
316
317 NV_ATOMIC(drm, "%s prepare: %p\n", plane->name, state->fb);
318 if (!asyw->state.fb)
319 return 0;
320
321 ret = nouveau_bo_pin(fb->nvbo, TTM_PL_FLAG_VRAM, true);
322 if (ret)
323 return ret;
324
325 ctxdma = nv50_wndw_ctxdma_new(wndw, fb);
326 if (IS_ERR(ctxdma)) {
327 nouveau_bo_unpin(fb->nvbo);
328 return PTR_ERR(ctxdma);
329 }
330
331 asyw->state.fence = reservation_object_get_excl_rcu(fb->nvbo->bo.resv);
Ben Skeggs261fcfa2018-05-08 20:39:47 +1000332 asyw->image.handle[0] = ctxdma->object.handle;
333 asyw->image.offset[0] = fb->nvbo->bo.offset;
Ben Skeggs15907002018-05-08 20:39:47 +1000334
335 if (wndw->func->prepare) {
336 asyh = nv50_head_atom_get(asyw->state.state, asyw->state.crtc);
337 if (IS_ERR(asyh))
338 return PTR_ERR(asyh);
339
340 wndw->func->prepare(wndw, asyh, asyw);
341 }
342
343 return 0;
344}
345
346static const struct drm_plane_helper_funcs
347nv50_wndw_helper = {
348 .prepare_fb = nv50_wndw_prepare_fb,
349 .cleanup_fb = nv50_wndw_cleanup_fb,
350 .atomic_check = nv50_wndw_atomic_check,
351};
352
353static void
354nv50_wndw_atomic_destroy_state(struct drm_plane *plane,
355 struct drm_plane_state *state)
356{
357 struct nv50_wndw_atom *asyw = nv50_wndw_atom(state);
358 __drm_atomic_helper_plane_destroy_state(&asyw->state);
359 kfree(asyw);
360}
361
362static struct drm_plane_state *
363nv50_wndw_atomic_duplicate_state(struct drm_plane *plane)
364{
365 struct nv50_wndw_atom *armw = nv50_wndw_atom(plane->state);
366 struct nv50_wndw_atom *asyw;
367 if (!(asyw = kmalloc(sizeof(*asyw), GFP_KERNEL)))
368 return NULL;
369 __drm_atomic_helper_plane_duplicate_state(plane, &asyw->state);
Ben Skeggs15907002018-05-08 20:39:47 +1000370 asyw->sema = armw->sema;
371 asyw->ntfy = armw->ntfy;
372 asyw->image = armw->image;
373 asyw->point = armw->point;
374 asyw->lut = armw->lut;
375 asyw->clr.mask = 0;
376 asyw->set.mask = 0;
377 return &asyw->state;
378}
379
380static void
381nv50_wndw_reset(struct drm_plane *plane)
382{
383 struct nv50_wndw_atom *asyw;
384
385 if (WARN_ON(!(asyw = kzalloc(sizeof(*asyw), GFP_KERNEL))))
386 return;
387
388 if (plane->state)
389 plane->funcs->atomic_destroy_state(plane, plane->state);
390 plane->state = &asyw->state;
391 plane->state->plane = plane;
392 plane->state->rotation = DRM_MODE_ROTATE_0;
393}
394
395static void
396nv50_wndw_destroy(struct drm_plane *plane)
397{
398 struct nv50_wndw *wndw = nv50_wndw(plane);
399 struct nv50_wndw_ctxdma *ctxdma, *ctxtmp;
400
401 list_for_each_entry_safe(ctxdma, ctxtmp, &wndw->ctxdma.list, head) {
402 nv50_wndw_ctxdma_del(ctxdma);
403 }
404
405 nvif_notify_fini(&wndw->notify);
406 nv50_dmac_destroy(&wndw->wimm);
407 nv50_dmac_destroy(&wndw->wndw);
408 drm_plane_cleanup(&wndw->plane);
409 kfree(wndw);
410}
411
412const struct drm_plane_funcs
413nv50_wndw = {
414 .update_plane = drm_atomic_helper_update_plane,
415 .disable_plane = drm_atomic_helper_disable_plane,
416 .destroy = nv50_wndw_destroy,
417 .reset = nv50_wndw_reset,
418 .atomic_duplicate_state = nv50_wndw_atomic_duplicate_state,
419 .atomic_destroy_state = nv50_wndw_atomic_destroy_state,
420};
421
422static int
423nv50_wndw_notify(struct nvif_notify *notify)
424{
425 return NVIF_NOTIFY_KEEP;
426}
427
428void
429nv50_wndw_fini(struct nv50_wndw *wndw)
430{
431 nvif_notify_put(&wndw->notify);
432}
433
434void
435nv50_wndw_init(struct nv50_wndw *wndw)
436{
437 nvif_notify_get(&wndw->notify);
438}
439
440int
441nv50_wndw_new_(const struct nv50_wndw_func *func, struct drm_device *dev,
442 enum drm_plane_type type, const char *name, int index,
Ben Skeggs53e0a3e2018-05-08 20:39:47 +1000443 const u32 *format, u32 heads,
444 enum nv50_disp_interlock_type interlock_type, u32 interlock_data,
445 struct nv50_wndw **pwndw)
Ben Skeggs15907002018-05-08 20:39:47 +1000446{
447 struct nv50_wndw *wndw;
448 int nformat;
449 int ret;
450
451 if (!(wndw = *pwndw = kzalloc(sizeof(*wndw), GFP_KERNEL)))
452 return -ENOMEM;
453 wndw->func = func;
454 wndw->id = index;
Ben Skeggs53e0a3e2018-05-08 20:39:47 +1000455 wndw->interlock.type = interlock_type;
456 wndw->interlock.data = interlock_data;
457 wndw->ctxdma.parent = &wndw->wndw.base.user;
Ben Skeggs15907002018-05-08 20:39:47 +1000458
459 wndw->ctxdma.parent = &wndw->wndw.base.user;
460 INIT_LIST_HEAD(&wndw->ctxdma.list);
461
462 for (nformat = 0; format[nformat]; nformat++);
463
Ben Skeggs9d6c2fe2018-05-08 20:39:47 +1000464 ret = drm_universal_plane_init(dev, &wndw->plane, heads, &nv50_wndw,
Ben Skeggs15907002018-05-08 20:39:47 +1000465 format, nformat, NULL,
466 type, "%s-%d", name, index);
467 if (ret) {
468 kfree(*pwndw);
469 *pwndw = NULL;
470 return ret;
471 }
472
473 drm_plane_helper_add(&wndw->plane, &nv50_wndw_helper);
474
475 wndw->notify.func = nv50_wndw_notify;
476 return 0;
477}