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Auke Kok9d5c8242008-01-24 02:22:38 -08001/*******************************************************************************
2
3 Intel(R) Gigabit Ethernet Linux driver
Alexander Duyck86d5d382009-02-06 23:23:12 +00004 Copyright(c) 2007-2009 Intel Corporation.
Auke Kok9d5c8242008-01-24 02:22:38 -08005
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#include <linux/module.h>
29#include <linux/types.h>
30#include <linux/init.h>
31#include <linux/vmalloc.h>
32#include <linux/pagemap.h>
33#include <linux/netdevice.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080034#include <linux/ipv6.h>
35#include <net/checksum.h>
36#include <net/ip6_checksum.h>
Patrick Ohlyc6cb0902009-02-12 05:03:42 +000037#include <linux/net_tstamp.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080038#include <linux/mii.h>
39#include <linux/ethtool.h>
40#include <linux/if_vlan.h>
41#include <linux/pci.h>
Alexander Duyckc54106b2008-10-16 21:26:57 -070042#include <linux/pci-aspm.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080043#include <linux/delay.h>
44#include <linux/interrupt.h>
45#include <linux/if_ether.h>
Alexander Duyck40a914f2008-11-27 00:24:37 -080046#include <linux/aer.h>
Jeff Kirsher421e02f2008-10-17 11:08:31 -070047#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -070048#include <linux/dca.h>
49#endif
Auke Kok9d5c8242008-01-24 02:22:38 -080050#include "igb.h"
51
Alexander Duyck86d5d382009-02-06 23:23:12 +000052#define DRV_VERSION "1.3.16-k2"
Auke Kok9d5c8242008-01-24 02:22:38 -080053char igb_driver_name[] = "igb";
54char igb_driver_version[] = DRV_VERSION;
55static const char igb_driver_string[] =
56 "Intel(R) Gigabit Ethernet Network Driver";
Alexander Duyck86d5d382009-02-06 23:23:12 +000057static const char igb_copyright[] = "Copyright (c) 2007-2009 Intel Corporation.";
Auke Kok9d5c8242008-01-24 02:22:38 -080058
Auke Kok9d5c8242008-01-24 02:22:38 -080059static const struct e1000_info *igb_info_tbl[] = {
60 [board_82575] = &e1000_82575_info,
61};
62
63static struct pci_device_id igb_pci_tbl[] = {
Alexander Duyck2d064c02008-07-08 15:10:12 -070064 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
65 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
66 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
Auke Kok9d5c8242008-01-24 02:22:38 -080067 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
68 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
69 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
70 /* required last entry */
71 {0, }
72};
73
74MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
75
76void igb_reset(struct igb_adapter *);
77static int igb_setup_all_tx_resources(struct igb_adapter *);
78static int igb_setup_all_rx_resources(struct igb_adapter *);
79static void igb_free_all_tx_resources(struct igb_adapter *);
80static void igb_free_all_rx_resources(struct igb_adapter *);
Auke Kok9d5c8242008-01-24 02:22:38 -080081void igb_update_stats(struct igb_adapter *);
82static int igb_probe(struct pci_dev *, const struct pci_device_id *);
83static void __devexit igb_remove(struct pci_dev *pdev);
84static int igb_sw_init(struct igb_adapter *);
85static int igb_open(struct net_device *);
86static int igb_close(struct net_device *);
87static void igb_configure_tx(struct igb_adapter *);
88static void igb_configure_rx(struct igb_adapter *);
89static void igb_setup_rctl(struct igb_adapter *);
90static void igb_clean_all_tx_rings(struct igb_adapter *);
91static void igb_clean_all_rx_rings(struct igb_adapter *);
Mitch Williams3b644cf2008-06-27 10:59:48 -070092static void igb_clean_tx_ring(struct igb_ring *);
93static void igb_clean_rx_ring(struct igb_ring *);
Auke Kok9d5c8242008-01-24 02:22:38 -080094static void igb_set_multi(struct net_device *);
95static void igb_update_phy_info(unsigned long);
96static void igb_watchdog(unsigned long);
97static void igb_watchdog_task(struct work_struct *);
98static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
99 struct igb_ring *);
100static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
101static struct net_device_stats *igb_get_stats(struct net_device *);
102static int igb_change_mtu(struct net_device *, int);
103static int igb_set_mac(struct net_device *, void *);
104static irqreturn_t igb_intr(int irq, void *);
105static irqreturn_t igb_intr_msi(int irq, void *);
106static irqreturn_t igb_msix_other(int irq, void *);
107static irqreturn_t igb_msix_rx(int irq, void *);
108static irqreturn_t igb_msix_tx(int irq, void *);
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700109#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700110static void igb_update_rx_dca(struct igb_ring *);
111static void igb_update_tx_dca(struct igb_ring *);
112static void igb_setup_dca(struct igb_adapter *);
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700113#endif /* CONFIG_IGB_DCA */
Mitch Williams3b644cf2008-06-27 10:59:48 -0700114static bool igb_clean_tx_irq(struct igb_ring *);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700115static int igb_poll(struct napi_struct *, int);
Mitch Williams3b644cf2008-06-27 10:59:48 -0700116static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
117static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
Auke Kok9d5c8242008-01-24 02:22:38 -0800118static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
119static void igb_tx_timeout(struct net_device *);
120static void igb_reset_task(struct work_struct *);
121static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
122static void igb_vlan_rx_add_vid(struct net_device *, u16);
123static void igb_vlan_rx_kill_vid(struct net_device *, u16);
124static void igb_restore_vlan(struct igb_adapter *);
125
126static int igb_suspend(struct pci_dev *, pm_message_t);
127#ifdef CONFIG_PM
128static int igb_resume(struct pci_dev *);
129#endif
130static void igb_shutdown(struct pci_dev *);
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700131#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700132static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
133static struct notifier_block dca_notifier = {
134 .notifier_call = igb_notify_dca,
135 .next = NULL,
136 .priority = 0
137};
138#endif
Auke Kok9d5c8242008-01-24 02:22:38 -0800139
140#ifdef CONFIG_NET_POLL_CONTROLLER
141/* for netdump / net console */
142static void igb_netpoll(struct net_device *);
143#endif
144
145static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
146 pci_channel_state_t);
147static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
148static void igb_io_resume(struct pci_dev *);
149
150static struct pci_error_handlers igb_err_handler = {
151 .error_detected = igb_io_error_detected,
152 .slot_reset = igb_io_slot_reset,
153 .resume = igb_io_resume,
154};
155
156
157static struct pci_driver igb_driver = {
158 .name = igb_driver_name,
159 .id_table = igb_pci_tbl,
160 .probe = igb_probe,
161 .remove = __devexit_p(igb_remove),
162#ifdef CONFIG_PM
163 /* Power Managment Hooks */
164 .suspend = igb_suspend,
165 .resume = igb_resume,
166#endif
167 .shutdown = igb_shutdown,
168 .err_handler = &igb_err_handler
169};
170
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700171static int global_quad_port_a; /* global quad port a indication */
172
Auke Kok9d5c8242008-01-24 02:22:38 -0800173MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
174MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
175MODULE_LICENSE("GPL");
176MODULE_VERSION(DRV_VERSION);
177
Patrick Ohly38c845c2009-02-12 05:03:41 +0000178/**
179 * Scale the NIC clock cycle by a large factor so that
180 * relatively small clock corrections can be added or
181 * substracted at each clock tick. The drawbacks of a
182 * large factor are a) that the clock register overflows
183 * more quickly (not such a big deal) and b) that the
184 * increment per tick has to fit into 24 bits.
185 *
186 * Note that
187 * TIMINCA = IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS *
188 * IGB_TSYNC_SCALE
189 * TIMINCA += TIMINCA * adjustment [ppm] / 1e9
190 *
191 * The base scale factor is intentionally a power of two
192 * so that the division in %struct timecounter can be done with
193 * a shift.
194 */
195#define IGB_TSYNC_SHIFT (19)
196#define IGB_TSYNC_SCALE (1<<IGB_TSYNC_SHIFT)
197
198/**
199 * The duration of one clock cycle of the NIC.
200 *
201 * @todo This hard-coded value is part of the specification and might change
202 * in future hardware revisions. Add revision check.
203 */
204#define IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS 16
205
206#if (IGB_TSYNC_SCALE * IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS) >= (1<<24)
207# error IGB_TSYNC_SCALE and/or IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS are too large to fit into TIMINCA
208#endif
209
210/**
211 * igb_read_clock - read raw cycle counter (to be used by time counter)
212 */
213static cycle_t igb_read_clock(const struct cyclecounter *tc)
214{
215 struct igb_adapter *adapter =
216 container_of(tc, struct igb_adapter, cycles);
217 struct e1000_hw *hw = &adapter->hw;
218 u64 stamp;
219
220 stamp = rd32(E1000_SYSTIML);
221 stamp |= (u64)rd32(E1000_SYSTIMH) << 32ULL;
222
223 return stamp;
224}
225
Auke Kok9d5c8242008-01-24 02:22:38 -0800226#ifdef DEBUG
227/**
228 * igb_get_hw_dev_name - return device name string
229 * used by hardware layer to print debugging information
230 **/
231char *igb_get_hw_dev_name(struct e1000_hw *hw)
232{
233 struct igb_adapter *adapter = hw->back;
234 return adapter->netdev->name;
235}
Patrick Ohly38c845c2009-02-12 05:03:41 +0000236
237/**
238 * igb_get_time_str - format current NIC and system time as string
239 */
240static char *igb_get_time_str(struct igb_adapter *adapter,
241 char buffer[160])
242{
243 cycle_t hw = adapter->cycles.read(&adapter->cycles);
244 struct timespec nic = ns_to_timespec(timecounter_read(&adapter->clock));
245 struct timespec sys;
246 struct timespec delta;
247 getnstimeofday(&sys);
248
249 delta = timespec_sub(nic, sys);
250
251 sprintf(buffer,
Patrick Ohly33af6bc2009-02-12 05:03:43 +0000252 "HW %llu, NIC %ld.%09lus, SYS %ld.%09lus, NIC-SYS %lds + %09luns",
253 hw,
Patrick Ohly38c845c2009-02-12 05:03:41 +0000254 (long)nic.tv_sec, nic.tv_nsec,
255 (long)sys.tv_sec, sys.tv_nsec,
256 (long)delta.tv_sec, delta.tv_nsec);
257
258 return buffer;
259}
Auke Kok9d5c8242008-01-24 02:22:38 -0800260#endif
261
262/**
263 * igb_init_module - Driver Registration Routine
264 *
265 * igb_init_module is the first routine called when the driver is
266 * loaded. All it does is register with the PCI subsystem.
267 **/
268static int __init igb_init_module(void)
269{
270 int ret;
271 printk(KERN_INFO "%s - version %s\n",
272 igb_driver_string, igb_driver_version);
273
274 printk(KERN_INFO "%s\n", igb_copyright);
275
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700276 global_quad_port_a = 0;
277
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700278#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700279 dca_register_notify(&dca_notifier);
280#endif
Alexander Duyckbbd98fe2009-01-31 00:52:30 -0800281
282 ret = pci_register_driver(&igb_driver);
Auke Kok9d5c8242008-01-24 02:22:38 -0800283 return ret;
284}
285
286module_init(igb_init_module);
287
288/**
289 * igb_exit_module - Driver Exit Cleanup Routine
290 *
291 * igb_exit_module is called just before the driver is removed
292 * from memory.
293 **/
294static void __exit igb_exit_module(void)
295{
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700296#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700297 dca_unregister_notify(&dca_notifier);
298#endif
Auke Kok9d5c8242008-01-24 02:22:38 -0800299 pci_unregister_driver(&igb_driver);
300}
301
302module_exit(igb_exit_module);
303
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800304#define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
305/**
306 * igb_cache_ring_register - Descriptor ring to register mapping
307 * @adapter: board private structure to initialize
308 *
309 * Once we know the feature-set enabled for the device, we'll cache
310 * the register offset the descriptor ring is assigned to.
311 **/
312static void igb_cache_ring_register(struct igb_adapter *adapter)
313{
314 int i;
315
316 switch (adapter->hw.mac.type) {
317 case e1000_82576:
318 /* The queues are allocated for virtualization such that VF 0
319 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
320 * In order to avoid collision we start at the first free queue
321 * and continue consuming queues in the same sequence
322 */
323 for (i = 0; i < adapter->num_rx_queues; i++)
324 adapter->rx_ring[i].reg_idx = Q_IDX_82576(i);
325 for (i = 0; i < adapter->num_tx_queues; i++)
326 adapter->tx_ring[i].reg_idx = Q_IDX_82576(i);
327 break;
328 case e1000_82575:
329 default:
330 for (i = 0; i < adapter->num_rx_queues; i++)
331 adapter->rx_ring[i].reg_idx = i;
332 for (i = 0; i < adapter->num_tx_queues; i++)
333 adapter->tx_ring[i].reg_idx = i;
334 break;
335 }
336}
337
Auke Kok9d5c8242008-01-24 02:22:38 -0800338/**
339 * igb_alloc_queues - Allocate memory for all rings
340 * @adapter: board private structure to initialize
341 *
342 * We allocate one ring per queue at run-time since we don't know the
343 * number of queues at compile-time.
344 **/
345static int igb_alloc_queues(struct igb_adapter *adapter)
346{
347 int i;
348
349 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
350 sizeof(struct igb_ring), GFP_KERNEL);
351 if (!adapter->tx_ring)
352 return -ENOMEM;
353
354 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
355 sizeof(struct igb_ring), GFP_KERNEL);
356 if (!adapter->rx_ring) {
357 kfree(adapter->tx_ring);
358 return -ENOMEM;
359 }
360
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -0700361 adapter->rx_ring->buddy = adapter->tx_ring;
362
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700363 for (i = 0; i < adapter->num_tx_queues; i++) {
364 struct igb_ring *ring = &(adapter->tx_ring[i]);
Alexander Duyck68fd9912008-11-20 00:48:10 -0800365 ring->count = adapter->tx_ring_count;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700366 ring->adapter = adapter;
367 ring->queue_index = i;
368 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800369 for (i = 0; i < adapter->num_rx_queues; i++) {
370 struct igb_ring *ring = &(adapter->rx_ring[i]);
Alexander Duyck68fd9912008-11-20 00:48:10 -0800371 ring->count = adapter->rx_ring_count;
Auke Kok9d5c8242008-01-24 02:22:38 -0800372 ring->adapter = adapter;
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700373 ring->queue_index = i;
Auke Kok9d5c8242008-01-24 02:22:38 -0800374 ring->itr_register = E1000_ITR;
375
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700376 /* set a default napi handler for each rx_ring */
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700377 netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
Auke Kok9d5c8242008-01-24 02:22:38 -0800378 }
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800379
380 igb_cache_ring_register(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800381 return 0;
382}
383
Alexander Duycka88f10e2008-07-08 15:13:38 -0700384static void igb_free_queues(struct igb_adapter *adapter)
385{
386 int i;
387
388 for (i = 0; i < adapter->num_rx_queues; i++)
389 netif_napi_del(&adapter->rx_ring[i].napi);
390
391 kfree(adapter->tx_ring);
392 kfree(adapter->rx_ring);
393}
394
Auke Kok9d5c8242008-01-24 02:22:38 -0800395#define IGB_N0_QUEUE -1
396static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
397 int tx_queue, int msix_vector)
398{
399 u32 msixbm = 0;
400 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700401 u32 ivar, index;
402
403 switch (hw->mac.type) {
404 case e1000_82575:
Auke Kok9d5c8242008-01-24 02:22:38 -0800405 /* The 82575 assigns vectors using a bitmask, which matches the
406 bitmask for the EICR/EIMS/EIMC registers. To assign one
407 or more queues to a vector, we write the appropriate bits
408 into the MSIXBM register for that vector. */
409 if (rx_queue > IGB_N0_QUEUE) {
410 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
411 adapter->rx_ring[rx_queue].eims_value = msixbm;
412 }
413 if (tx_queue > IGB_N0_QUEUE) {
414 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
415 adapter->tx_ring[tx_queue].eims_value =
416 E1000_EICR_TX_QUEUE0 << tx_queue;
417 }
418 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
Alexander Duyck2d064c02008-07-08 15:10:12 -0700419 break;
420 case e1000_82576:
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800421 /* 82576 uses a table-based method for assigning vectors.
Alexander Duyck2d064c02008-07-08 15:10:12 -0700422 Each queue has a single entry in the table to which we write
423 a vector number along with a "valid" bit. Sadly, the layout
424 of the table is somewhat counterintuitive. */
425 if (rx_queue > IGB_N0_QUEUE) {
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800426 index = (rx_queue >> 1);
Alexander Duyck2d064c02008-07-08 15:10:12 -0700427 ivar = array_rd32(E1000_IVAR0, index);
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800428 if (rx_queue & 0x1) {
Alexander Duyck2d064c02008-07-08 15:10:12 -0700429 /* vector goes into third byte of register */
430 ivar = ivar & 0xFF00FFFF;
431 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800432 } else {
433 /* vector goes into low byte of register */
434 ivar = ivar & 0xFFFFFF00;
435 ivar |= msix_vector | E1000_IVAR_VALID;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700436 }
437 adapter->rx_ring[rx_queue].eims_value= 1 << msix_vector;
438 array_wr32(E1000_IVAR0, index, ivar);
439 }
440 if (tx_queue > IGB_N0_QUEUE) {
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800441 index = (tx_queue >> 1);
Alexander Duyck2d064c02008-07-08 15:10:12 -0700442 ivar = array_rd32(E1000_IVAR0, index);
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800443 if (tx_queue & 0x1) {
Alexander Duyck2d064c02008-07-08 15:10:12 -0700444 /* vector goes into high byte of register */
445 ivar = ivar & 0x00FFFFFF;
446 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800447 } else {
448 /* vector goes into second byte of register */
449 ivar = ivar & 0xFFFF00FF;
450 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700451 }
452 adapter->tx_ring[tx_queue].eims_value= 1 << msix_vector;
453 array_wr32(E1000_IVAR0, index, ivar);
454 }
455 break;
456 default:
457 BUG();
458 break;
459 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800460}
461
462/**
463 * igb_configure_msix - Configure MSI-X hardware
464 *
465 * igb_configure_msix sets up the hardware to properly
466 * generate MSI-X interrupts.
467 **/
468static void igb_configure_msix(struct igb_adapter *adapter)
469{
470 u32 tmp;
471 int i, vector = 0;
472 struct e1000_hw *hw = &adapter->hw;
473
474 adapter->eims_enable_mask = 0;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700475 if (hw->mac.type == e1000_82576)
476 /* Turn on MSI-X capability first, or our settings
477 * won't stick. And it will take days to debug. */
478 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
Alexander Duyckeebbbdb2009-02-06 23:19:29 +0000479 E1000_GPIE_PBA | E1000_GPIE_EIAME |
Alexander Duyck2d064c02008-07-08 15:10:12 -0700480 E1000_GPIE_NSICR);
Auke Kok9d5c8242008-01-24 02:22:38 -0800481
482 for (i = 0; i < adapter->num_tx_queues; i++) {
483 struct igb_ring *tx_ring = &adapter->tx_ring[i];
484 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
485 adapter->eims_enable_mask |= tx_ring->eims_value;
486 if (tx_ring->itr_val)
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -0700487 writel(tx_ring->itr_val,
Auke Kok9d5c8242008-01-24 02:22:38 -0800488 hw->hw_addr + tx_ring->itr_register);
489 else
490 writel(1, hw->hw_addr + tx_ring->itr_register);
491 }
492
493 for (i = 0; i < adapter->num_rx_queues; i++) {
494 struct igb_ring *rx_ring = &adapter->rx_ring[i];
Harvey Harrison25ac3c22008-07-16 12:45:27 -0700495 rx_ring->buddy = NULL;
Auke Kok9d5c8242008-01-24 02:22:38 -0800496 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
497 adapter->eims_enable_mask |= rx_ring->eims_value;
498 if (rx_ring->itr_val)
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -0700499 writel(rx_ring->itr_val,
Auke Kok9d5c8242008-01-24 02:22:38 -0800500 hw->hw_addr + rx_ring->itr_register);
501 else
502 writel(1, hw->hw_addr + rx_ring->itr_register);
503 }
504
505
506 /* set vector for other causes, i.e. link changes */
Alexander Duyck2d064c02008-07-08 15:10:12 -0700507 switch (hw->mac.type) {
508 case e1000_82575:
Auke Kok9d5c8242008-01-24 02:22:38 -0800509 array_wr32(E1000_MSIXBM(0), vector++,
510 E1000_EIMS_OTHER);
511
Auke Kok9d5c8242008-01-24 02:22:38 -0800512 tmp = rd32(E1000_CTRL_EXT);
513 /* enable MSI-X PBA support*/
514 tmp |= E1000_CTRL_EXT_PBA_CLR;
515
516 /* Auto-Mask interrupts upon ICR read. */
517 tmp |= E1000_CTRL_EXT_EIAME;
518 tmp |= E1000_CTRL_EXT_IRCA;
519
520 wr32(E1000_CTRL_EXT, tmp);
521 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700522 adapter->eims_other = E1000_EIMS_OTHER;
Auke Kok9d5c8242008-01-24 02:22:38 -0800523
Alexander Duyck2d064c02008-07-08 15:10:12 -0700524 break;
525
526 case e1000_82576:
527 tmp = (vector++ | E1000_IVAR_VALID) << 8;
528 wr32(E1000_IVAR_MISC, tmp);
529
530 adapter->eims_enable_mask = (1 << (vector)) - 1;
531 adapter->eims_other = 1 << (vector - 1);
532 break;
533 default:
534 /* do nothing, since nothing else supports MSI-X */
535 break;
536 } /* switch (hw->mac.type) */
Auke Kok9d5c8242008-01-24 02:22:38 -0800537 wrfl();
538}
539
540/**
541 * igb_request_msix - Initialize MSI-X interrupts
542 *
543 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
544 * kernel.
545 **/
546static int igb_request_msix(struct igb_adapter *adapter)
547{
548 struct net_device *netdev = adapter->netdev;
549 int i, err = 0, vector = 0;
550
551 vector = 0;
552
553 for (i = 0; i < adapter->num_tx_queues; i++) {
554 struct igb_ring *ring = &(adapter->tx_ring[i]);
Alexander Duyckcb7b48f2008-12-05 15:08:03 -0800555 sprintf(ring->name, "%s-tx-%d", netdev->name, i);
Auke Kok9d5c8242008-01-24 02:22:38 -0800556 err = request_irq(adapter->msix_entries[vector].vector,
557 &igb_msix_tx, 0, ring->name,
558 &(adapter->tx_ring[i]));
559 if (err)
560 goto out;
561 ring->itr_register = E1000_EITR(0) + (vector << 2);
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -0700562 ring->itr_val = 976; /* ~4000 ints/sec */
Auke Kok9d5c8242008-01-24 02:22:38 -0800563 vector++;
564 }
565 for (i = 0; i < adapter->num_rx_queues; i++) {
566 struct igb_ring *ring = &(adapter->rx_ring[i]);
567 if (strlen(netdev->name) < (IFNAMSIZ - 5))
Alexander Duyckcb7b48f2008-12-05 15:08:03 -0800568 sprintf(ring->name, "%s-rx-%d", netdev->name, i);
Auke Kok9d5c8242008-01-24 02:22:38 -0800569 else
570 memcpy(ring->name, netdev->name, IFNAMSIZ);
571 err = request_irq(adapter->msix_entries[vector].vector,
572 &igb_msix_rx, 0, ring->name,
573 &(adapter->rx_ring[i]));
574 if (err)
575 goto out;
576 ring->itr_register = E1000_EITR(0) + (vector << 2);
577 ring->itr_val = adapter->itr;
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700578 /* overwrite the poll routine for MSIX, we've already done
579 * netif_napi_add */
580 ring->napi.poll = &igb_clean_rx_ring_msix;
Auke Kok9d5c8242008-01-24 02:22:38 -0800581 vector++;
582 }
583
584 err = request_irq(adapter->msix_entries[vector].vector,
585 &igb_msix_other, 0, netdev->name, netdev);
586 if (err)
587 goto out;
588
Auke Kok9d5c8242008-01-24 02:22:38 -0800589 igb_configure_msix(adapter);
590 return 0;
591out:
592 return err;
593}
594
595static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
596{
597 if (adapter->msix_entries) {
598 pci_disable_msix(adapter->pdev);
599 kfree(adapter->msix_entries);
600 adapter->msix_entries = NULL;
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700601 } else if (adapter->flags & IGB_FLAG_HAS_MSI)
Auke Kok9d5c8242008-01-24 02:22:38 -0800602 pci_disable_msi(adapter->pdev);
603 return;
604}
605
606
607/**
608 * igb_set_interrupt_capability - set MSI or MSI-X if supported
609 *
610 * Attempt to configure interrupts using the best available
611 * capabilities of the hardware and kernel.
612 **/
613static void igb_set_interrupt_capability(struct igb_adapter *adapter)
614{
615 int err;
616 int numvecs, i;
617
Alexander Duyck83b71802009-02-06 23:15:45 +0000618 /* Number of supported queues. */
619 /* Having more queues than CPUs doesn't make sense. */
620 adapter->num_rx_queues = min_t(u32, IGB_MAX_RX_QUEUES, num_online_cpus());
621 adapter->num_tx_queues = min_t(u32, IGB_MAX_TX_QUEUES, num_online_cpus());
622
Auke Kok9d5c8242008-01-24 02:22:38 -0800623 numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
624 adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
625 GFP_KERNEL);
626 if (!adapter->msix_entries)
627 goto msi_only;
628
629 for (i = 0; i < numvecs; i++)
630 adapter->msix_entries[i].entry = i;
631
632 err = pci_enable_msix(adapter->pdev,
633 adapter->msix_entries,
634 numvecs);
635 if (err == 0)
Alexander Duyck34a20e82008-08-26 04:25:13 -0700636 goto out;
Auke Kok9d5c8242008-01-24 02:22:38 -0800637
638 igb_reset_interrupt_capability(adapter);
639
640 /* If we can't do MSI-X, try MSI */
641msi_only:
642 adapter->num_rx_queues = 1;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700643 adapter->num_tx_queues = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -0800644 if (!pci_enable_msi(adapter->pdev))
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700645 adapter->flags |= IGB_FLAG_HAS_MSI;
Alexander Duyck34a20e82008-08-26 04:25:13 -0700646out:
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700647 /* Notify the stack of the (possibly) reduced Tx Queue count. */
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700648 adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
Auke Kok9d5c8242008-01-24 02:22:38 -0800649 return;
650}
651
652/**
653 * igb_request_irq - initialize interrupts
654 *
655 * Attempts to configure interrupts using the best available
656 * capabilities of the hardware and kernel.
657 **/
658static int igb_request_irq(struct igb_adapter *adapter)
659{
660 struct net_device *netdev = adapter->netdev;
661 struct e1000_hw *hw = &adapter->hw;
662 int err = 0;
663
664 if (adapter->msix_entries) {
665 err = igb_request_msix(adapter);
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700666 if (!err)
Auke Kok9d5c8242008-01-24 02:22:38 -0800667 goto request_done;
Auke Kok9d5c8242008-01-24 02:22:38 -0800668 /* fall back to MSI */
669 igb_reset_interrupt_capability(adapter);
670 if (!pci_enable_msi(adapter->pdev))
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700671 adapter->flags |= IGB_FLAG_HAS_MSI;
Auke Kok9d5c8242008-01-24 02:22:38 -0800672 igb_free_all_tx_resources(adapter);
673 igb_free_all_rx_resources(adapter);
674 adapter->num_rx_queues = 1;
675 igb_alloc_queues(adapter);
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700676 } else {
Alexander Duyck2d064c02008-07-08 15:10:12 -0700677 switch (hw->mac.type) {
678 case e1000_82575:
679 wr32(E1000_MSIXBM(0),
680 (E1000_EICR_RX_QUEUE0 | E1000_EIMS_OTHER));
681 break;
682 case e1000_82576:
683 wr32(E1000_IVAR0, E1000_IVAR_VALID);
684 break;
685 default:
686 break;
687 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800688 }
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700689
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700690 if (adapter->flags & IGB_FLAG_HAS_MSI) {
Auke Kok9d5c8242008-01-24 02:22:38 -0800691 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
692 netdev->name, netdev);
693 if (!err)
694 goto request_done;
695 /* fall back to legacy interrupts */
696 igb_reset_interrupt_capability(adapter);
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700697 adapter->flags &= ~IGB_FLAG_HAS_MSI;
Auke Kok9d5c8242008-01-24 02:22:38 -0800698 }
699
700 err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
701 netdev->name, netdev);
702
Andy Gospodarek6cb5e572008-02-15 14:05:25 -0800703 if (err)
Auke Kok9d5c8242008-01-24 02:22:38 -0800704 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
705 err);
Auke Kok9d5c8242008-01-24 02:22:38 -0800706
707request_done:
708 return err;
709}
710
711static void igb_free_irq(struct igb_adapter *adapter)
712{
713 struct net_device *netdev = adapter->netdev;
714
715 if (adapter->msix_entries) {
716 int vector = 0, i;
717
718 for (i = 0; i < adapter->num_tx_queues; i++)
719 free_irq(adapter->msix_entries[vector++].vector,
720 &(adapter->tx_ring[i]));
721 for (i = 0; i < adapter->num_rx_queues; i++)
722 free_irq(adapter->msix_entries[vector++].vector,
723 &(adapter->rx_ring[i]));
724
725 free_irq(adapter->msix_entries[vector++].vector, netdev);
726 return;
727 }
728
729 free_irq(adapter->pdev->irq, netdev);
730}
731
732/**
733 * igb_irq_disable - Mask off interrupt generation on the NIC
734 * @adapter: board private structure
735 **/
736static void igb_irq_disable(struct igb_adapter *adapter)
737{
738 struct e1000_hw *hw = &adapter->hw;
739
740 if (adapter->msix_entries) {
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700741 wr32(E1000_EIAM, 0);
Auke Kok9d5c8242008-01-24 02:22:38 -0800742 wr32(E1000_EIMC, ~0);
743 wr32(E1000_EIAC, 0);
744 }
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700745
746 wr32(E1000_IAM, 0);
Auke Kok9d5c8242008-01-24 02:22:38 -0800747 wr32(E1000_IMC, ~0);
748 wrfl();
749 synchronize_irq(adapter->pdev->irq);
750}
751
752/**
753 * igb_irq_enable - Enable default interrupt generation settings
754 * @adapter: board private structure
755 **/
756static void igb_irq_enable(struct igb_adapter *adapter)
757{
758 struct e1000_hw *hw = &adapter->hw;
759
760 if (adapter->msix_entries) {
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700761 wr32(E1000_EIAC, adapter->eims_enable_mask);
762 wr32(E1000_EIAM, adapter->eims_enable_mask);
763 wr32(E1000_EIMS, adapter->eims_enable_mask);
Alexander Duyckdda0e082009-02-06 23:19:08 +0000764 wr32(E1000_IMS, E1000_IMS_LSC | E1000_IMS_DOUTSYNC);
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700765 } else {
766 wr32(E1000_IMS, IMS_ENABLE_MASK);
767 wr32(E1000_IAM, IMS_ENABLE_MASK);
768 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800769}
770
771static void igb_update_mng_vlan(struct igb_adapter *adapter)
772{
773 struct net_device *netdev = adapter->netdev;
774 u16 vid = adapter->hw.mng_cookie.vlan_id;
775 u16 old_vid = adapter->mng_vlan_id;
776 if (adapter->vlgrp) {
777 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
778 if (adapter->hw.mng_cookie.status &
779 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
780 igb_vlan_rx_add_vid(netdev, vid);
781 adapter->mng_vlan_id = vid;
782 } else
783 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
784
785 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
786 (vid != old_vid) &&
787 !vlan_group_get_device(adapter->vlgrp, old_vid))
788 igb_vlan_rx_kill_vid(netdev, old_vid);
789 } else
790 adapter->mng_vlan_id = vid;
791 }
792}
793
794/**
795 * igb_release_hw_control - release control of the h/w to f/w
796 * @adapter: address of board private structure
797 *
798 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
799 * For ASF and Pass Through versions of f/w this means that the
800 * driver is no longer loaded.
801 *
802 **/
803static void igb_release_hw_control(struct igb_adapter *adapter)
804{
805 struct e1000_hw *hw = &adapter->hw;
806 u32 ctrl_ext;
807
808 /* Let firmware take over control of h/w */
809 ctrl_ext = rd32(E1000_CTRL_EXT);
810 wr32(E1000_CTRL_EXT,
811 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
812}
813
814
815/**
816 * igb_get_hw_control - get control of the h/w from f/w
817 * @adapter: address of board private structure
818 *
819 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
820 * For ASF and Pass Through versions of f/w this means that
821 * the driver is loaded.
822 *
823 **/
824static void igb_get_hw_control(struct igb_adapter *adapter)
825{
826 struct e1000_hw *hw = &adapter->hw;
827 u32 ctrl_ext;
828
829 /* Let firmware know the driver has taken over */
830 ctrl_ext = rd32(E1000_CTRL_EXT);
831 wr32(E1000_CTRL_EXT,
832 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
833}
834
Auke Kok9d5c8242008-01-24 02:22:38 -0800835/**
836 * igb_configure - configure the hardware for RX and TX
837 * @adapter: private board structure
838 **/
839static void igb_configure(struct igb_adapter *adapter)
840{
841 struct net_device *netdev = adapter->netdev;
842 int i;
843
844 igb_get_hw_control(adapter);
845 igb_set_multi(netdev);
846
847 igb_restore_vlan(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800848
849 igb_configure_tx(adapter);
850 igb_setup_rctl(adapter);
851 igb_configure_rx(adapter);
Alexander Duyck662d7202008-06-27 11:00:29 -0700852
853 igb_rx_fifo_flush_82575(&adapter->hw);
854
Auke Kok9d5c8242008-01-24 02:22:38 -0800855 /* call IGB_DESC_UNUSED which always leaves
856 * at least 1 descriptor unused to make sure
857 * next_to_use != next_to_clean */
858 for (i = 0; i < adapter->num_rx_queues; i++) {
859 struct igb_ring *ring = &adapter->rx_ring[i];
Mitch Williams3b644cf2008-06-27 10:59:48 -0700860 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
Auke Kok9d5c8242008-01-24 02:22:38 -0800861 }
862
863
864 adapter->tx_queue_len = netdev->tx_queue_len;
865}
866
867
868/**
869 * igb_up - Open the interface and prepare it to handle traffic
870 * @adapter: board private structure
871 **/
872
873int igb_up(struct igb_adapter *adapter)
874{
875 struct e1000_hw *hw = &adapter->hw;
876 int i;
877
878 /* hardware has been reset, we need to reload some things */
879 igb_configure(adapter);
880
881 clear_bit(__IGB_DOWN, &adapter->state);
882
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700883 for (i = 0; i < adapter->num_rx_queues; i++)
884 napi_enable(&adapter->rx_ring[i].napi);
885 if (adapter->msix_entries)
Auke Kok9d5c8242008-01-24 02:22:38 -0800886 igb_configure_msix(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800887
888 /* Clear any pending interrupts. */
889 rd32(E1000_ICR);
890 igb_irq_enable(adapter);
891
892 /* Fire a link change interrupt to start the watchdog. */
893 wr32(E1000_ICS, E1000_ICS_LSC);
894 return 0;
895}
896
897void igb_down(struct igb_adapter *adapter)
898{
899 struct e1000_hw *hw = &adapter->hw;
900 struct net_device *netdev = adapter->netdev;
901 u32 tctl, rctl;
902 int i;
903
904 /* signal that we're down so the interrupt handler does not
905 * reschedule our watchdog timer */
906 set_bit(__IGB_DOWN, &adapter->state);
907
908 /* disable receives in the hardware */
909 rctl = rd32(E1000_RCTL);
910 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
911 /* flush and sleep below */
912
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700913 netif_tx_stop_all_queues(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -0800914
915 /* disable transmits in the hardware */
916 tctl = rd32(E1000_TCTL);
917 tctl &= ~E1000_TCTL_EN;
918 wr32(E1000_TCTL, tctl);
919 /* flush both disables and wait for them to finish */
920 wrfl();
921 msleep(10);
922
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700923 for (i = 0; i < adapter->num_rx_queues; i++)
924 napi_disable(&adapter->rx_ring[i].napi);
Auke Kok9d5c8242008-01-24 02:22:38 -0800925
Auke Kok9d5c8242008-01-24 02:22:38 -0800926 igb_irq_disable(adapter);
927
928 del_timer_sync(&adapter->watchdog_timer);
929 del_timer_sync(&adapter->phy_info_timer);
930
931 netdev->tx_queue_len = adapter->tx_queue_len;
932 netif_carrier_off(netdev);
Alexander Duyck04fe6352009-02-06 23:22:32 +0000933
934 /* record the stats before reset*/
935 igb_update_stats(adapter);
936
Auke Kok9d5c8242008-01-24 02:22:38 -0800937 adapter->link_speed = 0;
938 adapter->link_duplex = 0;
939
Jeff Kirsher30236822008-06-24 17:01:15 -0700940 if (!pci_channel_offline(adapter->pdev))
941 igb_reset(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800942 igb_clean_all_tx_rings(adapter);
943 igb_clean_all_rx_rings(adapter);
944}
945
946void igb_reinit_locked(struct igb_adapter *adapter)
947{
948 WARN_ON(in_interrupt());
949 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
950 msleep(1);
951 igb_down(adapter);
952 igb_up(adapter);
953 clear_bit(__IGB_RESETTING, &adapter->state);
954}
955
956void igb_reset(struct igb_adapter *adapter)
957{
958 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700959 struct e1000_mac_info *mac = &hw->mac;
960 struct e1000_fc_info *fc = &hw->fc;
Auke Kok9d5c8242008-01-24 02:22:38 -0800961 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
962 u16 hwm;
963
964 /* Repartition Pba for greater than 9k mtu
965 * To take effect CTRL.RST is required.
966 */
Alexander Duyckfa4dfae2009-02-06 23:21:31 +0000967 switch (mac->type) {
968 case e1000_82576:
Alexander Duyck2d064c02008-07-08 15:10:12 -0700969 pba = E1000_PBA_64K;
Alexander Duyckfa4dfae2009-02-06 23:21:31 +0000970 break;
971 case e1000_82575:
972 default:
973 pba = E1000_PBA_34K;
974 break;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700975 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800976
Alexander Duyck2d064c02008-07-08 15:10:12 -0700977 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
978 (mac->type < e1000_82576)) {
Auke Kok9d5c8242008-01-24 02:22:38 -0800979 /* adjust PBA for jumbo frames */
980 wr32(E1000_PBA, pba);
981
982 /* To maintain wire speed transmits, the Tx FIFO should be
983 * large enough to accommodate two full transmit packets,
984 * rounded up to the next 1KB and expressed in KB. Likewise,
985 * the Rx FIFO should be large enough to accommodate at least
986 * one full receive packet and is similarly rounded up and
987 * expressed in KB. */
988 pba = rd32(E1000_PBA);
989 /* upper 16 bits has Tx packet buffer allocation size in KB */
990 tx_space = pba >> 16;
991 /* lower 16 bits has Rx packet buffer allocation size in KB */
992 pba &= 0xffff;
993 /* the tx fifo also stores 16 bytes of information about the tx
994 * but don't include ethernet FCS because hardware appends it */
995 min_tx_space = (adapter->max_frame_size +
Alexander Duyck85e8d002009-02-16 00:00:20 -0800996 sizeof(union e1000_adv_tx_desc) -
Auke Kok9d5c8242008-01-24 02:22:38 -0800997 ETH_FCS_LEN) * 2;
998 min_tx_space = ALIGN(min_tx_space, 1024);
999 min_tx_space >>= 10;
1000 /* software strips receive CRC, so leave room for it */
1001 min_rx_space = adapter->max_frame_size;
1002 min_rx_space = ALIGN(min_rx_space, 1024);
1003 min_rx_space >>= 10;
1004
1005 /* If current Tx allocation is less than the min Tx FIFO size,
1006 * and the min Tx FIFO size is less than the current Rx FIFO
1007 * allocation, take space away from current Rx allocation */
1008 if (tx_space < min_tx_space &&
1009 ((min_tx_space - tx_space) < pba)) {
1010 pba = pba - (min_tx_space - tx_space);
1011
1012 /* if short on rx space, rx wins and must trump tx
1013 * adjustment */
1014 if (pba < min_rx_space)
1015 pba = min_rx_space;
1016 }
Alexander Duyck2d064c02008-07-08 15:10:12 -07001017 wr32(E1000_PBA, pba);
Auke Kok9d5c8242008-01-24 02:22:38 -08001018 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001019
1020 /* flow control settings */
1021 /* The high water mark must be low enough to fit one full frame
1022 * (or the size used for early receive) above it in the Rx FIFO.
1023 * Set it to the lower of:
1024 * - 90% of the Rx FIFO size, or
1025 * - the full Rx FIFO size minus one full frame */
1026 hwm = min(((pba << 10) * 9 / 10),
Alexander Duyck2d064c02008-07-08 15:10:12 -07001027 ((pba << 10) - 2 * adapter->max_frame_size));
Auke Kok9d5c8242008-01-24 02:22:38 -08001028
Alexander Duyck2d064c02008-07-08 15:10:12 -07001029 if (mac->type < e1000_82576) {
1030 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
1031 fc->low_water = fc->high_water - 8;
1032 } else {
1033 fc->high_water = hwm & 0xFFF0; /* 16-byte granularity */
1034 fc->low_water = fc->high_water - 16;
1035 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001036 fc->pause_time = 0xFFFF;
1037 fc->send_xon = 1;
1038 fc->type = fc->original_type;
1039
1040 /* Allow time for pending master requests to run */
1041 adapter->hw.mac.ops.reset_hw(&adapter->hw);
1042 wr32(E1000_WUC, 0);
1043
1044 if (adapter->hw.mac.ops.init_hw(&adapter->hw))
1045 dev_err(&adapter->pdev->dev, "Hardware Error\n");
1046
1047 igb_update_mng_vlan(adapter);
1048
1049 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1050 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
1051
1052 igb_reset_adaptive(&adapter->hw);
Alexander Duyckf5f4cf02008-11-21 21:30:24 -08001053 igb_get_phy_info(&adapter->hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08001054}
1055
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001056static const struct net_device_ops igb_netdev_ops = {
1057 .ndo_open = igb_open,
1058 .ndo_stop = igb_close,
Stephen Hemminger00829822008-11-20 20:14:53 -08001059 .ndo_start_xmit = igb_xmit_frame_adv,
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001060 .ndo_get_stats = igb_get_stats,
1061 .ndo_set_multicast_list = igb_set_multi,
1062 .ndo_set_mac_address = igb_set_mac,
1063 .ndo_change_mtu = igb_change_mtu,
1064 .ndo_do_ioctl = igb_ioctl,
1065 .ndo_tx_timeout = igb_tx_timeout,
1066 .ndo_validate_addr = eth_validate_addr,
1067 .ndo_vlan_rx_register = igb_vlan_rx_register,
1068 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
1069 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
1070#ifdef CONFIG_NET_POLL_CONTROLLER
1071 .ndo_poll_controller = igb_netpoll,
1072#endif
1073};
1074
Taku Izumi42bfd33a2008-06-20 12:10:30 +09001075/**
Auke Kok9d5c8242008-01-24 02:22:38 -08001076 * igb_probe - Device Initialization Routine
1077 * @pdev: PCI device information struct
1078 * @ent: entry in igb_pci_tbl
1079 *
1080 * Returns 0 on success, negative on failure
1081 *
1082 * igb_probe initializes an adapter identified by a pci_dev structure.
1083 * The OS initialization, configuring of the adapter private structure,
1084 * and a hardware reset occur.
1085 **/
1086static int __devinit igb_probe(struct pci_dev *pdev,
1087 const struct pci_device_id *ent)
1088{
1089 struct net_device *netdev;
1090 struct igb_adapter *adapter;
1091 struct e1000_hw *hw;
Alexander Duyckc54106b2008-10-16 21:26:57 -07001092 struct pci_dev *us_dev;
Auke Kok9d5c8242008-01-24 02:22:38 -08001093 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
1094 unsigned long mmio_start, mmio_len;
Alexander Duyck450c87c2009-02-06 23:22:11 +00001095 int err, pci_using_dac, pos;
Alexander Duyckc54106b2008-10-16 21:26:57 -07001096 u16 eeprom_data = 0, state = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08001097 u16 eeprom_apme_mask = IGB_EEPROM_APME;
1098 u32 part_num;
1099
Alexander Duyckaed5dec2009-02-06 23:16:04 +00001100 err = pci_enable_device_mem(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001101 if (err)
1102 return err;
1103
1104 pci_using_dac = 0;
1105 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1106 if (!err) {
1107 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1108 if (!err)
1109 pci_using_dac = 1;
1110 } else {
1111 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1112 if (err) {
1113 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1114 if (err) {
1115 dev_err(&pdev->dev, "No usable DMA "
1116 "configuration, aborting\n");
1117 goto err_dma;
1118 }
1119 }
1120 }
1121
Alexander Duyckc54106b2008-10-16 21:26:57 -07001122 /* 82575 requires that the pci-e link partner disable the L0s state */
1123 switch (pdev->device) {
1124 case E1000_DEV_ID_82575EB_COPPER:
1125 case E1000_DEV_ID_82575EB_FIBER_SERDES:
1126 case E1000_DEV_ID_82575GB_QUAD_COPPER:
1127 us_dev = pdev->bus->self;
1128 pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
1129 if (pos) {
1130 pci_read_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1131 &state);
1132 state &= ~PCIE_LINK_STATE_L0S;
1133 pci_write_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1134 state);
Bjorn Helgaasac450202008-11-13 06:20:10 +00001135 dev_info(&pdev->dev,
1136 "Disabling ASPM L0s upstream switch port %s\n",
1137 pci_name(us_dev));
Alexander Duyckc54106b2008-10-16 21:26:57 -07001138 }
1139 default:
1140 break;
1141 }
1142
Alexander Duyckaed5dec2009-02-06 23:16:04 +00001143 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
1144 IORESOURCE_MEM),
1145 igb_driver_name);
Auke Kok9d5c8242008-01-24 02:22:38 -08001146 if (err)
1147 goto err_pci_reg;
1148
Jeff Kirsherea943d42008-12-11 20:34:19 -08001149 err = pci_enable_pcie_error_reporting(pdev);
1150 if (err) {
1151 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
1152 "0x%x\n", err);
1153 /* non-fatal, continue */
1154 }
Alexander Duyck40a914f2008-11-27 00:24:37 -08001155
Auke Kok9d5c8242008-01-24 02:22:38 -08001156 pci_set_master(pdev);
Auke Kokc682fc22008-04-23 11:09:34 -07001157 pci_save_state(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001158
1159 err = -ENOMEM;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07001160 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter), IGB_MAX_TX_QUEUES);
Auke Kok9d5c8242008-01-24 02:22:38 -08001161 if (!netdev)
1162 goto err_alloc_etherdev;
1163
1164 SET_NETDEV_DEV(netdev, &pdev->dev);
1165
1166 pci_set_drvdata(pdev, netdev);
1167 adapter = netdev_priv(netdev);
1168 adapter->netdev = netdev;
1169 adapter->pdev = pdev;
1170 hw = &adapter->hw;
1171 hw->back = adapter;
1172 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
1173
1174 mmio_start = pci_resource_start(pdev, 0);
1175 mmio_len = pci_resource_len(pdev, 0);
1176
1177 err = -EIO;
Alexander Duyck28b07592009-02-06 23:20:31 +00001178 hw->hw_addr = ioremap(mmio_start, mmio_len);
1179 if (!hw->hw_addr)
Auke Kok9d5c8242008-01-24 02:22:38 -08001180 goto err_ioremap;
1181
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001182 netdev->netdev_ops = &igb_netdev_ops;
Auke Kok9d5c8242008-01-24 02:22:38 -08001183 igb_set_ethtool_ops(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001184 netdev->watchdog_timeo = 5 * HZ;
Auke Kok9d5c8242008-01-24 02:22:38 -08001185
1186 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1187
1188 netdev->mem_start = mmio_start;
1189 netdev->mem_end = mmio_start + mmio_len;
1190
Auke Kok9d5c8242008-01-24 02:22:38 -08001191 /* PCI config space info */
1192 hw->vendor_id = pdev->vendor;
1193 hw->device_id = pdev->device;
1194 hw->revision_id = pdev->revision;
1195 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1196 hw->subsystem_device_id = pdev->subsystem_device;
1197
1198 /* setup the private structure */
1199 hw->back = adapter;
1200 /* Copy the default MAC, PHY and NVM function pointers */
1201 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1202 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1203 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1204 /* Initialize skew-specific constants */
1205 err = ei->get_invariants(hw);
1206 if (err)
Alexander Duyck450c87c2009-02-06 23:22:11 +00001207 goto err_sw_init;
Auke Kok9d5c8242008-01-24 02:22:38 -08001208
Alexander Duyck450c87c2009-02-06 23:22:11 +00001209 /* setup the private structure */
Auke Kok9d5c8242008-01-24 02:22:38 -08001210 err = igb_sw_init(adapter);
1211 if (err)
1212 goto err_sw_init;
1213
1214 igb_get_bus_info_pcie(hw);
1215
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001216 /* set flags */
1217 switch (hw->mac.type) {
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001218 case e1000_82575:
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001219 adapter->flags |= IGB_FLAG_NEED_CTX_IDX;
1220 break;
Alexander Duyckbbd98fe2009-01-31 00:52:30 -08001221 case e1000_82576:
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001222 default:
1223 break;
1224 }
1225
Auke Kok9d5c8242008-01-24 02:22:38 -08001226 hw->phy.autoneg_wait_to_complete = false;
1227 hw->mac.adaptive_ifs = true;
1228
1229 /* Copper options */
1230 if (hw->phy.media_type == e1000_media_type_copper) {
1231 hw->phy.mdix = AUTO_ALL_MODES;
1232 hw->phy.disable_polarity_correction = false;
1233 hw->phy.ms_type = e1000_ms_hw_default;
1234 }
1235
1236 if (igb_check_reset_block(hw))
1237 dev_info(&pdev->dev,
1238 "PHY reset is blocked due to SOL/IDER session.\n");
1239
1240 netdev->features = NETIF_F_SG |
Alexander Duyck7d8eb292009-02-06 23:18:27 +00001241 NETIF_F_IP_CSUM |
Auke Kok9d5c8242008-01-24 02:22:38 -08001242 NETIF_F_HW_VLAN_TX |
1243 NETIF_F_HW_VLAN_RX |
1244 NETIF_F_HW_VLAN_FILTER;
1245
Alexander Duyck7d8eb292009-02-06 23:18:27 +00001246 netdev->features |= NETIF_F_IPV6_CSUM;
Auke Kok9d5c8242008-01-24 02:22:38 -08001247 netdev->features |= NETIF_F_TSO;
Auke Kok9d5c8242008-01-24 02:22:38 -08001248 netdev->features |= NETIF_F_TSO6;
Jeff Kirsher48f29ff2008-06-05 04:06:27 -07001249
Herbert Xu5c0999b2009-01-19 15:20:57 -08001250 netdev->features |= NETIF_F_GRO;
Alexander Duyckd3352522008-07-08 15:12:13 -07001251
Jeff Kirsher48f29ff2008-06-05 04:06:27 -07001252 netdev->vlan_features |= NETIF_F_TSO;
1253 netdev->vlan_features |= NETIF_F_TSO6;
Alexander Duyck7d8eb292009-02-06 23:18:27 +00001254 netdev->vlan_features |= NETIF_F_IP_CSUM;
Jeff Kirsher48f29ff2008-06-05 04:06:27 -07001255 netdev->vlan_features |= NETIF_F_SG;
1256
Auke Kok9d5c8242008-01-24 02:22:38 -08001257 if (pci_using_dac)
1258 netdev->features |= NETIF_F_HIGHDMA;
1259
Auke Kok9d5c8242008-01-24 02:22:38 -08001260 adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1261
1262 /* before reading the NVM, reset the controller to put the device in a
1263 * known good starting state */
1264 hw->mac.ops.reset_hw(hw);
1265
1266 /* make sure the NVM is good */
1267 if (igb_validate_nvm_checksum(hw) < 0) {
1268 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1269 err = -EIO;
1270 goto err_eeprom;
1271 }
1272
1273 /* copy the MAC address out of the NVM */
1274 if (hw->mac.ops.read_mac_addr(hw))
1275 dev_err(&pdev->dev, "NVM Read Error\n");
1276
1277 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1278 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1279
1280 if (!is_valid_ether_addr(netdev->perm_addr)) {
1281 dev_err(&pdev->dev, "Invalid MAC Address\n");
1282 err = -EIO;
1283 goto err_eeprom;
1284 }
1285
1286 init_timer(&adapter->watchdog_timer);
1287 adapter->watchdog_timer.function = &igb_watchdog;
1288 adapter->watchdog_timer.data = (unsigned long) adapter;
1289
1290 init_timer(&adapter->phy_info_timer);
1291 adapter->phy_info_timer.function = &igb_update_phy_info;
1292 adapter->phy_info_timer.data = (unsigned long) adapter;
1293
1294 INIT_WORK(&adapter->reset_task, igb_reset_task);
1295 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1296
Alexander Duyck450c87c2009-02-06 23:22:11 +00001297 /* Initialize link properties that are user-changeable */
Auke Kok9d5c8242008-01-24 02:22:38 -08001298 adapter->fc_autoneg = true;
1299 hw->mac.autoneg = true;
1300 hw->phy.autoneg_advertised = 0x2f;
1301
1302 hw->fc.original_type = e1000_fc_default;
1303 hw->fc.type = e1000_fc_default;
1304
Alexander Duyckcbd347a2009-02-15 23:59:44 -08001305 adapter->itr_setting = IGB_DEFAULT_ITR;
Auke Kok9d5c8242008-01-24 02:22:38 -08001306 adapter->itr = IGB_START_ITR;
1307
1308 igb_validate_mdi_setting(hw);
1309
1310 adapter->rx_csum = 1;
1311
1312 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1313 * enable the ACPI Magic Packet filter
1314 */
1315
1316 if (hw->bus.func == 0 ||
1317 hw->device_id == E1000_DEV_ID_82575EB_COPPER)
Alexander Duyck312c75a2009-02-06 23:17:47 +00001318 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
Auke Kok9d5c8242008-01-24 02:22:38 -08001319
1320 if (eeprom_data & eeprom_apme_mask)
1321 adapter->eeprom_wol |= E1000_WUFC_MAG;
1322
1323 /* now that we have the eeprom settings, apply the special cases where
1324 * the eeprom may be wrong or the board simply won't support wake on
1325 * lan on a particular port */
1326 switch (pdev->device) {
1327 case E1000_DEV_ID_82575GB_QUAD_COPPER:
1328 adapter->eeprom_wol = 0;
1329 break;
1330 case E1000_DEV_ID_82575EB_FIBER_SERDES:
Alexander Duyck2d064c02008-07-08 15:10:12 -07001331 case E1000_DEV_ID_82576_FIBER:
1332 case E1000_DEV_ID_82576_SERDES:
Auke Kok9d5c8242008-01-24 02:22:38 -08001333 /* Wake events only supported on port A for dual fiber
1334 * regardless of eeprom setting */
1335 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1336 adapter->eeprom_wol = 0;
1337 break;
1338 }
1339
1340 /* initialize the wol settings based on the eeprom settings */
1341 adapter->wol = adapter->eeprom_wol;
\"Rafael J. Wysocki\e1b86d82008-11-07 20:30:37 +00001342 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
Auke Kok9d5c8242008-01-24 02:22:38 -08001343
1344 /* reset the hardware with the new settings */
1345 igb_reset(adapter);
1346
1347 /* let the f/w know that the h/w is now under the control of the
1348 * driver. */
1349 igb_get_hw_control(adapter);
1350
1351 /* tell the stack to leave us alone until igb_open() is called */
1352 netif_carrier_off(netdev);
David S. Millerfd2ea0a2008-07-17 01:56:23 -07001353 netif_tx_stop_all_queues(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001354
1355 strcpy(netdev->name, "eth%d");
1356 err = register_netdev(netdev);
1357 if (err)
1358 goto err_register;
1359
Jeff Kirsher421e02f2008-10-17 11:08:31 -07001360#ifdef CONFIG_IGB_DCA
Alexander Duyckbbd98fe2009-01-31 00:52:30 -08001361 if (dca_add_requester(&pdev->dev) == 0) {
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001362 adapter->flags |= IGB_FLAG_DCA_ENABLED;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001363 dev_info(&pdev->dev, "DCA enabled\n");
1364 /* Always use CB2 mode, difference is masked
1365 * in the CB driver. */
Alexander Duyckcbd347a2009-02-15 23:59:44 -08001366 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001367 igb_setup_dca(adapter);
1368 }
1369#endif
1370
Patrick Ohly38c845c2009-02-12 05:03:41 +00001371 /*
1372 * Initialize hardware timer: we keep it running just in case
1373 * that some program needs it later on.
1374 */
1375 memset(&adapter->cycles, 0, sizeof(adapter->cycles));
1376 adapter->cycles.read = igb_read_clock;
1377 adapter->cycles.mask = CLOCKSOURCE_MASK(64);
1378 adapter->cycles.mult = 1;
1379 adapter->cycles.shift = IGB_TSYNC_SHIFT;
1380 wr32(E1000_TIMINCA,
1381 (1<<24) |
1382 IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS * IGB_TSYNC_SCALE);
1383#if 0
1384 /*
1385 * Avoid rollover while we initialize by resetting the time counter.
1386 */
1387 wr32(E1000_SYSTIML, 0x00000000);
1388 wr32(E1000_SYSTIMH, 0x00000000);
1389#else
1390 /*
1391 * Set registers so that rollover occurs soon to test this.
1392 */
1393 wr32(E1000_SYSTIML, 0x00000000);
1394 wr32(E1000_SYSTIMH, 0xFF800000);
1395#endif
1396 wrfl();
1397 timecounter_init(&adapter->clock,
1398 &adapter->cycles,
1399 ktime_to_ns(ktime_get_real()));
1400
Patrick Ohly33af6bc2009-02-12 05:03:43 +00001401 /*
1402 * Synchronize our NIC clock against system wall clock. NIC
1403 * time stamp reading requires ~3us per sample, each sample
1404 * was pretty stable even under load => only require 10
1405 * samples for each offset comparison.
1406 */
1407 memset(&adapter->compare, 0, sizeof(adapter->compare));
1408 adapter->compare.source = &adapter->clock;
1409 adapter->compare.target = ktime_get_real;
1410 adapter->compare.num_samples = 10;
1411 timecompare_update(&adapter->compare, 0);
1412
Patrick Ohly38c845c2009-02-12 05:03:41 +00001413#ifdef DEBUG
1414 {
1415 char buffer[160];
1416 printk(KERN_DEBUG
1417 "igb: %s: hw %p initialized timer\n",
1418 igb_get_time_str(adapter, buffer),
1419 &adapter->hw);
1420 }
1421#endif
1422
Auke Kok9d5c8242008-01-24 02:22:38 -08001423 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1424 /* print bus type/speed/width info */
Johannes Berg7c510e42008-10-27 17:47:26 -07001425 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
Auke Kok9d5c8242008-01-24 02:22:38 -08001426 netdev->name,
1427 ((hw->bus.speed == e1000_bus_speed_2500)
1428 ? "2.5Gb/s" : "unknown"),
1429 ((hw->bus.width == e1000_bus_width_pcie_x4)
1430 ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1431 ? "Width x1" : "unknown"),
Johannes Berg7c510e42008-10-27 17:47:26 -07001432 netdev->dev_addr);
Auke Kok9d5c8242008-01-24 02:22:38 -08001433
1434 igb_read_part_num(hw, &part_num);
1435 dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1436 (part_num >> 8), (part_num & 0xff));
1437
1438 dev_info(&pdev->dev,
1439 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1440 adapter->msix_entries ? "MSI-X" :
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001441 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
Auke Kok9d5c8242008-01-24 02:22:38 -08001442 adapter->num_rx_queues, adapter->num_tx_queues);
1443
Auke Kok9d5c8242008-01-24 02:22:38 -08001444 return 0;
1445
1446err_register:
1447 igb_release_hw_control(adapter);
1448err_eeprom:
1449 if (!igb_check_reset_block(hw))
Alexander Duyckf5f4cf02008-11-21 21:30:24 -08001450 igb_reset_phy(hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08001451
1452 if (hw->flash_address)
1453 iounmap(hw->flash_address);
1454
Alexander Duycka88f10e2008-07-08 15:13:38 -07001455 igb_free_queues(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001456err_sw_init:
Auke Kok9d5c8242008-01-24 02:22:38 -08001457 iounmap(hw->hw_addr);
1458err_ioremap:
1459 free_netdev(netdev);
1460err_alloc_etherdev:
Alexander Duyckaed5dec2009-02-06 23:16:04 +00001461 pci_release_selected_regions(pdev, pci_select_bars(pdev,
1462 IORESOURCE_MEM));
Auke Kok9d5c8242008-01-24 02:22:38 -08001463err_pci_reg:
1464err_dma:
1465 pci_disable_device(pdev);
1466 return err;
1467}
1468
1469/**
1470 * igb_remove - Device Removal Routine
1471 * @pdev: PCI device information struct
1472 *
1473 * igb_remove is called by the PCI subsystem to alert the driver
1474 * that it should release a PCI device. The could be caused by a
1475 * Hot-Plug event, or because the driver is going to be removed from
1476 * memory.
1477 **/
1478static void __devexit igb_remove(struct pci_dev *pdev)
1479{
1480 struct net_device *netdev = pci_get_drvdata(pdev);
1481 struct igb_adapter *adapter = netdev_priv(netdev);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001482 struct e1000_hw *hw = &adapter->hw;
Jeff Kirsherea943d42008-12-11 20:34:19 -08001483 int err;
Auke Kok9d5c8242008-01-24 02:22:38 -08001484
1485 /* flush_scheduled work may reschedule our watchdog task, so
1486 * explicitly disable watchdog tasks from being rescheduled */
1487 set_bit(__IGB_DOWN, &adapter->state);
1488 del_timer_sync(&adapter->watchdog_timer);
1489 del_timer_sync(&adapter->phy_info_timer);
1490
1491 flush_scheduled_work();
1492
Jeff Kirsher421e02f2008-10-17 11:08:31 -07001493#ifdef CONFIG_IGB_DCA
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001494 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001495 dev_info(&pdev->dev, "DCA disabled\n");
1496 dca_remove_requester(&pdev->dev);
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001497 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
Alexander Duyckcbd347a2009-02-15 23:59:44 -08001498 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001499 }
1500#endif
1501
Auke Kok9d5c8242008-01-24 02:22:38 -08001502 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1503 * would have already happened in close and is redundant. */
1504 igb_release_hw_control(adapter);
1505
1506 unregister_netdev(netdev);
1507
Alexander Duyckf5f4cf02008-11-21 21:30:24 -08001508 if (!igb_check_reset_block(&adapter->hw))
1509 igb_reset_phy(&adapter->hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08001510
Auke Kok9d5c8242008-01-24 02:22:38 -08001511 igb_reset_interrupt_capability(adapter);
1512
Alexander Duycka88f10e2008-07-08 15:13:38 -07001513 igb_free_queues(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001514
Alexander Duyck28b07592009-02-06 23:20:31 +00001515 iounmap(hw->hw_addr);
1516 if (hw->flash_address)
1517 iounmap(hw->flash_address);
Alexander Duyckaed5dec2009-02-06 23:16:04 +00001518 pci_release_selected_regions(pdev, pci_select_bars(pdev,
1519 IORESOURCE_MEM));
Auke Kok9d5c8242008-01-24 02:22:38 -08001520
1521 free_netdev(netdev);
1522
Jeff Kirsherea943d42008-12-11 20:34:19 -08001523 err = pci_disable_pcie_error_reporting(pdev);
1524 if (err)
1525 dev_err(&pdev->dev,
1526 "pci_disable_pcie_error_reporting failed 0x%x\n", err);
Alexander Duyck40a914f2008-11-27 00:24:37 -08001527
Auke Kok9d5c8242008-01-24 02:22:38 -08001528 pci_disable_device(pdev);
1529}
1530
1531/**
1532 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1533 * @adapter: board private structure to initialize
1534 *
1535 * igb_sw_init initializes the Adapter private data structure.
1536 * Fields are initialized based on PCI device information and
1537 * OS network device settings (MTU size).
1538 **/
1539static int __devinit igb_sw_init(struct igb_adapter *adapter)
1540{
1541 struct e1000_hw *hw = &adapter->hw;
1542 struct net_device *netdev = adapter->netdev;
1543 struct pci_dev *pdev = adapter->pdev;
1544
1545 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1546
Alexander Duyck68fd9912008-11-20 00:48:10 -08001547 adapter->tx_ring_count = IGB_DEFAULT_TXD;
1548 adapter->rx_ring_count = IGB_DEFAULT_RXD;
Auke Kok9d5c8242008-01-24 02:22:38 -08001549 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1550 adapter->rx_ps_hdr_size = 0; /* disable packet split */
1551 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1552 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1553
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07001554 /* This call may decrease the number of queues depending on
1555 * interrupt mode. */
Auke Kok9d5c8242008-01-24 02:22:38 -08001556 igb_set_interrupt_capability(adapter);
1557
1558 if (igb_alloc_queues(adapter)) {
1559 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1560 return -ENOMEM;
1561 }
1562
1563 /* Explicitly disable IRQ since the NIC can be in any state. */
1564 igb_irq_disable(adapter);
1565
1566 set_bit(__IGB_DOWN, &adapter->state);
1567 return 0;
1568}
1569
1570/**
1571 * igb_open - Called when a network interface is made active
1572 * @netdev: network interface device structure
1573 *
1574 * Returns 0 on success, negative value on failure
1575 *
1576 * The open entry point is called when a network interface is made
1577 * active by the system (IFF_UP). At this point all resources needed
1578 * for transmit and receive operations are allocated, the interrupt
1579 * handler is registered with the OS, the watchdog timer is started,
1580 * and the stack is notified that the interface is ready.
1581 **/
1582static int igb_open(struct net_device *netdev)
1583{
1584 struct igb_adapter *adapter = netdev_priv(netdev);
1585 struct e1000_hw *hw = &adapter->hw;
1586 int err;
1587 int i;
1588
1589 /* disallow open during test */
1590 if (test_bit(__IGB_TESTING, &adapter->state))
1591 return -EBUSY;
1592
1593 /* allocate transmit descriptors */
1594 err = igb_setup_all_tx_resources(adapter);
1595 if (err)
1596 goto err_setup_tx;
1597
1598 /* allocate receive descriptors */
1599 err = igb_setup_all_rx_resources(adapter);
1600 if (err)
1601 goto err_setup_rx;
1602
1603 /* e1000_power_up_phy(adapter); */
1604
1605 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1606 if ((adapter->hw.mng_cookie.status &
1607 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1608 igb_update_mng_vlan(adapter);
1609
1610 /* before we allocate an interrupt, we must be ready to handle it.
1611 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1612 * as soon as we call pci_request_irq, so we have to setup our
1613 * clean_rx handler before we do so. */
1614 igb_configure(adapter);
1615
1616 err = igb_request_irq(adapter);
1617 if (err)
1618 goto err_req_irq;
1619
1620 /* From here on the code is the same as igb_up() */
1621 clear_bit(__IGB_DOWN, &adapter->state);
1622
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001623 for (i = 0; i < adapter->num_rx_queues; i++)
1624 napi_enable(&adapter->rx_ring[i].napi);
Auke Kok9d5c8242008-01-24 02:22:38 -08001625
1626 /* Clear any pending interrupts. */
1627 rd32(E1000_ICR);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001628
1629 igb_irq_enable(adapter);
1630
Jeff Kirsherd55b53f2008-07-18 04:33:03 -07001631 netif_tx_start_all_queues(netdev);
1632
Auke Kok9d5c8242008-01-24 02:22:38 -08001633 /* Fire a link status change interrupt to start the watchdog. */
1634 wr32(E1000_ICS, E1000_ICS_LSC);
1635
1636 return 0;
1637
1638err_req_irq:
1639 igb_release_hw_control(adapter);
1640 /* e1000_power_down_phy(adapter); */
1641 igb_free_all_rx_resources(adapter);
1642err_setup_rx:
1643 igb_free_all_tx_resources(adapter);
1644err_setup_tx:
1645 igb_reset(adapter);
1646
1647 return err;
1648}
1649
1650/**
1651 * igb_close - Disables a network interface
1652 * @netdev: network interface device structure
1653 *
1654 * Returns 0, this is not allowed to fail
1655 *
1656 * The close entry point is called when an interface is de-activated
1657 * by the OS. The hardware is still under the driver's control, but
1658 * needs to be disabled. A global MAC reset is issued to stop the
1659 * hardware, and all transmit and receive resources are freed.
1660 **/
1661static int igb_close(struct net_device *netdev)
1662{
1663 struct igb_adapter *adapter = netdev_priv(netdev);
1664
1665 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1666 igb_down(adapter);
1667
1668 igb_free_irq(adapter);
1669
1670 igb_free_all_tx_resources(adapter);
1671 igb_free_all_rx_resources(adapter);
1672
1673 /* kill manageability vlan ID if supported, but not if a vlan with
1674 * the same ID is registered on the host OS (let 8021q kill it) */
1675 if ((adapter->hw.mng_cookie.status &
1676 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1677 !(adapter->vlgrp &&
1678 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1679 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1680
1681 return 0;
1682}
1683
1684/**
1685 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1686 * @adapter: board private structure
1687 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1688 *
1689 * Return 0 on success, negative on failure
1690 **/
Auke Kok9d5c8242008-01-24 02:22:38 -08001691int igb_setup_tx_resources(struct igb_adapter *adapter,
1692 struct igb_ring *tx_ring)
1693{
1694 struct pci_dev *pdev = adapter->pdev;
1695 int size;
1696
1697 size = sizeof(struct igb_buffer) * tx_ring->count;
1698 tx_ring->buffer_info = vmalloc(size);
1699 if (!tx_ring->buffer_info)
1700 goto err;
1701 memset(tx_ring->buffer_info, 0, size);
1702
1703 /* round up to nearest 4K */
Alexander Duyck85e8d002009-02-16 00:00:20 -08001704 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
Auke Kok9d5c8242008-01-24 02:22:38 -08001705 tx_ring->size = ALIGN(tx_ring->size, 4096);
1706
1707 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1708 &tx_ring->dma);
1709
1710 if (!tx_ring->desc)
1711 goto err;
1712
1713 tx_ring->adapter = adapter;
1714 tx_ring->next_to_use = 0;
1715 tx_ring->next_to_clean = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08001716 return 0;
1717
1718err:
1719 vfree(tx_ring->buffer_info);
1720 dev_err(&adapter->pdev->dev,
1721 "Unable to allocate memory for the transmit descriptor ring\n");
1722 return -ENOMEM;
1723}
1724
1725/**
1726 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1727 * (Descriptors) for all queues
1728 * @adapter: board private structure
1729 *
1730 * Return 0 on success, negative on failure
1731 **/
1732static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1733{
1734 int i, err = 0;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07001735 int r_idx;
Auke Kok9d5c8242008-01-24 02:22:38 -08001736
1737 for (i = 0; i < adapter->num_tx_queues; i++) {
1738 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1739 if (err) {
1740 dev_err(&adapter->pdev->dev,
1741 "Allocation for Tx Queue %u failed\n", i);
1742 for (i--; i >= 0; i--)
Mitch Williams3b644cf2008-06-27 10:59:48 -07001743 igb_free_tx_resources(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08001744 break;
1745 }
1746 }
1747
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07001748 for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
1749 r_idx = i % adapter->num_tx_queues;
1750 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00001751 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001752 return err;
1753}
1754
1755/**
1756 * igb_configure_tx - Configure transmit Unit after Reset
1757 * @adapter: board private structure
1758 *
1759 * Configure the Tx unit of the MAC after a reset.
1760 **/
1761static void igb_configure_tx(struct igb_adapter *adapter)
1762{
Alexander Duyck0e014cb2008-12-26 01:33:18 -08001763 u64 tdba;
Auke Kok9d5c8242008-01-24 02:22:38 -08001764 struct e1000_hw *hw = &adapter->hw;
1765 u32 tctl;
1766 u32 txdctl, txctrl;
Alexander Duyck26bc19e2008-12-26 01:34:11 -08001767 int i, j;
Auke Kok9d5c8242008-01-24 02:22:38 -08001768
1769 for (i = 0; i < adapter->num_tx_queues; i++) {
Alexander Duyck73cd78f2009-02-12 18:16:59 +00001770 struct igb_ring *ring = &adapter->tx_ring[i];
Alexander Duyck26bc19e2008-12-26 01:34:11 -08001771 j = ring->reg_idx;
1772 wr32(E1000_TDLEN(j),
Alexander Duyck85e8d002009-02-16 00:00:20 -08001773 ring->count * sizeof(union e1000_adv_tx_desc));
Auke Kok9d5c8242008-01-24 02:22:38 -08001774 tdba = ring->dma;
Alexander Duyck26bc19e2008-12-26 01:34:11 -08001775 wr32(E1000_TDBAL(j),
Alexander Duyck73cd78f2009-02-12 18:16:59 +00001776 tdba & 0x00000000ffffffffULL);
Alexander Duyck26bc19e2008-12-26 01:34:11 -08001777 wr32(E1000_TDBAH(j), tdba >> 32);
Auke Kok9d5c8242008-01-24 02:22:38 -08001778
Alexander Duyck26bc19e2008-12-26 01:34:11 -08001779 ring->head = E1000_TDH(j);
1780 ring->tail = E1000_TDT(j);
Auke Kok9d5c8242008-01-24 02:22:38 -08001781 writel(0, hw->hw_addr + ring->tail);
1782 writel(0, hw->hw_addr + ring->head);
Alexander Duyck26bc19e2008-12-26 01:34:11 -08001783 txdctl = rd32(E1000_TXDCTL(j));
Auke Kok9d5c8242008-01-24 02:22:38 -08001784 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
Alexander Duyck26bc19e2008-12-26 01:34:11 -08001785 wr32(E1000_TXDCTL(j), txdctl);
Auke Kok9d5c8242008-01-24 02:22:38 -08001786
1787 /* Turn off Relaxed Ordering on head write-backs. The
1788 * writebacks MUST be delivered in order or it will
1789 * completely screw up our bookeeping.
1790 */
Alexander Duyck26bc19e2008-12-26 01:34:11 -08001791 txctrl = rd32(E1000_DCA_TXCTRL(j));
Auke Kok9d5c8242008-01-24 02:22:38 -08001792 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
Alexander Duyck26bc19e2008-12-26 01:34:11 -08001793 wr32(E1000_DCA_TXCTRL(j), txctrl);
Auke Kok9d5c8242008-01-24 02:22:38 -08001794 }
1795
Auke Kok9d5c8242008-01-24 02:22:38 -08001796 /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1797
1798 /* Program the Transmit Control Register */
1799
1800 tctl = rd32(E1000_TCTL);
1801 tctl &= ~E1000_TCTL_CT;
1802 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1803 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1804
1805 igb_config_collision_dist(hw);
1806
1807 /* Setup Transmit Descriptor Settings for eop descriptor */
1808 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1809
1810 /* Enable transmits */
1811 tctl |= E1000_TCTL_EN;
1812
1813 wr32(E1000_TCTL, tctl);
1814}
1815
1816/**
1817 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1818 * @adapter: board private structure
1819 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1820 *
1821 * Returns 0 on success, negative on failure
1822 **/
Auke Kok9d5c8242008-01-24 02:22:38 -08001823int igb_setup_rx_resources(struct igb_adapter *adapter,
1824 struct igb_ring *rx_ring)
1825{
1826 struct pci_dev *pdev = adapter->pdev;
1827 int size, desc_len;
1828
1829 size = sizeof(struct igb_buffer) * rx_ring->count;
1830 rx_ring->buffer_info = vmalloc(size);
1831 if (!rx_ring->buffer_info)
1832 goto err;
1833 memset(rx_ring->buffer_info, 0, size);
1834
1835 desc_len = sizeof(union e1000_adv_rx_desc);
1836
1837 /* Round up to nearest 4K */
1838 rx_ring->size = rx_ring->count * desc_len;
1839 rx_ring->size = ALIGN(rx_ring->size, 4096);
1840
1841 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1842 &rx_ring->dma);
1843
1844 if (!rx_ring->desc)
1845 goto err;
1846
1847 rx_ring->next_to_clean = 0;
1848 rx_ring->next_to_use = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08001849
1850 rx_ring->adapter = adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08001851
1852 return 0;
1853
1854err:
1855 vfree(rx_ring->buffer_info);
1856 dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1857 "the receive descriptor ring\n");
1858 return -ENOMEM;
1859}
1860
1861/**
1862 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1863 * (Descriptors) for all queues
1864 * @adapter: board private structure
1865 *
1866 * Return 0 on success, negative on failure
1867 **/
1868static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1869{
1870 int i, err = 0;
1871
1872 for (i = 0; i < adapter->num_rx_queues; i++) {
1873 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1874 if (err) {
1875 dev_err(&adapter->pdev->dev,
1876 "Allocation for Rx Queue %u failed\n", i);
1877 for (i--; i >= 0; i--)
Mitch Williams3b644cf2008-06-27 10:59:48 -07001878 igb_free_rx_resources(&adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08001879 break;
1880 }
1881 }
1882
1883 return err;
1884}
1885
1886/**
1887 * igb_setup_rctl - configure the receive control registers
1888 * @adapter: Board private structure
1889 **/
1890static void igb_setup_rctl(struct igb_adapter *adapter)
1891{
1892 struct e1000_hw *hw = &adapter->hw;
1893 u32 rctl;
1894 u32 srrctl = 0;
Alexander Duyck26bc19e2008-12-26 01:34:11 -08001895 int i, j;
Auke Kok9d5c8242008-01-24 02:22:38 -08001896
1897 rctl = rd32(E1000_RCTL);
1898
1899 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
Alexander Duyck69d728b2008-11-25 01:04:03 -08001900 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
Auke Kok9d5c8242008-01-24 02:22:38 -08001901
Alexander Duyck69d728b2008-11-25 01:04:03 -08001902 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
Alexander Duyck28b07592009-02-06 23:20:31 +00001903 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
Auke Kok9d5c8242008-01-24 02:22:38 -08001904
Auke Kok87cb7e82008-07-08 15:08:29 -07001905 /*
1906 * enable stripping of CRC. It's unlikely this will break BMC
1907 * redirection as it did with e1000. Newer features require
1908 * that the HW strips the CRC.
Alexander Duyck73cd78f2009-02-12 18:16:59 +00001909 */
Auke Kok87cb7e82008-07-08 15:08:29 -07001910 rctl |= E1000_RCTL_SECRC;
Auke Kok9d5c8242008-01-24 02:22:38 -08001911
Alexander Duyck9b07f3d32008-11-25 01:03:26 -08001912 /*
Alexander Duyckec54d7d2009-01-31 00:52:57 -08001913 * disable store bad packets and clear size bits.
Alexander Duyck9b07f3d32008-11-25 01:03:26 -08001914 */
Alexander Duyckec54d7d2009-01-31 00:52:57 -08001915 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
Auke Kok9d5c8242008-01-24 02:22:38 -08001916
Alexander Duyckec54d7d2009-01-31 00:52:57 -08001917 /* enable LPE when to prevent packets larger than max_frame_size */
Alexander Duyck9b07f3d32008-11-25 01:03:26 -08001918 rctl |= E1000_RCTL_LPE;
Alexander Duyckb4557be2008-12-10 01:08:59 -08001919
1920 /* Setup buffer sizes */
1921 switch (adapter->rx_buffer_len) {
1922 case IGB_RXBUFFER_256:
1923 rctl |= E1000_RCTL_SZ_256;
1924 break;
1925 case IGB_RXBUFFER_512:
1926 rctl |= E1000_RCTL_SZ_512;
1927 break;
1928 default:
1929 srrctl = ALIGN(adapter->rx_buffer_len, 1024)
1930 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1931 break;
Auke Kok9d5c8242008-01-24 02:22:38 -08001932 }
1933
1934 /* 82575 and greater support packet-split where the protocol
1935 * header is placed in skb->data and the packet data is
1936 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1937 * In the case of a non-split, skb->data is linearly filled,
1938 * followed by the page buffers. Therefore, skb->data is
1939 * sized to hold the largest protocol header.
1940 */
1941 /* allocations using alloc_page take too long for regular MTU
1942 * so only enable packet split for jumbo frames */
Alexander Duyckec54d7d2009-01-31 00:52:57 -08001943 if (adapter->netdev->mtu > ETH_DATA_LEN) {
Auke Kok9d5c8242008-01-24 02:22:38 -08001944 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07001945 srrctl |= adapter->rx_ps_hdr_size <<
Auke Kok9d5c8242008-01-24 02:22:38 -08001946 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
Auke Kok9d5c8242008-01-24 02:22:38 -08001947 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1948 } else {
1949 adapter->rx_ps_hdr_size = 0;
1950 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1951 }
1952
Alexander Duyck26bc19e2008-12-26 01:34:11 -08001953 for (i = 0; i < adapter->num_rx_queues; i++) {
1954 j = adapter->rx_ring[i].reg_idx;
1955 wr32(E1000_SRRCTL(j), srrctl);
1956 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001957
1958 wr32(E1000_RCTL, rctl);
1959}
1960
1961/**
1962 * igb_configure_rx - Configure receive Unit after Reset
1963 * @adapter: board private structure
1964 *
1965 * Configure the Rx unit of the MAC after a reset.
1966 **/
1967static void igb_configure_rx(struct igb_adapter *adapter)
1968{
1969 u64 rdba;
1970 struct e1000_hw *hw = &adapter->hw;
1971 u32 rctl, rxcsum;
1972 u32 rxdctl;
Hannes Eder91075842009-02-18 19:36:04 -08001973 int i;
Auke Kok9d5c8242008-01-24 02:22:38 -08001974
1975 /* disable receives while setting up the descriptors */
1976 rctl = rd32(E1000_RCTL);
1977 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1978 wrfl();
1979 mdelay(10);
1980
1981 if (adapter->itr_setting > 3)
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07001982 wr32(E1000_ITR, adapter->itr);
Auke Kok9d5c8242008-01-24 02:22:38 -08001983
1984 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1985 * the Base and Length of the Rx Descriptor Ring */
1986 for (i = 0; i < adapter->num_rx_queues; i++) {
Alexander Duyck73cd78f2009-02-12 18:16:59 +00001987 struct igb_ring *ring = &adapter->rx_ring[i];
Hannes Eder91075842009-02-18 19:36:04 -08001988 int j = ring->reg_idx;
Auke Kok9d5c8242008-01-24 02:22:38 -08001989 rdba = ring->dma;
Alexander Duyck26bc19e2008-12-26 01:34:11 -08001990 wr32(E1000_RDBAL(j),
Alexander Duyck73cd78f2009-02-12 18:16:59 +00001991 rdba & 0x00000000ffffffffULL);
Alexander Duyck26bc19e2008-12-26 01:34:11 -08001992 wr32(E1000_RDBAH(j), rdba >> 32);
1993 wr32(E1000_RDLEN(j),
Alexander Duyck73cd78f2009-02-12 18:16:59 +00001994 ring->count * sizeof(union e1000_adv_rx_desc));
Auke Kok9d5c8242008-01-24 02:22:38 -08001995
Alexander Duyck26bc19e2008-12-26 01:34:11 -08001996 ring->head = E1000_RDH(j);
1997 ring->tail = E1000_RDT(j);
Auke Kok9d5c8242008-01-24 02:22:38 -08001998 writel(0, hw->hw_addr + ring->tail);
1999 writel(0, hw->hw_addr + ring->head);
2000
Alexander Duyck26bc19e2008-12-26 01:34:11 -08002001 rxdctl = rd32(E1000_RXDCTL(j));
Auke Kok9d5c8242008-01-24 02:22:38 -08002002 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
2003 rxdctl &= 0xFFF00000;
2004 rxdctl |= IGB_RX_PTHRESH;
2005 rxdctl |= IGB_RX_HTHRESH << 8;
2006 rxdctl |= IGB_RX_WTHRESH << 16;
Alexander Duyck26bc19e2008-12-26 01:34:11 -08002007 wr32(E1000_RXDCTL(j), rxdctl);
Auke Kok9d5c8242008-01-24 02:22:38 -08002008 }
2009
2010 if (adapter->num_rx_queues > 1) {
2011 u32 random[10];
2012 u32 mrqc;
2013 u32 j, shift;
2014 union e1000_reta {
2015 u32 dword;
2016 u8 bytes[4];
2017 } reta;
2018
2019 get_random_bytes(&random[0], 40);
2020
Alexander Duyck2d064c02008-07-08 15:10:12 -07002021 if (hw->mac.type >= e1000_82576)
2022 shift = 0;
2023 else
2024 shift = 6;
Auke Kok9d5c8242008-01-24 02:22:38 -08002025 for (j = 0; j < (32 * 4); j++) {
2026 reta.bytes[j & 3] =
Alexander Duyck26bc19e2008-12-26 01:34:11 -08002027 adapter->rx_ring[(j % adapter->num_rx_queues)].reg_idx << shift;
Auke Kok9d5c8242008-01-24 02:22:38 -08002028 if ((j & 3) == 3)
2029 writel(reta.dword,
2030 hw->hw_addr + E1000_RETA(0) + (j & ~3));
2031 }
2032 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
2033
2034 /* Fill out hash function seeds */
2035 for (j = 0; j < 10; j++)
2036 array_wr32(E1000_RSSRK(0), j, random[j]);
2037
2038 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
2039 E1000_MRQC_RSS_FIELD_IPV4_TCP);
2040 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
2041 E1000_MRQC_RSS_FIELD_IPV6_TCP);
2042 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
2043 E1000_MRQC_RSS_FIELD_IPV6_UDP);
2044 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
2045 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
2046
2047
2048 wr32(E1000_MRQC, mrqc);
2049
2050 /* Multiqueue and raw packet checksumming are mutually
2051 * exclusive. Note that this not the same as TCP/IP
2052 * checksumming, which works fine. */
2053 rxcsum = rd32(E1000_RXCSUM);
2054 rxcsum |= E1000_RXCSUM_PCSD;
2055 wr32(E1000_RXCSUM, rxcsum);
2056 } else {
2057 /* Enable Receive Checksum Offload for TCP and UDP */
2058 rxcsum = rd32(E1000_RXCSUM);
Alexander Duyck56fbbb42009-02-12 18:17:42 +00002059 if (adapter->rx_csum)
2060 rxcsum |= E1000_RXCSUM_TUOFL | E1000_RXCSUM_IPPCSE;
2061 else
2062 rxcsum &= ~(E1000_RXCSUM_TUOFL | E1000_RXCSUM_IPPCSE);
Auke Kok9d5c8242008-01-24 02:22:38 -08002063
Auke Kok9d5c8242008-01-24 02:22:38 -08002064 wr32(E1000_RXCSUM, rxcsum);
2065 }
2066
2067 if (adapter->vlgrp)
2068 wr32(E1000_RLPML,
2069 adapter->max_frame_size + VLAN_TAG_SIZE);
2070 else
2071 wr32(E1000_RLPML, adapter->max_frame_size);
2072
2073 /* Enable Receives */
2074 wr32(E1000_RCTL, rctl);
2075}
2076
2077/**
2078 * igb_free_tx_resources - Free Tx Resources per Queue
Auke Kok9d5c8242008-01-24 02:22:38 -08002079 * @tx_ring: Tx descriptor ring for a specific queue
2080 *
2081 * Free all transmit software resources
2082 **/
Alexander Duyck68fd9912008-11-20 00:48:10 -08002083void igb_free_tx_resources(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002084{
Mitch Williams3b644cf2008-06-27 10:59:48 -07002085 struct pci_dev *pdev = tx_ring->adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08002086
Mitch Williams3b644cf2008-06-27 10:59:48 -07002087 igb_clean_tx_ring(tx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08002088
2089 vfree(tx_ring->buffer_info);
2090 tx_ring->buffer_info = NULL;
2091
2092 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2093
2094 tx_ring->desc = NULL;
2095}
2096
2097/**
2098 * igb_free_all_tx_resources - Free Tx Resources for All Queues
2099 * @adapter: board private structure
2100 *
2101 * Free all transmit software resources
2102 **/
2103static void igb_free_all_tx_resources(struct igb_adapter *adapter)
2104{
2105 int i;
2106
2107 for (i = 0; i < adapter->num_tx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07002108 igb_free_tx_resources(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002109}
2110
2111static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
2112 struct igb_buffer *buffer_info)
2113{
2114 if (buffer_info->dma) {
2115 pci_unmap_page(adapter->pdev,
2116 buffer_info->dma,
2117 buffer_info->length,
2118 PCI_DMA_TODEVICE);
2119 buffer_info->dma = 0;
2120 }
2121 if (buffer_info->skb) {
2122 dev_kfree_skb_any(buffer_info->skb);
2123 buffer_info->skb = NULL;
2124 }
2125 buffer_info->time_stamp = 0;
Alexander Duyck73cd78f2009-02-12 18:16:59 +00002126 buffer_info->next_to_watch = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08002127 /* buffer_info must be completely set up in the transmit path */
2128}
2129
2130/**
2131 * igb_clean_tx_ring - Free Tx Buffers
Auke Kok9d5c8242008-01-24 02:22:38 -08002132 * @tx_ring: ring to be cleaned
2133 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07002134static void igb_clean_tx_ring(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002135{
Mitch Williams3b644cf2008-06-27 10:59:48 -07002136 struct igb_adapter *adapter = tx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08002137 struct igb_buffer *buffer_info;
2138 unsigned long size;
2139 unsigned int i;
2140
2141 if (!tx_ring->buffer_info)
2142 return;
2143 /* Free all the Tx ring sk_buffs */
2144
2145 for (i = 0; i < tx_ring->count; i++) {
2146 buffer_info = &tx_ring->buffer_info[i];
2147 igb_unmap_and_free_tx_resource(adapter, buffer_info);
2148 }
2149
2150 size = sizeof(struct igb_buffer) * tx_ring->count;
2151 memset(tx_ring->buffer_info, 0, size);
2152
2153 /* Zero out the descriptor ring */
2154
2155 memset(tx_ring->desc, 0, tx_ring->size);
2156
2157 tx_ring->next_to_use = 0;
2158 tx_ring->next_to_clean = 0;
2159
2160 writel(0, adapter->hw.hw_addr + tx_ring->head);
2161 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2162}
2163
2164/**
2165 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2166 * @adapter: board private structure
2167 **/
2168static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
2169{
2170 int i;
2171
2172 for (i = 0; i < adapter->num_tx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07002173 igb_clean_tx_ring(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002174}
2175
2176/**
2177 * igb_free_rx_resources - Free Rx Resources
Auke Kok9d5c8242008-01-24 02:22:38 -08002178 * @rx_ring: ring to clean the resources from
2179 *
2180 * Free all receive software resources
2181 **/
Alexander Duyck68fd9912008-11-20 00:48:10 -08002182void igb_free_rx_resources(struct igb_ring *rx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002183{
Mitch Williams3b644cf2008-06-27 10:59:48 -07002184 struct pci_dev *pdev = rx_ring->adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08002185
Mitch Williams3b644cf2008-06-27 10:59:48 -07002186 igb_clean_rx_ring(rx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08002187
2188 vfree(rx_ring->buffer_info);
2189 rx_ring->buffer_info = NULL;
2190
2191 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2192
2193 rx_ring->desc = NULL;
2194}
2195
2196/**
2197 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2198 * @adapter: board private structure
2199 *
2200 * Free all receive software resources
2201 **/
2202static void igb_free_all_rx_resources(struct igb_adapter *adapter)
2203{
2204 int i;
2205
2206 for (i = 0; i < adapter->num_rx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07002207 igb_free_rx_resources(&adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002208}
2209
2210/**
2211 * igb_clean_rx_ring - Free Rx Buffers per Queue
Auke Kok9d5c8242008-01-24 02:22:38 -08002212 * @rx_ring: ring to free buffers from
2213 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07002214static void igb_clean_rx_ring(struct igb_ring *rx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002215{
Mitch Williams3b644cf2008-06-27 10:59:48 -07002216 struct igb_adapter *adapter = rx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08002217 struct igb_buffer *buffer_info;
2218 struct pci_dev *pdev = adapter->pdev;
2219 unsigned long size;
2220 unsigned int i;
2221
2222 if (!rx_ring->buffer_info)
2223 return;
2224 /* Free all the Rx ring sk_buffs */
2225 for (i = 0; i < rx_ring->count; i++) {
2226 buffer_info = &rx_ring->buffer_info[i];
2227 if (buffer_info->dma) {
2228 if (adapter->rx_ps_hdr_size)
2229 pci_unmap_single(pdev, buffer_info->dma,
2230 adapter->rx_ps_hdr_size,
2231 PCI_DMA_FROMDEVICE);
2232 else
2233 pci_unmap_single(pdev, buffer_info->dma,
2234 adapter->rx_buffer_len,
2235 PCI_DMA_FROMDEVICE);
2236 buffer_info->dma = 0;
2237 }
2238
2239 if (buffer_info->skb) {
2240 dev_kfree_skb(buffer_info->skb);
2241 buffer_info->skb = NULL;
2242 }
2243 if (buffer_info->page) {
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07002244 if (buffer_info->page_dma)
2245 pci_unmap_page(pdev, buffer_info->page_dma,
2246 PAGE_SIZE / 2,
2247 PCI_DMA_FROMDEVICE);
Auke Kok9d5c8242008-01-24 02:22:38 -08002248 put_page(buffer_info->page);
2249 buffer_info->page = NULL;
2250 buffer_info->page_dma = 0;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07002251 buffer_info->page_offset = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08002252 }
2253 }
2254
Auke Kok9d5c8242008-01-24 02:22:38 -08002255 size = sizeof(struct igb_buffer) * rx_ring->count;
2256 memset(rx_ring->buffer_info, 0, size);
2257
2258 /* Zero out the descriptor ring */
2259 memset(rx_ring->desc, 0, rx_ring->size);
2260
2261 rx_ring->next_to_clean = 0;
2262 rx_ring->next_to_use = 0;
2263
2264 writel(0, adapter->hw.hw_addr + rx_ring->head);
2265 writel(0, adapter->hw.hw_addr + rx_ring->tail);
2266}
2267
2268/**
2269 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2270 * @adapter: board private structure
2271 **/
2272static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2273{
2274 int i;
2275
2276 for (i = 0; i < adapter->num_rx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07002277 igb_clean_rx_ring(&adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002278}
2279
2280/**
2281 * igb_set_mac - Change the Ethernet Address of the NIC
2282 * @netdev: network interface device structure
2283 * @p: pointer to an address structure
2284 *
2285 * Returns 0 on success, negative on failure
2286 **/
2287static int igb_set_mac(struct net_device *netdev, void *p)
2288{
2289 struct igb_adapter *adapter = netdev_priv(netdev);
Alexander Duyck28b07592009-02-06 23:20:31 +00002290 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08002291 struct sockaddr *addr = p;
2292
2293 if (!is_valid_ether_addr(addr->sa_data))
2294 return -EADDRNOTAVAIL;
2295
2296 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
Alexander Duyck28b07592009-02-06 23:20:31 +00002297 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
Auke Kok9d5c8242008-01-24 02:22:38 -08002298
Alexander Duyck28b07592009-02-06 23:20:31 +00002299 hw->mac.ops.rar_set(hw, hw->mac.addr, 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08002300
2301 return 0;
2302}
2303
2304/**
2305 * igb_set_multi - Multicast and Promiscuous mode set
2306 * @netdev: network interface device structure
2307 *
2308 * The set_multi entry point is called whenever the multicast address
2309 * list or the network interface flags are updated. This routine is
2310 * responsible for configuring the hardware for proper multicast,
2311 * promiscuous mode, and all-multi behavior.
2312 **/
2313static void igb_set_multi(struct net_device *netdev)
2314{
2315 struct igb_adapter *adapter = netdev_priv(netdev);
2316 struct e1000_hw *hw = &adapter->hw;
2317 struct e1000_mac_info *mac = &hw->mac;
2318 struct dev_mc_list *mc_ptr;
2319 u8 *mta_list;
2320 u32 rctl;
2321 int i;
2322
2323 /* Check for Promiscuous and All Multicast modes */
2324
2325 rctl = rd32(E1000_RCTL);
2326
Patrick McHardy746b9f02008-07-16 20:15:45 -07002327 if (netdev->flags & IFF_PROMISC) {
Auke Kok9d5c8242008-01-24 02:22:38 -08002328 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
Patrick McHardy746b9f02008-07-16 20:15:45 -07002329 rctl &= ~E1000_RCTL_VFE;
2330 } else {
2331 if (netdev->flags & IFF_ALLMULTI) {
2332 rctl |= E1000_RCTL_MPE;
2333 rctl &= ~E1000_RCTL_UPE;
2334 } else
2335 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
Patrick McHardy78ed11a2008-07-16 20:16:14 -07002336 rctl |= E1000_RCTL_VFE;
Patrick McHardy746b9f02008-07-16 20:15:45 -07002337 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002338 wr32(E1000_RCTL, rctl);
2339
2340 if (!netdev->mc_count) {
2341 /* nothing to program, so clear mc list */
Alexander Duyck8a900862009-02-06 23:20:10 +00002342 igb_update_mc_addr_list(hw, NULL, 0, 1,
2343 mac->rar_entry_count);
Auke Kok9d5c8242008-01-24 02:22:38 -08002344 return;
2345 }
2346
2347 mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2348 if (!mta_list)
2349 return;
2350
2351 /* The shared function expects a packed array of only addresses. */
2352 mc_ptr = netdev->mc_list;
2353
2354 for (i = 0; i < netdev->mc_count; i++) {
2355 if (!mc_ptr)
2356 break;
2357 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2358 mc_ptr = mc_ptr->next;
2359 }
Alexander Duyck8a900862009-02-06 23:20:10 +00002360 igb_update_mc_addr_list(hw, mta_list, i, 1, mac->rar_entry_count);
Auke Kok9d5c8242008-01-24 02:22:38 -08002361 kfree(mta_list);
2362}
2363
2364/* Need to wait a few seconds after link up to get diagnostic information from
2365 * the phy */
2366static void igb_update_phy_info(unsigned long data)
2367{
2368 struct igb_adapter *adapter = (struct igb_adapter *) data;
Alexander Duyckf5f4cf02008-11-21 21:30:24 -08002369 igb_get_phy_info(&adapter->hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08002370}
2371
2372/**
Alexander Duyck4d6b7252009-02-06 23:16:24 +00002373 * igb_has_link - check shared code for link and determine up/down
2374 * @adapter: pointer to driver private info
2375 **/
2376static bool igb_has_link(struct igb_adapter *adapter)
2377{
2378 struct e1000_hw *hw = &adapter->hw;
2379 bool link_active = false;
2380 s32 ret_val = 0;
2381
2382 /* get_link_status is set on LSC (link status) interrupt or
2383 * rx sequence error interrupt. get_link_status will stay
2384 * false until the e1000_check_for_link establishes link
2385 * for copper adapters ONLY
2386 */
2387 switch (hw->phy.media_type) {
2388 case e1000_media_type_copper:
2389 if (hw->mac.get_link_status) {
2390 ret_val = hw->mac.ops.check_for_link(hw);
2391 link_active = !hw->mac.get_link_status;
2392 } else {
2393 link_active = true;
2394 }
2395 break;
2396 case e1000_media_type_fiber:
2397 ret_val = hw->mac.ops.check_for_link(hw);
2398 link_active = !!(rd32(E1000_STATUS) & E1000_STATUS_LU);
2399 break;
2400 case e1000_media_type_internal_serdes:
2401 ret_val = hw->mac.ops.check_for_link(hw);
2402 link_active = hw->mac.serdes_has_link;
2403 break;
2404 default:
2405 case e1000_media_type_unknown:
2406 break;
2407 }
2408
2409 return link_active;
2410}
2411
2412/**
Auke Kok9d5c8242008-01-24 02:22:38 -08002413 * igb_watchdog - Timer Call-back
2414 * @data: pointer to adapter cast into an unsigned long
2415 **/
2416static void igb_watchdog(unsigned long data)
2417{
2418 struct igb_adapter *adapter = (struct igb_adapter *)data;
2419 /* Do the rest outside of interrupt context */
2420 schedule_work(&adapter->watchdog_task);
2421}
2422
2423static void igb_watchdog_task(struct work_struct *work)
2424{
2425 struct igb_adapter *adapter = container_of(work,
2426 struct igb_adapter, watchdog_task);
2427 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08002428 struct net_device *netdev = adapter->netdev;
2429 struct igb_ring *tx_ring = adapter->tx_ring;
Auke Kok9d5c8242008-01-24 02:22:38 -08002430 u32 link;
Alexander Duyck7a6ea552008-08-26 04:25:03 -07002431 u32 eics = 0;
Alexander Duyck7a6ea552008-08-26 04:25:03 -07002432 int i;
Auke Kok9d5c8242008-01-24 02:22:38 -08002433
Alexander Duyck4d6b7252009-02-06 23:16:24 +00002434 link = igb_has_link(adapter);
2435 if ((netif_carrier_ok(netdev)) && link)
Auke Kok9d5c8242008-01-24 02:22:38 -08002436 goto link_up;
2437
Auke Kok9d5c8242008-01-24 02:22:38 -08002438 if (link) {
2439 if (!netif_carrier_ok(netdev)) {
2440 u32 ctrl;
2441 hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2442 &adapter->link_speed,
2443 &adapter->link_duplex);
2444
2445 ctrl = rd32(E1000_CTRL);
Alexander Duyck527d47c2008-11-27 00:21:39 -08002446 /* Links status message must follow this format */
2447 printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
Auke Kok9d5c8242008-01-24 02:22:38 -08002448 "Flow Control: %s\n",
Alexander Duyck527d47c2008-11-27 00:21:39 -08002449 netdev->name,
Auke Kok9d5c8242008-01-24 02:22:38 -08002450 adapter->link_speed,
2451 adapter->link_duplex == FULL_DUPLEX ?
2452 "Full Duplex" : "Half Duplex",
2453 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2454 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2455 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2456 E1000_CTRL_TFCE) ? "TX" : "None")));
2457
2458 /* tweak tx_queue_len according to speed/duplex and
2459 * adjust the timeout factor */
2460 netdev->tx_queue_len = adapter->tx_queue_len;
2461 adapter->tx_timeout_factor = 1;
2462 switch (adapter->link_speed) {
2463 case SPEED_10:
2464 netdev->tx_queue_len = 10;
2465 adapter->tx_timeout_factor = 14;
2466 break;
2467 case SPEED_100:
2468 netdev->tx_queue_len = 100;
2469 /* maybe add some timeout factor ? */
2470 break;
2471 }
2472
2473 netif_carrier_on(netdev);
David S. Millerfd2ea0a2008-07-17 01:56:23 -07002474 netif_tx_wake_all_queues(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08002475
Alexander Duyck4b1a9872009-02-06 23:19:50 +00002476 /* link state has changed, schedule phy info update */
Auke Kok9d5c8242008-01-24 02:22:38 -08002477 if (!test_bit(__IGB_DOWN, &adapter->state))
2478 mod_timer(&adapter->phy_info_timer,
2479 round_jiffies(jiffies + 2 * HZ));
2480 }
2481 } else {
2482 if (netif_carrier_ok(netdev)) {
2483 adapter->link_speed = 0;
2484 adapter->link_duplex = 0;
Alexander Duyck527d47c2008-11-27 00:21:39 -08002485 /* Links status message must follow this format */
2486 printk(KERN_INFO "igb: %s NIC Link is Down\n",
2487 netdev->name);
Auke Kok9d5c8242008-01-24 02:22:38 -08002488 netif_carrier_off(netdev);
David S. Millerfd2ea0a2008-07-17 01:56:23 -07002489 netif_tx_stop_all_queues(netdev);
Alexander Duyck4b1a9872009-02-06 23:19:50 +00002490
2491 /* link state has changed, schedule phy info update */
Auke Kok9d5c8242008-01-24 02:22:38 -08002492 if (!test_bit(__IGB_DOWN, &adapter->state))
2493 mod_timer(&adapter->phy_info_timer,
2494 round_jiffies(jiffies + 2 * HZ));
2495 }
2496 }
2497
2498link_up:
2499 igb_update_stats(adapter);
2500
Alexander Duyck4b1a9872009-02-06 23:19:50 +00002501 hw->mac.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
Auke Kok9d5c8242008-01-24 02:22:38 -08002502 adapter->tpt_old = adapter->stats.tpt;
Alexander Duyck4b1a9872009-02-06 23:19:50 +00002503 hw->mac.collision_delta = adapter->stats.colc - adapter->colc_old;
Auke Kok9d5c8242008-01-24 02:22:38 -08002504 adapter->colc_old = adapter->stats.colc;
2505
2506 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2507 adapter->gorc_old = adapter->stats.gorc;
2508 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2509 adapter->gotc_old = adapter->stats.gotc;
2510
2511 igb_update_adaptive(&adapter->hw);
2512
2513 if (!netif_carrier_ok(netdev)) {
2514 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2515 /* We've lost link, so the controller stops DMA,
2516 * but we've got queued Tx work that's never going
2517 * to get done, so reset controller to flush Tx.
2518 * (Do the reset outside of interrupt context). */
2519 adapter->tx_timeout_count++;
2520 schedule_work(&adapter->reset_task);
2521 }
2522 }
2523
2524 /* Cause software interrupt to ensure rx ring is cleaned */
Alexander Duyck7a6ea552008-08-26 04:25:03 -07002525 if (adapter->msix_entries) {
2526 for (i = 0; i < adapter->num_rx_queues; i++)
2527 eics |= adapter->rx_ring[i].eims_value;
2528 wr32(E1000_EICS, eics);
2529 } else {
2530 wr32(E1000_ICS, E1000_ICS_RXDMT0);
2531 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002532
2533 /* Force detection of hung controller every watchdog period */
2534 tx_ring->detect_tx_hung = true;
2535
2536 /* Reset the timer */
2537 if (!test_bit(__IGB_DOWN, &adapter->state))
2538 mod_timer(&adapter->watchdog_timer,
2539 round_jiffies(jiffies + 2 * HZ));
2540}
2541
2542enum latency_range {
2543 lowest_latency = 0,
2544 low_latency = 1,
2545 bulk_latency = 2,
2546 latency_invalid = 255
2547};
2548
2549
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002550/**
2551 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2552 *
2553 * Stores a new ITR value based on strictly on packet size. This
2554 * algorithm is less sophisticated than that used in igb_update_itr,
2555 * due to the difficulty of synchronizing statistics across multiple
2556 * receive rings. The divisors and thresholds used by this fuction
2557 * were determined based on theoretical maximum wire speed and testing
2558 * data, in order to minimize response time while increasing bulk
2559 * throughput.
2560 * This functionality is controlled by the InterruptThrottleRate module
2561 * parameter (see igb_param.c)
2562 * NOTE: This function is called only when operating in a multiqueue
2563 * receive environment.
2564 * @rx_ring: pointer to ring
2565 **/
2566static void igb_update_ring_itr(struct igb_ring *rx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002567{
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002568 int new_val = rx_ring->itr_val;
2569 int avg_wire_size = 0;
2570 struct igb_adapter *adapter = rx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08002571
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002572 if (!rx_ring->total_packets)
2573 goto clear_counts; /* no packets, so don't do anything */
Auke Kok9d5c8242008-01-24 02:22:38 -08002574
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002575 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2576 * ints/sec - ITR timer value of 120 ticks.
2577 */
2578 if (adapter->link_speed != SPEED_1000) {
2579 new_val = 120;
2580 goto set_itr_val;
2581 }
2582 avg_wire_size = rx_ring->total_bytes / rx_ring->total_packets;
2583
2584 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2585 avg_wire_size += 24;
2586
2587 /* Don't starve jumbo frames */
2588 avg_wire_size = min(avg_wire_size, 3000);
2589
2590 /* Give a little boost to mid-size frames */
2591 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
2592 new_val = avg_wire_size / 3;
2593 else
2594 new_val = avg_wire_size / 2;
2595
2596set_itr_val:
Auke Kok9d5c8242008-01-24 02:22:38 -08002597 if (new_val != rx_ring->itr_val) {
2598 rx_ring->itr_val = new_val;
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002599 rx_ring->set_itr = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -08002600 }
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002601clear_counts:
2602 rx_ring->total_bytes = 0;
2603 rx_ring->total_packets = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08002604}
2605
2606/**
2607 * igb_update_itr - update the dynamic ITR value based on statistics
2608 * Stores a new ITR value based on packets and byte
2609 * counts during the last interrupt. The advantage of per interrupt
2610 * computation is faster updates and more accurate ITR for the current
2611 * traffic pattern. Constants in this function were computed
2612 * based on theoretical maximum wire speed and thresholds were set based
2613 * on testing data as well as attempting to minimize response time
2614 * while increasing bulk throughput.
2615 * this functionality is controlled by the InterruptThrottleRate module
2616 * parameter (see igb_param.c)
2617 * NOTE: These calculations are only valid when operating in a single-
2618 * queue environment.
2619 * @adapter: pointer to adapter
2620 * @itr_setting: current adapter->itr
2621 * @packets: the number of packets during this measurement interval
2622 * @bytes: the number of bytes during this measurement interval
2623 **/
2624static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2625 int packets, int bytes)
2626{
2627 unsigned int retval = itr_setting;
2628
2629 if (packets == 0)
2630 goto update_itr_done;
2631
2632 switch (itr_setting) {
2633 case lowest_latency:
2634 /* handle TSO and jumbo frames */
2635 if (bytes/packets > 8000)
2636 retval = bulk_latency;
2637 else if ((packets < 5) && (bytes > 512))
2638 retval = low_latency;
2639 break;
2640 case low_latency: /* 50 usec aka 20000 ints/s */
2641 if (bytes > 10000) {
2642 /* this if handles the TSO accounting */
2643 if (bytes/packets > 8000) {
2644 retval = bulk_latency;
2645 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2646 retval = bulk_latency;
2647 } else if ((packets > 35)) {
2648 retval = lowest_latency;
2649 }
2650 } else if (bytes/packets > 2000) {
2651 retval = bulk_latency;
2652 } else if (packets <= 2 && bytes < 512) {
2653 retval = lowest_latency;
2654 }
2655 break;
2656 case bulk_latency: /* 250 usec aka 4000 ints/s */
2657 if (bytes > 25000) {
2658 if (packets > 35)
2659 retval = low_latency;
Alexander Duyck1e5c3d22009-02-12 18:17:21 +00002660 } else if (bytes < 1500) {
Auke Kok9d5c8242008-01-24 02:22:38 -08002661 retval = low_latency;
2662 }
2663 break;
2664 }
2665
2666update_itr_done:
2667 return retval;
2668}
2669
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002670static void igb_set_itr(struct igb_adapter *adapter)
Auke Kok9d5c8242008-01-24 02:22:38 -08002671{
2672 u16 current_itr;
2673 u32 new_itr = adapter->itr;
2674
2675 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2676 if (adapter->link_speed != SPEED_1000) {
2677 current_itr = 0;
2678 new_itr = 4000;
2679 goto set_itr_now;
2680 }
2681
2682 adapter->rx_itr = igb_update_itr(adapter,
2683 adapter->rx_itr,
2684 adapter->rx_ring->total_packets,
2685 adapter->rx_ring->total_bytes);
Auke Kok9d5c8242008-01-24 02:22:38 -08002686
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002687 if (adapter->rx_ring->buddy) {
Auke Kok9d5c8242008-01-24 02:22:38 -08002688 adapter->tx_itr = igb_update_itr(adapter,
2689 adapter->tx_itr,
2690 adapter->tx_ring->total_packets,
2691 adapter->tx_ring->total_bytes);
Auke Kok9d5c8242008-01-24 02:22:38 -08002692 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2693 } else {
2694 current_itr = adapter->rx_itr;
2695 }
2696
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002697 /* conservative mode (itr 3) eliminates the lowest_latency setting */
Alexander Duyck73cd78f2009-02-12 18:16:59 +00002698 if (adapter->itr_setting == 3 && current_itr == lowest_latency)
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002699 current_itr = low_latency;
2700
Auke Kok9d5c8242008-01-24 02:22:38 -08002701 switch (current_itr) {
2702 /* counts and packets in update_itr are dependent on these numbers */
2703 case lowest_latency:
2704 new_itr = 70000;
2705 break;
2706 case low_latency:
2707 new_itr = 20000; /* aka hwitr = ~200 */
2708 break;
2709 case bulk_latency:
2710 new_itr = 4000;
2711 break;
2712 default:
2713 break;
2714 }
2715
2716set_itr_now:
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002717 adapter->rx_ring->total_bytes = 0;
2718 adapter->rx_ring->total_packets = 0;
2719 if (adapter->rx_ring->buddy) {
2720 adapter->rx_ring->buddy->total_bytes = 0;
2721 adapter->rx_ring->buddy->total_packets = 0;
2722 }
2723
Auke Kok9d5c8242008-01-24 02:22:38 -08002724 if (new_itr != adapter->itr) {
2725 /* this attempts to bias the interrupt rate towards Bulk
2726 * by adding intermediate steps when interrupt rate is
2727 * increasing */
2728 new_itr = new_itr > adapter->itr ?
2729 min(adapter->itr + (new_itr >> 2), new_itr) :
2730 new_itr;
2731 /* Don't write the value here; it resets the adapter's
2732 * internal timer, and causes us to delay far longer than
2733 * we should between interrupts. Instead, we write the ITR
2734 * value at the beginning of the next interrupt so the timing
2735 * ends up being correct.
2736 */
2737 adapter->itr = new_itr;
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07002738 adapter->rx_ring->itr_val = 1000000000 / (new_itr * 256);
2739 adapter->rx_ring->set_itr = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -08002740 }
2741
2742 return;
2743}
2744
2745
2746#define IGB_TX_FLAGS_CSUM 0x00000001
2747#define IGB_TX_FLAGS_VLAN 0x00000002
2748#define IGB_TX_FLAGS_TSO 0x00000004
2749#define IGB_TX_FLAGS_IPV4 0x00000008
Patrick Ohly33af6bc2009-02-12 05:03:43 +00002750#define IGB_TX_FLAGS_TSTAMP 0x00000010
Auke Kok9d5c8242008-01-24 02:22:38 -08002751#define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2752#define IGB_TX_FLAGS_VLAN_SHIFT 16
2753
2754static inline int igb_tso_adv(struct igb_adapter *adapter,
2755 struct igb_ring *tx_ring,
2756 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2757{
2758 struct e1000_adv_tx_context_desc *context_desc;
2759 unsigned int i;
2760 int err;
2761 struct igb_buffer *buffer_info;
2762 u32 info = 0, tu_cmd = 0;
2763 u32 mss_l4len_idx, l4len;
2764 *hdr_len = 0;
2765
2766 if (skb_header_cloned(skb)) {
2767 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2768 if (err)
2769 return err;
2770 }
2771
2772 l4len = tcp_hdrlen(skb);
2773 *hdr_len += l4len;
2774
2775 if (skb->protocol == htons(ETH_P_IP)) {
2776 struct iphdr *iph = ip_hdr(skb);
2777 iph->tot_len = 0;
2778 iph->check = 0;
2779 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2780 iph->daddr, 0,
2781 IPPROTO_TCP,
2782 0);
2783 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2784 ipv6_hdr(skb)->payload_len = 0;
2785 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2786 &ipv6_hdr(skb)->daddr,
2787 0, IPPROTO_TCP, 0);
2788 }
2789
2790 i = tx_ring->next_to_use;
2791
2792 buffer_info = &tx_ring->buffer_info[i];
2793 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2794 /* VLAN MACLEN IPLEN */
2795 if (tx_flags & IGB_TX_FLAGS_VLAN)
2796 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2797 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2798 *hdr_len += skb_network_offset(skb);
2799 info |= skb_network_header_len(skb);
2800 *hdr_len += skb_network_header_len(skb);
2801 context_desc->vlan_macip_lens = cpu_to_le32(info);
2802
2803 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2804 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2805
2806 if (skb->protocol == htons(ETH_P_IP))
2807 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2808 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2809
2810 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2811
2812 /* MSS L4LEN IDX */
2813 mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2814 mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2815
Alexander Duyck73cd78f2009-02-12 18:16:59 +00002816 /* For 82575, context index must be unique per ring. */
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07002817 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2818 mss_l4len_idx |= tx_ring->queue_index << 4;
Auke Kok9d5c8242008-01-24 02:22:38 -08002819
2820 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2821 context_desc->seqnum_seed = 0;
2822
2823 buffer_info->time_stamp = jiffies;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08002824 buffer_info->next_to_watch = i;
Auke Kok9d5c8242008-01-24 02:22:38 -08002825 buffer_info->dma = 0;
2826 i++;
2827 if (i == tx_ring->count)
2828 i = 0;
2829
2830 tx_ring->next_to_use = i;
2831
2832 return true;
2833}
2834
2835static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2836 struct igb_ring *tx_ring,
2837 struct sk_buff *skb, u32 tx_flags)
2838{
2839 struct e1000_adv_tx_context_desc *context_desc;
2840 unsigned int i;
2841 struct igb_buffer *buffer_info;
2842 u32 info = 0, tu_cmd = 0;
2843
2844 if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2845 (tx_flags & IGB_TX_FLAGS_VLAN)) {
2846 i = tx_ring->next_to_use;
2847 buffer_info = &tx_ring->buffer_info[i];
2848 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2849
2850 if (tx_flags & IGB_TX_FLAGS_VLAN)
2851 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2852 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2853 if (skb->ip_summed == CHECKSUM_PARTIAL)
2854 info |= skb_network_header_len(skb);
2855
2856 context_desc->vlan_macip_lens = cpu_to_le32(info);
2857
2858 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2859
2860 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Mitch Williams44b0cda2008-03-07 10:32:13 -08002861 switch (skb->protocol) {
Harvey Harrison09640e62009-02-01 00:45:17 -08002862 case cpu_to_be16(ETH_P_IP):
Auke Kok9d5c8242008-01-24 02:22:38 -08002863 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
Mitch Williams44b0cda2008-03-07 10:32:13 -08002864 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2865 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2866 break;
Harvey Harrison09640e62009-02-01 00:45:17 -08002867 case cpu_to_be16(ETH_P_IPV6):
Mitch Williams44b0cda2008-03-07 10:32:13 -08002868 /* XXX what about other V6 headers?? */
2869 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2870 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2871 break;
2872 default:
2873 if (unlikely(net_ratelimit()))
2874 dev_warn(&adapter->pdev->dev,
2875 "partial checksum but proto=%x!\n",
2876 skb->protocol);
2877 break;
2878 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002879 }
2880
2881 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2882 context_desc->seqnum_seed = 0;
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07002883 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2884 context_desc->mss_l4len_idx =
2885 cpu_to_le32(tx_ring->queue_index << 4);
Alexander Duyck265de402009-02-06 23:22:52 +00002886 else
2887 context_desc->mss_l4len_idx = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08002888
2889 buffer_info->time_stamp = jiffies;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08002890 buffer_info->next_to_watch = i;
Auke Kok9d5c8242008-01-24 02:22:38 -08002891 buffer_info->dma = 0;
2892
2893 i++;
2894 if (i == tx_ring->count)
2895 i = 0;
2896 tx_ring->next_to_use = i;
2897
2898 return true;
2899 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002900 return false;
2901}
2902
2903#define IGB_MAX_TXD_PWR 16
2904#define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
2905
2906static inline int igb_tx_map_adv(struct igb_adapter *adapter,
Alexander Duyck0e014cb2008-12-26 01:33:18 -08002907 struct igb_ring *tx_ring, struct sk_buff *skb,
2908 unsigned int first)
Auke Kok9d5c8242008-01-24 02:22:38 -08002909{
2910 struct igb_buffer *buffer_info;
2911 unsigned int len = skb_headlen(skb);
2912 unsigned int count = 0, i;
2913 unsigned int f;
2914
2915 i = tx_ring->next_to_use;
2916
2917 buffer_info = &tx_ring->buffer_info[i];
2918 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2919 buffer_info->length = len;
2920 /* set time_stamp *before* dma to help avoid a possible race */
2921 buffer_info->time_stamp = jiffies;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08002922 buffer_info->next_to_watch = i;
Auke Kok9d5c8242008-01-24 02:22:38 -08002923 buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2924 PCI_DMA_TODEVICE);
2925 count++;
2926 i++;
2927 if (i == tx_ring->count)
2928 i = 0;
2929
2930 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2931 struct skb_frag_struct *frag;
2932
2933 frag = &skb_shinfo(skb)->frags[f];
2934 len = frag->size;
2935
2936 buffer_info = &tx_ring->buffer_info[i];
2937 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2938 buffer_info->length = len;
2939 buffer_info->time_stamp = jiffies;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08002940 buffer_info->next_to_watch = i;
Auke Kok9d5c8242008-01-24 02:22:38 -08002941 buffer_info->dma = pci_map_page(adapter->pdev,
2942 frag->page,
2943 frag->page_offset,
2944 len,
2945 PCI_DMA_TODEVICE);
2946
2947 count++;
2948 i++;
2949 if (i == tx_ring->count)
2950 i = 0;
2951 }
2952
Alexander Duyck0e014cb2008-12-26 01:33:18 -08002953 i = ((i == 0) ? tx_ring->count - 1 : i - 1);
Auke Kok9d5c8242008-01-24 02:22:38 -08002954 tx_ring->buffer_info[i].skb = skb;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08002955 tx_ring->buffer_info[first].next_to_watch = i;
Auke Kok9d5c8242008-01-24 02:22:38 -08002956
2957 return count;
2958}
2959
2960static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2961 struct igb_ring *tx_ring,
2962 int tx_flags, int count, u32 paylen,
2963 u8 hdr_len)
2964{
2965 union e1000_adv_tx_desc *tx_desc = NULL;
2966 struct igb_buffer *buffer_info;
2967 u32 olinfo_status = 0, cmd_type_len;
2968 unsigned int i;
2969
2970 cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2971 E1000_ADVTXD_DCMD_DEXT);
2972
2973 if (tx_flags & IGB_TX_FLAGS_VLAN)
2974 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2975
Patrick Ohly33af6bc2009-02-12 05:03:43 +00002976 if (tx_flags & IGB_TX_FLAGS_TSTAMP)
2977 cmd_type_len |= E1000_ADVTXD_MAC_TSTAMP;
2978
Auke Kok9d5c8242008-01-24 02:22:38 -08002979 if (tx_flags & IGB_TX_FLAGS_TSO) {
2980 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2981
2982 /* insert tcp checksum */
2983 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2984
2985 /* insert ip checksum */
2986 if (tx_flags & IGB_TX_FLAGS_IPV4)
2987 olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2988
2989 } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2990 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2991 }
2992
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07002993 if ((adapter->flags & IGB_FLAG_NEED_CTX_IDX) &&
2994 (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2995 IGB_TX_FLAGS_VLAN)))
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07002996 olinfo_status |= tx_ring->queue_index << 4;
Auke Kok9d5c8242008-01-24 02:22:38 -08002997
2998 olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2999
3000 i = tx_ring->next_to_use;
3001 while (count--) {
3002 buffer_info = &tx_ring->buffer_info[i];
3003 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
3004 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
3005 tx_desc->read.cmd_type_len =
3006 cpu_to_le32(cmd_type_len | buffer_info->length);
3007 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3008 i++;
3009 if (i == tx_ring->count)
3010 i = 0;
3011 }
3012
3013 tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
3014 /* Force memory writes to complete before letting h/w
3015 * know there are new descriptors to fetch. (Only
3016 * applicable for weak-ordered memory model archs,
3017 * such as IA-64). */
3018 wmb();
3019
3020 tx_ring->next_to_use = i;
3021 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3022 /* we need this if more than one processor can write to our tail
3023 * at a time, it syncronizes IO on IA64/Altix systems */
3024 mmiowb();
3025}
3026
3027static int __igb_maybe_stop_tx(struct net_device *netdev,
3028 struct igb_ring *tx_ring, int size)
3029{
3030 struct igb_adapter *adapter = netdev_priv(netdev);
3031
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003032 netif_stop_subqueue(netdev, tx_ring->queue_index);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003033
Auke Kok9d5c8242008-01-24 02:22:38 -08003034 /* Herbert's original patch had:
3035 * smp_mb__after_netif_stop_queue();
3036 * but since that doesn't exist yet, just open code it. */
3037 smp_mb();
3038
3039 /* We need to check again in a case another CPU has just
3040 * made room available. */
3041 if (IGB_DESC_UNUSED(tx_ring) < size)
3042 return -EBUSY;
3043
3044 /* A reprieve! */
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003045 netif_wake_subqueue(netdev, tx_ring->queue_index);
Auke Kok9d5c8242008-01-24 02:22:38 -08003046 ++adapter->restart_queue;
3047 return 0;
3048}
3049
3050static int igb_maybe_stop_tx(struct net_device *netdev,
3051 struct igb_ring *tx_ring, int size)
3052{
3053 if (IGB_DESC_UNUSED(tx_ring) >= size)
3054 return 0;
3055 return __igb_maybe_stop_tx(netdev, tx_ring, size);
3056}
3057
Auke Kok9d5c8242008-01-24 02:22:38 -08003058static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
3059 struct net_device *netdev,
3060 struct igb_ring *tx_ring)
3061{
3062 struct igb_adapter *adapter = netdev_priv(netdev);
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003063 unsigned int first;
Auke Kok9d5c8242008-01-24 02:22:38 -08003064 unsigned int tx_flags = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08003065 u8 hdr_len = 0;
3066 int tso = 0;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00003067 union skb_shared_tx *shtx;
Auke Kok9d5c8242008-01-24 02:22:38 -08003068
Auke Kok9d5c8242008-01-24 02:22:38 -08003069 if (test_bit(__IGB_DOWN, &adapter->state)) {
3070 dev_kfree_skb_any(skb);
3071 return NETDEV_TX_OK;
3072 }
3073
3074 if (skb->len <= 0) {
3075 dev_kfree_skb_any(skb);
3076 return NETDEV_TX_OK;
3077 }
3078
Auke Kok9d5c8242008-01-24 02:22:38 -08003079 /* need: 1 descriptor per page,
3080 * + 2 desc gap to keep tail from touching head,
3081 * + 1 desc for skb->data,
3082 * + 1 desc for context descriptor,
3083 * otherwise try next time */
3084 if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
3085 /* this is a hard error */
Auke Kok9d5c8242008-01-24 02:22:38 -08003086 return NETDEV_TX_BUSY;
3087 }
Patrick Ohly33af6bc2009-02-12 05:03:43 +00003088
3089 /*
3090 * TODO: check that there currently is no other packet with
3091 * time stamping in the queue
3092 *
3093 * When doing time stamping, keep the connection to the socket
3094 * a while longer: it is still needed by skb_hwtstamp_tx(),
3095 * called either in igb_tx_hwtstamp() or by our caller when
3096 * doing software time stamping.
3097 */
3098 shtx = skb_tx(skb);
3099 if (unlikely(shtx->hardware)) {
3100 shtx->in_progress = 1;
3101 tx_flags |= IGB_TX_FLAGS_TSTAMP;
3102 } else if (likely(!shtx->software)) {
3103 /*
3104 * TODO: can this be solved in dev.c:dev_hard_start_xmit()?
3105 * There are probably unmodified driver which do something
3106 * like this and thus don't work in combination with
3107 * SOF_TIMESTAMPING_TX_SOFTWARE.
3108 */
3109 skb_orphan(skb);
3110 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003111
3112 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3113 tx_flags |= IGB_TX_FLAGS_VLAN;
3114 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
3115 }
3116
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003117 if (skb->protocol == htons(ETH_P_IP))
3118 tx_flags |= IGB_TX_FLAGS_IPV4;
3119
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003120 first = tx_ring->next_to_use;
Auke Kok9d5c8242008-01-24 02:22:38 -08003121 tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
3122 &hdr_len) : 0;
3123
3124 if (tso < 0) {
3125 dev_kfree_skb_any(skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08003126 return NETDEV_TX_OK;
3127 }
3128
3129 if (tso)
3130 tx_flags |= IGB_TX_FLAGS_TSO;
Alexander Duyckbc1cbd32009-02-13 14:45:17 +00003131 else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags) &&
3132 (skb->ip_summed == CHECKSUM_PARTIAL))
3133 tx_flags |= IGB_TX_FLAGS_CSUM;
Auke Kok9d5c8242008-01-24 02:22:38 -08003134
Auke Kok9d5c8242008-01-24 02:22:38 -08003135 igb_tx_queue_adv(adapter, tx_ring, tx_flags,
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003136 igb_tx_map_adv(adapter, tx_ring, skb, first),
Auke Kok9d5c8242008-01-24 02:22:38 -08003137 skb->len, hdr_len);
3138
3139 netdev->trans_start = jiffies;
3140
3141 /* Make sure there is space in the ring for the next send. */
3142 igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
3143
Auke Kok9d5c8242008-01-24 02:22:38 -08003144 return NETDEV_TX_OK;
3145}
3146
3147static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
3148{
3149 struct igb_adapter *adapter = netdev_priv(netdev);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003150 struct igb_ring *tx_ring;
3151
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003152 int r_idx = 0;
3153 r_idx = skb->queue_mapping & (IGB_MAX_TX_QUEUES - 1);
3154 tx_ring = adapter->multi_tx_table[r_idx];
Auke Kok9d5c8242008-01-24 02:22:38 -08003155
3156 /* This goes back to the question of how to logically map a tx queue
3157 * to a flow. Right now, performance is impacted slightly negatively
3158 * if using multiple tx queues. If the stack breaks away from a
3159 * single qdisc implementation, we can look at this again. */
3160 return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
3161}
3162
3163/**
3164 * igb_tx_timeout - Respond to a Tx Hang
3165 * @netdev: network interface device structure
3166 **/
3167static void igb_tx_timeout(struct net_device *netdev)
3168{
3169 struct igb_adapter *adapter = netdev_priv(netdev);
3170 struct e1000_hw *hw = &adapter->hw;
3171
3172 /* Do the reset outside of interrupt context */
3173 adapter->tx_timeout_count++;
3174 schedule_work(&adapter->reset_task);
Alexander Duyck265de402009-02-06 23:22:52 +00003175 wr32(E1000_EICS,
3176 (adapter->eims_enable_mask & ~adapter->eims_other));
Auke Kok9d5c8242008-01-24 02:22:38 -08003177}
3178
3179static void igb_reset_task(struct work_struct *work)
3180{
3181 struct igb_adapter *adapter;
3182 adapter = container_of(work, struct igb_adapter, reset_task);
3183
3184 igb_reinit_locked(adapter);
3185}
3186
3187/**
3188 * igb_get_stats - Get System Network Statistics
3189 * @netdev: network interface device structure
3190 *
3191 * Returns the address of the device statistics structure.
3192 * The statistics are actually updated from the timer callback.
3193 **/
Alexander Duyck73cd78f2009-02-12 18:16:59 +00003194static struct net_device_stats *igb_get_stats(struct net_device *netdev)
Auke Kok9d5c8242008-01-24 02:22:38 -08003195{
3196 struct igb_adapter *adapter = netdev_priv(netdev);
3197
3198 /* only return the current stats */
3199 return &adapter->net_stats;
3200}
3201
3202/**
3203 * igb_change_mtu - Change the Maximum Transfer Unit
3204 * @netdev: network interface device structure
3205 * @new_mtu: new value for maximum frame size
3206 *
3207 * Returns 0 on success, negative on failure
3208 **/
3209static int igb_change_mtu(struct net_device *netdev, int new_mtu)
3210{
3211 struct igb_adapter *adapter = netdev_priv(netdev);
3212 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3213
3214 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
3215 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3216 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
3217 return -EINVAL;
3218 }
3219
3220#define MAX_STD_JUMBO_FRAME_SIZE 9234
3221 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3222 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
3223 return -EINVAL;
3224 }
3225
3226 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
3227 msleep(1);
Alexander Duyck73cd78f2009-02-12 18:16:59 +00003228
Auke Kok9d5c8242008-01-24 02:22:38 -08003229 /* igb_down has a dependency on max_frame_size */
3230 adapter->max_frame_size = max_frame;
3231 if (netif_running(netdev))
3232 igb_down(adapter);
3233
3234 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3235 * means we reserve 2 more, this pushes us to allocate from the next
3236 * larger slab size.
3237 * i.e. RXBUFFER_2048 --> size-4096 slab
3238 */
3239
3240 if (max_frame <= IGB_RXBUFFER_256)
3241 adapter->rx_buffer_len = IGB_RXBUFFER_256;
3242 else if (max_frame <= IGB_RXBUFFER_512)
3243 adapter->rx_buffer_len = IGB_RXBUFFER_512;
3244 else if (max_frame <= IGB_RXBUFFER_1024)
3245 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
3246 else if (max_frame <= IGB_RXBUFFER_2048)
3247 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
3248 else
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07003249#if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3250 adapter->rx_buffer_len = IGB_RXBUFFER_16384;
3251#else
3252 adapter->rx_buffer_len = PAGE_SIZE / 2;
3253#endif
Auke Kok9d5c8242008-01-24 02:22:38 -08003254 /* adjust allocation if LPE protects us, and we aren't using SBP */
3255 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3256 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
3257 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3258
3259 dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
3260 netdev->mtu, new_mtu);
3261 netdev->mtu = new_mtu;
3262
3263 if (netif_running(netdev))
3264 igb_up(adapter);
3265 else
3266 igb_reset(adapter);
3267
3268 clear_bit(__IGB_RESETTING, &adapter->state);
3269
3270 return 0;
3271}
3272
3273/**
3274 * igb_update_stats - Update the board statistics counters
3275 * @adapter: board private structure
3276 **/
3277
3278void igb_update_stats(struct igb_adapter *adapter)
3279{
3280 struct e1000_hw *hw = &adapter->hw;
3281 struct pci_dev *pdev = adapter->pdev;
3282 u16 phy_tmp;
3283
3284#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3285
3286 /*
3287 * Prevent stats update while adapter is being reset, or if the pci
3288 * connection is down.
3289 */
3290 if (adapter->link_speed == 0)
3291 return;
3292 if (pci_channel_offline(pdev))
3293 return;
3294
3295 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3296 adapter->stats.gprc += rd32(E1000_GPRC);
3297 adapter->stats.gorc += rd32(E1000_GORCL);
3298 rd32(E1000_GORCH); /* clear GORCL */
3299 adapter->stats.bprc += rd32(E1000_BPRC);
3300 adapter->stats.mprc += rd32(E1000_MPRC);
3301 adapter->stats.roc += rd32(E1000_ROC);
3302
3303 adapter->stats.prc64 += rd32(E1000_PRC64);
3304 adapter->stats.prc127 += rd32(E1000_PRC127);
3305 adapter->stats.prc255 += rd32(E1000_PRC255);
3306 adapter->stats.prc511 += rd32(E1000_PRC511);
3307 adapter->stats.prc1023 += rd32(E1000_PRC1023);
3308 adapter->stats.prc1522 += rd32(E1000_PRC1522);
3309 adapter->stats.symerrs += rd32(E1000_SYMERRS);
3310 adapter->stats.sec += rd32(E1000_SEC);
3311
3312 adapter->stats.mpc += rd32(E1000_MPC);
3313 adapter->stats.scc += rd32(E1000_SCC);
3314 adapter->stats.ecol += rd32(E1000_ECOL);
3315 adapter->stats.mcc += rd32(E1000_MCC);
3316 adapter->stats.latecol += rd32(E1000_LATECOL);
3317 adapter->stats.dc += rd32(E1000_DC);
3318 adapter->stats.rlec += rd32(E1000_RLEC);
3319 adapter->stats.xonrxc += rd32(E1000_XONRXC);
3320 adapter->stats.xontxc += rd32(E1000_XONTXC);
3321 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
3322 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
3323 adapter->stats.fcruc += rd32(E1000_FCRUC);
3324 adapter->stats.gptc += rd32(E1000_GPTC);
3325 adapter->stats.gotc += rd32(E1000_GOTCL);
3326 rd32(E1000_GOTCH); /* clear GOTCL */
3327 adapter->stats.rnbc += rd32(E1000_RNBC);
3328 adapter->stats.ruc += rd32(E1000_RUC);
3329 adapter->stats.rfc += rd32(E1000_RFC);
3330 adapter->stats.rjc += rd32(E1000_RJC);
3331 adapter->stats.tor += rd32(E1000_TORH);
3332 adapter->stats.tot += rd32(E1000_TOTH);
3333 adapter->stats.tpr += rd32(E1000_TPR);
3334
3335 adapter->stats.ptc64 += rd32(E1000_PTC64);
3336 adapter->stats.ptc127 += rd32(E1000_PTC127);
3337 adapter->stats.ptc255 += rd32(E1000_PTC255);
3338 adapter->stats.ptc511 += rd32(E1000_PTC511);
3339 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
3340 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
3341
3342 adapter->stats.mptc += rd32(E1000_MPTC);
3343 adapter->stats.bptc += rd32(E1000_BPTC);
3344
3345 /* used for adaptive IFS */
3346
3347 hw->mac.tx_packet_delta = rd32(E1000_TPT);
3348 adapter->stats.tpt += hw->mac.tx_packet_delta;
3349 hw->mac.collision_delta = rd32(E1000_COLC);
3350 adapter->stats.colc += hw->mac.collision_delta;
3351
3352 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
3353 adapter->stats.rxerrc += rd32(E1000_RXERRC);
3354 adapter->stats.tncrs += rd32(E1000_TNCRS);
3355 adapter->stats.tsctc += rd32(E1000_TSCTC);
3356 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
3357
3358 adapter->stats.iac += rd32(E1000_IAC);
3359 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
3360 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
3361 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
3362 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
3363 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
3364 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
3365 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
3366 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
3367
3368 /* Fill out the OS statistics structure */
3369 adapter->net_stats.multicast = adapter->stats.mprc;
3370 adapter->net_stats.collisions = adapter->stats.colc;
3371
3372 /* Rx Errors */
3373
3374 /* RLEC on some newer hardware can be incorrect so build
3375 * our own version based on RUC and ROC */
3376 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3377 adapter->stats.crcerrs + adapter->stats.algnerrc +
3378 adapter->stats.ruc + adapter->stats.roc +
3379 adapter->stats.cexterr;
3380 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3381 adapter->stats.roc;
3382 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3383 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3384 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3385
3386 /* Tx Errors */
3387 adapter->net_stats.tx_errors = adapter->stats.ecol +
3388 adapter->stats.latecol;
3389 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3390 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3391 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3392
3393 /* Tx Dropped needs to be maintained elsewhere */
3394
3395 /* Phy Stats */
3396 if (hw->phy.media_type == e1000_media_type_copper) {
3397 if ((adapter->link_speed == SPEED_1000) &&
Alexander Duyck73cd78f2009-02-12 18:16:59 +00003398 (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
Auke Kok9d5c8242008-01-24 02:22:38 -08003399 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3400 adapter->phy_stats.idle_errors += phy_tmp;
3401 }
3402 }
3403
3404 /* Management Stats */
3405 adapter->stats.mgptc += rd32(E1000_MGTPTC);
3406 adapter->stats.mgprc += rd32(E1000_MGTPRC);
3407 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3408}
3409
Auke Kok9d5c8242008-01-24 02:22:38 -08003410static irqreturn_t igb_msix_other(int irq, void *data)
3411{
3412 struct net_device *netdev = data;
3413 struct igb_adapter *adapter = netdev_priv(netdev);
3414 struct e1000_hw *hw = &adapter->hw;
PJ Waskiewicz844290e2008-06-27 11:00:39 -07003415 u32 icr = rd32(E1000_ICR);
Auke Kok9d5c8242008-01-24 02:22:38 -08003416
PJ Waskiewicz844290e2008-06-27 11:00:39 -07003417 /* reading ICR causes bit 31 of EICR to be cleared */
Alexander Duyckdda0e082009-02-06 23:19:08 +00003418
3419 if(icr & E1000_ICR_DOUTSYNC) {
3420 /* HW is reporting DMA is out of sync */
3421 adapter->stats.doosync++;
3422 }
PJ Waskiewicz844290e2008-06-27 11:00:39 -07003423 if (!(icr & E1000_ICR_LSC))
3424 goto no_link_interrupt;
3425 hw->mac.get_link_status = 1;
3426 /* guard against interrupt when we're going down */
3427 if (!test_bit(__IGB_DOWN, &adapter->state))
3428 mod_timer(&adapter->watchdog_timer, jiffies + 1);
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00003429
Auke Kok9d5c8242008-01-24 02:22:38 -08003430no_link_interrupt:
Alexander Duyckdda0e082009-02-06 23:19:08 +00003431 wr32(E1000_IMS, E1000_IMS_LSC | E1000_IMS_DOUTSYNC);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07003432 wr32(E1000_EIMS, adapter->eims_other);
Auke Kok9d5c8242008-01-24 02:22:38 -08003433
3434 return IRQ_HANDLED;
3435}
3436
3437static irqreturn_t igb_msix_tx(int irq, void *data)
3438{
3439 struct igb_ring *tx_ring = data;
3440 struct igb_adapter *adapter = tx_ring->adapter;
3441 struct e1000_hw *hw = &adapter->hw;
3442
Jeff Kirsher421e02f2008-10-17 11:08:31 -07003443#ifdef CONFIG_IGB_DCA
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003444 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003445 igb_update_tx_dca(tx_ring);
3446#endif
Alexander Duyck73cd78f2009-02-12 18:16:59 +00003447
Auke Kok9d5c8242008-01-24 02:22:38 -08003448 tx_ring->total_bytes = 0;
3449 tx_ring->total_packets = 0;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003450
3451 /* auto mask will automatically reenable the interrupt when we write
3452 * EICS */
Mitch Williams3b644cf2008-06-27 10:59:48 -07003453 if (!igb_clean_tx_irq(tx_ring))
Auke Kok9d5c8242008-01-24 02:22:38 -08003454 /* Ring was not completely cleaned, so fire another interrupt */
3455 wr32(E1000_EICS, tx_ring->eims_value);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003456 else
Auke Kok9d5c8242008-01-24 02:22:38 -08003457 wr32(E1000_EIMS, tx_ring->eims_value);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003458
Auke Kok9d5c8242008-01-24 02:22:38 -08003459 return IRQ_HANDLED;
3460}
3461
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003462static void igb_write_itr(struct igb_ring *ring)
3463{
3464 struct e1000_hw *hw = &ring->adapter->hw;
3465 if ((ring->adapter->itr_setting & 3) && ring->set_itr) {
3466 switch (hw->mac.type) {
3467 case e1000_82576:
Alexander Duyck73cd78f2009-02-12 18:16:59 +00003468 wr32(ring->itr_register, ring->itr_val |
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003469 0x80000000);
3470 break;
3471 default:
Alexander Duyck73cd78f2009-02-12 18:16:59 +00003472 wr32(ring->itr_register, ring->itr_val |
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003473 (ring->itr_val << 16));
3474 break;
3475 }
3476 ring->set_itr = 0;
3477 }
3478}
3479
Auke Kok9d5c8242008-01-24 02:22:38 -08003480static irqreturn_t igb_msix_rx(int irq, void *data)
3481{
3482 struct igb_ring *rx_ring = data;
Auke Kok9d5c8242008-01-24 02:22:38 -08003483
PJ Waskiewicz844290e2008-06-27 11:00:39 -07003484 /* Write the ITR value calculated at the end of the
3485 * previous interrupt.
3486 */
Auke Kok9d5c8242008-01-24 02:22:38 -08003487
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003488 igb_write_itr(rx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08003489
Ben Hutchings288379f2009-01-19 16:43:59 -08003490 if (napi_schedule_prep(&rx_ring->napi))
3491 __napi_schedule(&rx_ring->napi);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07003492
Jeff Kirsher421e02f2008-10-17 11:08:31 -07003493#ifdef CONFIG_IGB_DCA
David S. Miller8d253322008-12-26 15:13:55 -08003494 if (rx_ring->adapter->flags & IGB_FLAG_DCA_ENABLED)
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003495 igb_update_rx_dca(rx_ring);
3496#endif
3497 return IRQ_HANDLED;
Auke Kok9d5c8242008-01-24 02:22:38 -08003498}
3499
Jeff Kirsher421e02f2008-10-17 11:08:31 -07003500#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003501static void igb_update_rx_dca(struct igb_ring *rx_ring)
3502{
3503 u32 dca_rxctrl;
3504 struct igb_adapter *adapter = rx_ring->adapter;
3505 struct e1000_hw *hw = &adapter->hw;
3506 int cpu = get_cpu();
Alexander Duyck26bc19e2008-12-26 01:34:11 -08003507 int q = rx_ring->reg_idx;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003508
3509 if (rx_ring->cpu != cpu) {
3510 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
Alexander Duyck2d064c02008-07-08 15:10:12 -07003511 if (hw->mac.type == e1000_82576) {
3512 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
3513 dca_rxctrl |= dca_get_tag(cpu) <<
3514 E1000_DCA_RXCTRL_CPUID_SHIFT;
3515 } else {
3516 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
3517 dca_rxctrl |= dca_get_tag(cpu);
3518 }
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003519 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
3520 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
3521 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
3522 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
3523 rx_ring->cpu = cpu;
3524 }
3525 put_cpu();
3526}
3527
3528static void igb_update_tx_dca(struct igb_ring *tx_ring)
3529{
3530 u32 dca_txctrl;
3531 struct igb_adapter *adapter = tx_ring->adapter;
3532 struct e1000_hw *hw = &adapter->hw;
3533 int cpu = get_cpu();
Alexander Duyck26bc19e2008-12-26 01:34:11 -08003534 int q = tx_ring->reg_idx;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003535
3536 if (tx_ring->cpu != cpu) {
3537 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
Alexander Duyck2d064c02008-07-08 15:10:12 -07003538 if (hw->mac.type == e1000_82576) {
3539 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
3540 dca_txctrl |= dca_get_tag(cpu) <<
3541 E1000_DCA_TXCTRL_CPUID_SHIFT;
3542 } else {
3543 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
3544 dca_txctrl |= dca_get_tag(cpu);
3545 }
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003546 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
3547 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
3548 tx_ring->cpu = cpu;
3549 }
3550 put_cpu();
3551}
3552
3553static void igb_setup_dca(struct igb_adapter *adapter)
3554{
3555 int i;
3556
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003557 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003558 return;
3559
3560 for (i = 0; i < adapter->num_tx_queues; i++) {
3561 adapter->tx_ring[i].cpu = -1;
3562 igb_update_tx_dca(&adapter->tx_ring[i]);
3563 }
3564 for (i = 0; i < adapter->num_rx_queues; i++) {
3565 adapter->rx_ring[i].cpu = -1;
3566 igb_update_rx_dca(&adapter->rx_ring[i]);
3567 }
3568}
3569
3570static int __igb_notify_dca(struct device *dev, void *data)
3571{
3572 struct net_device *netdev = dev_get_drvdata(dev);
3573 struct igb_adapter *adapter = netdev_priv(netdev);
3574 struct e1000_hw *hw = &adapter->hw;
3575 unsigned long event = *(unsigned long *)data;
3576
3577 switch (event) {
3578 case DCA_PROVIDER_ADD:
3579 /* if already enabled, don't do it again */
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003580 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003581 break;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003582 /* Always use CB2 mode, difference is masked
3583 * in the CB driver. */
Alexander Duyckcbd347a2009-02-15 23:59:44 -08003584 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003585 if (dca_add_requester(dev) == 0) {
Alexander Duyckbbd98fe2009-01-31 00:52:30 -08003586 adapter->flags |= IGB_FLAG_DCA_ENABLED;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003587 dev_info(&adapter->pdev->dev, "DCA enabled\n");
3588 igb_setup_dca(adapter);
3589 break;
3590 }
3591 /* Fall Through since DCA is disabled. */
3592 case DCA_PROVIDER_REMOVE:
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003593 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003594 /* without this a class_device is left
3595 * hanging around in the sysfs model */
3596 dca_remove_requester(dev);
3597 dev_info(&adapter->pdev->dev, "DCA disabled\n");
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003598 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
Alexander Duyckcbd347a2009-02-15 23:59:44 -08003599 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003600 }
3601 break;
3602 }
Alexander Duyckbbd98fe2009-01-31 00:52:30 -08003603
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003604 return 0;
3605}
3606
3607static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
3608 void *p)
3609{
3610 int ret_val;
3611
3612 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
3613 __igb_notify_dca);
3614
3615 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3616}
Jeff Kirsher421e02f2008-10-17 11:08:31 -07003617#endif /* CONFIG_IGB_DCA */
Auke Kok9d5c8242008-01-24 02:22:38 -08003618
3619/**
3620 * igb_intr_msi - Interrupt Handler
3621 * @irq: interrupt number
3622 * @data: pointer to a network interface device structure
3623 **/
3624static irqreturn_t igb_intr_msi(int irq, void *data)
3625{
3626 struct net_device *netdev = data;
3627 struct igb_adapter *adapter = netdev_priv(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08003628 struct e1000_hw *hw = &adapter->hw;
3629 /* read ICR disables interrupts using IAM */
3630 u32 icr = rd32(E1000_ICR);
3631
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003632 igb_write_itr(adapter->rx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08003633
Alexander Duyckdda0e082009-02-06 23:19:08 +00003634 if(icr & E1000_ICR_DOUTSYNC) {
3635 /* HW is reporting DMA is out of sync */
3636 adapter->stats.doosync++;
3637 }
3638
Auke Kok9d5c8242008-01-24 02:22:38 -08003639 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3640 hw->mac.get_link_status = 1;
3641 if (!test_bit(__IGB_DOWN, &adapter->state))
3642 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3643 }
3644
Ben Hutchings288379f2009-01-19 16:43:59 -08003645 napi_schedule(&adapter->rx_ring[0].napi);
Auke Kok9d5c8242008-01-24 02:22:38 -08003646
3647 return IRQ_HANDLED;
3648}
3649
3650/**
Alexander Duyck4a3c6432009-02-06 23:20:49 +00003651 * igb_intr - Legacy Interrupt Handler
Auke Kok9d5c8242008-01-24 02:22:38 -08003652 * @irq: interrupt number
3653 * @data: pointer to a network interface device structure
3654 **/
3655static irqreturn_t igb_intr(int irq, void *data)
3656{
3657 struct net_device *netdev = data;
3658 struct igb_adapter *adapter = netdev_priv(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08003659 struct e1000_hw *hw = &adapter->hw;
3660 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3661 * need for the IMC write */
3662 u32 icr = rd32(E1000_ICR);
Auke Kok9d5c8242008-01-24 02:22:38 -08003663 if (!icr)
3664 return IRQ_NONE; /* Not our interrupt */
3665
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003666 igb_write_itr(adapter->rx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08003667
3668 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3669 * not set, then the adapter didn't send an interrupt */
3670 if (!(icr & E1000_ICR_INT_ASSERTED))
3671 return IRQ_NONE;
3672
Alexander Duyckdda0e082009-02-06 23:19:08 +00003673 if(icr & E1000_ICR_DOUTSYNC) {
3674 /* HW is reporting DMA is out of sync */
3675 adapter->stats.doosync++;
3676 }
3677
Auke Kok9d5c8242008-01-24 02:22:38 -08003678 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3679 hw->mac.get_link_status = 1;
3680 /* guard against interrupt when we're going down */
3681 if (!test_bit(__IGB_DOWN, &adapter->state))
3682 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3683 }
3684
Ben Hutchings288379f2009-01-19 16:43:59 -08003685 napi_schedule(&adapter->rx_ring[0].napi);
Auke Kok9d5c8242008-01-24 02:22:38 -08003686
3687 return IRQ_HANDLED;
3688}
3689
Alexander Duyck46544252009-02-19 20:39:04 -08003690static inline void igb_rx_irq_enable(struct igb_ring *rx_ring)
3691{
3692 struct igb_adapter *adapter = rx_ring->adapter;
3693 struct e1000_hw *hw = &adapter->hw;
3694
3695 if (adapter->itr_setting & 3) {
3696 if (adapter->num_rx_queues == 1)
3697 igb_set_itr(adapter);
3698 else
3699 igb_update_ring_itr(rx_ring);
3700 }
3701
3702 if (!test_bit(__IGB_DOWN, &adapter->state)) {
3703 if (adapter->msix_entries)
3704 wr32(E1000_EIMS, rx_ring->eims_value);
3705 else
3706 igb_irq_enable(adapter);
3707 }
3708}
3709
Auke Kok9d5c8242008-01-24 02:22:38 -08003710/**
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003711 * igb_poll - NAPI Rx polling callback
3712 * @napi: napi polling structure
3713 * @budget: count of how many packets we should handle
Auke Kok9d5c8242008-01-24 02:22:38 -08003714 **/
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003715static int igb_poll(struct napi_struct *napi, int budget)
Auke Kok9d5c8242008-01-24 02:22:38 -08003716{
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003717 struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3718 struct igb_adapter *adapter = rx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08003719 struct net_device *netdev = adapter->netdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08003720 int work_done = 0;
3721
Jeff Kirsher421e02f2008-10-17 11:08:31 -07003722#ifdef CONFIG_IGB_DCA
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003723 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
Jeb Cramerfe4506b2008-07-08 15:07:55 -07003724 igb_update_rx_dca(rx_ring);
3725#endif
Mitch Williams3b644cf2008-06-27 10:59:48 -07003726 igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
Auke Kok9d5c8242008-01-24 02:22:38 -08003727
Alexander Duyck46544252009-02-19 20:39:04 -08003728 if (rx_ring->buddy) {
3729#ifdef CONFIG_IGB_DCA
3730 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3731 igb_update_tx_dca(rx_ring->buddy);
3732#endif
3733 if (!igb_clean_tx_irq(rx_ring->buddy))
3734 work_done = budget;
Auke Kok9d5c8242008-01-24 02:22:38 -08003735 }
3736
Alexander Duyck46544252009-02-19 20:39:04 -08003737 /* If not enough Rx work done, exit the polling mode */
3738 if ((work_done < budget) || !netif_running(netdev)) {
3739 napi_complete(napi);
3740 igb_rx_irq_enable(rx_ring);
3741 }
3742
3743 return work_done;
Auke Kok9d5c8242008-01-24 02:22:38 -08003744}
Al Viro6d8126f2008-03-16 22:23:24 +00003745
Auke Kok9d5c8242008-01-24 02:22:38 -08003746/**
Patrick Ohly33af6bc2009-02-12 05:03:43 +00003747 * igb_hwtstamp - utility function which checks for TX time stamp
3748 * @adapter: board private structure
3749 * @skb: packet that was just sent
3750 *
3751 * If we were asked to do hardware stamping and such a time stamp is
3752 * available, then it must have been for this skb here because we only
3753 * allow only one such packet into the queue.
3754 */
3755static void igb_tx_hwtstamp(struct igb_adapter *adapter, struct sk_buff *skb)
3756{
3757 union skb_shared_tx *shtx = skb_tx(skb);
3758 struct e1000_hw *hw = &adapter->hw;
3759
3760 if (unlikely(shtx->hardware)) {
3761 u32 valid = rd32(E1000_TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID;
3762 if (valid) {
3763 u64 regval = rd32(E1000_TXSTMPL);
3764 u64 ns;
3765 struct skb_shared_hwtstamps shhwtstamps;
3766
3767 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
3768 regval |= (u64)rd32(E1000_TXSTMPH) << 32;
3769 ns = timecounter_cyc2time(&adapter->clock,
3770 regval);
3771 timecompare_update(&adapter->compare, ns);
3772 shhwtstamps.hwtstamp = ns_to_ktime(ns);
3773 shhwtstamps.syststamp =
3774 timecompare_transform(&adapter->compare, ns);
3775 skb_tstamp_tx(skb, &shhwtstamps);
3776 }
3777
3778 /* delayed orphaning: skb_tstamp_tx() needs the socket */
3779 skb_orphan(skb);
3780 }
3781}
3782
3783/**
Auke Kok9d5c8242008-01-24 02:22:38 -08003784 * igb_clean_tx_irq - Reclaim resources after transmit completes
3785 * @adapter: board private structure
3786 * returns true if ring is completely cleaned
3787 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07003788static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08003789{
Mitch Williams3b644cf2008-06-27 10:59:48 -07003790 struct igb_adapter *adapter = tx_ring->adapter;
Mitch Williams3b644cf2008-06-27 10:59:48 -07003791 struct net_device *netdev = adapter->netdev;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003792 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08003793 struct igb_buffer *buffer_info;
3794 struct sk_buff *skb;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003795 union e1000_adv_tx_desc *tx_desc, *eop_desc;
Auke Kok9d5c8242008-01-24 02:22:38 -08003796 unsigned int total_bytes = 0, total_packets = 0;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003797 unsigned int i, eop, count = 0;
3798 bool cleaned = false;
Auke Kok9d5c8242008-01-24 02:22:38 -08003799
Auke Kok9d5c8242008-01-24 02:22:38 -08003800 i = tx_ring->next_to_clean;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003801 eop = tx_ring->buffer_info[i].next_to_watch;
3802 eop_desc = E1000_TX_DESC_ADV(*tx_ring, eop);
3803
3804 while ((eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3805 (count < tx_ring->count)) {
3806 for (cleaned = false; !cleaned; count++) {
3807 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
Auke Kok9d5c8242008-01-24 02:22:38 -08003808 buffer_info = &tx_ring->buffer_info[i];
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003809 cleaned = (i == eop);
Auke Kok9d5c8242008-01-24 02:22:38 -08003810 skb = buffer_info->skb;
3811
3812 if (skb) {
3813 unsigned int segs, bytecount;
3814 /* gso_segs is currently only valid for tcp */
3815 segs = skb_shinfo(skb)->gso_segs ?: 1;
3816 /* multiply data chunks by size of headers */
3817 bytecount = ((segs - 1) * skb_headlen(skb)) +
3818 skb->len;
3819 total_packets += segs;
3820 total_bytes += bytecount;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00003821
3822 igb_tx_hwtstamp(adapter, skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08003823 }
3824
3825 igb_unmap_and_free_tx_resource(adapter, buffer_info);
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003826 tx_desc->wb.status = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08003827
3828 i++;
3829 if (i == tx_ring->count)
3830 i = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08003831 }
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003832 eop = tx_ring->buffer_info[i].next_to_watch;
3833 eop_desc = E1000_TX_DESC_ADV(*tx_ring, eop);
3834 }
3835
Auke Kok9d5c8242008-01-24 02:22:38 -08003836 tx_ring->next_to_clean = i;
3837
Alexander Duyckfc7d3452008-08-26 04:25:08 -07003838 if (unlikely(count &&
Auke Kok9d5c8242008-01-24 02:22:38 -08003839 netif_carrier_ok(netdev) &&
3840 IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3841 /* Make sure that anybody stopping the queue after this
3842 * sees the new next_to_clean.
3843 */
3844 smp_mb();
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003845 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
3846 !(test_bit(__IGB_DOWN, &adapter->state))) {
3847 netif_wake_subqueue(netdev, tx_ring->queue_index);
3848 ++adapter->restart_queue;
3849 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003850 }
3851
3852 if (tx_ring->detect_tx_hung) {
3853 /* Detect a transmit hang in hardware, this serializes the
3854 * check with the clearing of time_stamp and movement of i */
3855 tx_ring->detect_tx_hung = false;
3856 if (tx_ring->buffer_info[i].time_stamp &&
3857 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3858 (adapter->tx_timeout_factor * HZ))
3859 && !(rd32(E1000_STATUS) &
3860 E1000_STATUS_TXOFF)) {
3861
Auke Kok9d5c8242008-01-24 02:22:38 -08003862 /* detected Tx unit hang */
3863 dev_err(&adapter->pdev->dev,
3864 "Detected Tx Unit Hang\n"
Alexander Duyck2d064c02008-07-08 15:10:12 -07003865 " Tx Queue <%d>\n"
Auke Kok9d5c8242008-01-24 02:22:38 -08003866 " TDH <%x>\n"
3867 " TDT <%x>\n"
3868 " next_to_use <%x>\n"
3869 " next_to_clean <%x>\n"
Auke Kok9d5c8242008-01-24 02:22:38 -08003870 "buffer_info[next_to_clean]\n"
3871 " time_stamp <%lx>\n"
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003872 " next_to_watch <%x>\n"
Auke Kok9d5c8242008-01-24 02:22:38 -08003873 " jiffies <%lx>\n"
3874 " desc.status <%x>\n",
Alexander Duyck2d064c02008-07-08 15:10:12 -07003875 tx_ring->queue_index,
Auke Kok9d5c8242008-01-24 02:22:38 -08003876 readl(adapter->hw.hw_addr + tx_ring->head),
3877 readl(adapter->hw.hw_addr + tx_ring->tail),
3878 tx_ring->next_to_use,
3879 tx_ring->next_to_clean,
Auke Kok9d5c8242008-01-24 02:22:38 -08003880 tx_ring->buffer_info[i].time_stamp,
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003881 eop,
Auke Kok9d5c8242008-01-24 02:22:38 -08003882 jiffies,
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003883 eop_desc->wb.status);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003884 netif_stop_subqueue(netdev, tx_ring->queue_index);
Auke Kok9d5c8242008-01-24 02:22:38 -08003885 }
3886 }
3887 tx_ring->total_bytes += total_bytes;
3888 tx_ring->total_packets += total_packets;
Alexander Duycke21ed352008-07-08 15:07:24 -07003889 tx_ring->tx_stats.bytes += total_bytes;
3890 tx_ring->tx_stats.packets += total_packets;
Auke Kok9d5c8242008-01-24 02:22:38 -08003891 adapter->net_stats.tx_bytes += total_bytes;
3892 adapter->net_stats.tx_packets += total_packets;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003893 return (count < tx_ring->count);
Auke Kok9d5c8242008-01-24 02:22:38 -08003894}
3895
Auke Kok9d5c8242008-01-24 02:22:38 -08003896/**
3897 * igb_receive_skb - helper function to handle rx indications
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00003898 * @ring: pointer to receive ring receving this packet
Auke Kok9d5c8242008-01-24 02:22:38 -08003899 * @status: descriptor status field as written by hardware
Alexander Duyck73cd78f2009-02-12 18:16:59 +00003900 * @rx_desc: receive descriptor containing vlan and type information.
Auke Kok9d5c8242008-01-24 02:22:38 -08003901 * @skb: pointer to sk_buff to be indicated to stack
3902 **/
Alexander Duyckd3352522008-07-08 15:12:13 -07003903static void igb_receive_skb(struct igb_ring *ring, u8 status,
3904 union e1000_adv_rx_desc * rx_desc,
3905 struct sk_buff *skb)
Auke Kok9d5c8242008-01-24 02:22:38 -08003906{
Alexander Duyckd3352522008-07-08 15:12:13 -07003907 struct igb_adapter * adapter = ring->adapter;
3908 bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP));
3909
David S. Miller0c8dfc82009-01-27 16:22:32 -08003910 skb_record_rx_queue(skb, ring->queue_index);
Herbert Xu5c0999b2009-01-19 15:20:57 -08003911 if (skb->ip_summed == CHECKSUM_UNNECESSARY) {
Alexander Duyckd3352522008-07-08 15:12:13 -07003912 if (vlan_extracted)
Herbert Xu5c0999b2009-01-19 15:20:57 -08003913 vlan_gro_receive(&ring->napi, adapter->vlgrp,
3914 le16_to_cpu(rx_desc->wb.upper.vlan),
3915 skb);
Alexander Duyckd3352522008-07-08 15:12:13 -07003916 else
Herbert Xu5c0999b2009-01-19 15:20:57 -08003917 napi_gro_receive(&ring->napi, skb);
Alexander Duyckd3352522008-07-08 15:12:13 -07003918 } else {
Alexander Duyckd3352522008-07-08 15:12:13 -07003919 if (vlan_extracted)
3920 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3921 le16_to_cpu(rx_desc->wb.upper.vlan));
3922 else
Alexander Duyckd3352522008-07-08 15:12:13 -07003923 netif_receive_skb(skb);
Alexander Duyckd3352522008-07-08 15:12:13 -07003924 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003925}
3926
Auke Kok9d5c8242008-01-24 02:22:38 -08003927static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3928 u32 status_err, struct sk_buff *skb)
3929{
3930 skb->ip_summed = CHECKSUM_NONE;
3931
3932 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3933 if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3934 return;
3935 /* TCP/UDP checksum error bit is set */
3936 if (status_err &
3937 (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3938 /* let the stack verify checksum errors */
3939 adapter->hw_csum_err++;
3940 return;
3941 }
3942 /* It must be a TCP or UDP packet with a valid checksum */
3943 if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3944 skb->ip_summed = CHECKSUM_UNNECESSARY;
3945
3946 adapter->hw_csum_good++;
3947}
3948
Mitch Williams3b644cf2008-06-27 10:59:48 -07003949static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3950 int *work_done, int budget)
Auke Kok9d5c8242008-01-24 02:22:38 -08003951{
Mitch Williams3b644cf2008-06-27 10:59:48 -07003952 struct igb_adapter *adapter = rx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08003953 struct net_device *netdev = adapter->netdev;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00003954 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08003955 struct pci_dev *pdev = adapter->pdev;
3956 union e1000_adv_rx_desc *rx_desc , *next_rxd;
3957 struct igb_buffer *buffer_info , *next_buffer;
3958 struct sk_buff *skb;
Auke Kok9d5c8242008-01-24 02:22:38 -08003959 bool cleaned = false;
3960 int cleaned_count = 0;
3961 unsigned int total_bytes = 0, total_packets = 0;
Alexander Duyck73cd78f2009-02-12 18:16:59 +00003962 unsigned int i;
3963 u32 length, hlen, staterr;
Auke Kok9d5c8242008-01-24 02:22:38 -08003964
3965 i = rx_ring->next_to_clean;
Alexander Duyck69d3ca52009-02-06 23:15:04 +00003966 buffer_info = &rx_ring->buffer_info[i];
Auke Kok9d5c8242008-01-24 02:22:38 -08003967 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3968 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3969
3970 while (staterr & E1000_RXD_STAT_DD) {
3971 if (*work_done >= budget)
3972 break;
3973 (*work_done)++;
Alexander Duyck69d3ca52009-02-06 23:15:04 +00003974
3975 skb = buffer_info->skb;
3976 prefetch(skb->data - NET_IP_ALIGN);
3977 buffer_info->skb = NULL;
3978
3979 i++;
3980 if (i == rx_ring->count)
3981 i = 0;
3982 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3983 prefetch(next_rxd);
3984 next_buffer = &rx_ring->buffer_info[i];
3985
3986 length = le16_to_cpu(rx_desc->wb.upper.length);
3987 cleaned = true;
3988 cleaned_count++;
3989
3990 if (!adapter->rx_ps_hdr_size) {
3991 pci_unmap_single(pdev, buffer_info->dma,
3992 adapter->rx_buffer_len +
3993 NET_IP_ALIGN,
3994 PCI_DMA_FROMDEVICE);
3995 skb_put(skb, length);
3996 goto send_up;
3997 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003998
3999 /* HW will not DMA in data larger than the given buffer, even
4000 * if it parses the (NFS, of course) header to be larger. In
4001 * that case, it fills the header buffer and spills the rest
4002 * into the page.
4003 */
Al Viro7deb07b2008-03-16 22:43:06 +00004004 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
4005 E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
Auke Kok9d5c8242008-01-24 02:22:38 -08004006 if (hlen > adapter->rx_ps_hdr_size)
4007 hlen = adapter->rx_ps_hdr_size;
4008
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07004009 if (!skb_shinfo(skb)->nr_frags) {
4010 pci_unmap_single(pdev, buffer_info->dma,
Alexander Duyck73cd78f2009-02-12 18:16:59 +00004011 adapter->rx_ps_hdr_size + NET_IP_ALIGN,
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07004012 PCI_DMA_FROMDEVICE);
4013 skb_put(skb, hlen);
4014 }
4015
4016 if (length) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004017 pci_unmap_page(pdev, buffer_info->page_dma,
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07004018 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
Auke Kok9d5c8242008-01-24 02:22:38 -08004019 buffer_info->page_dma = 0;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07004020
4021 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
4022 buffer_info->page,
4023 buffer_info->page_offset,
4024 length);
4025
4026 if ((adapter->rx_buffer_len > (PAGE_SIZE / 2)) ||
4027 (page_count(buffer_info->page) != 1))
4028 buffer_info->page = NULL;
4029 else
4030 get_page(buffer_info->page);
Auke Kok9d5c8242008-01-24 02:22:38 -08004031
4032 skb->len += length;
4033 skb->data_len += length;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07004034
Auke Kok9d5c8242008-01-24 02:22:38 -08004035 skb->truesize += length;
Auke Kok9d5c8242008-01-24 02:22:38 -08004036 }
Auke Kok9d5c8242008-01-24 02:22:38 -08004037
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07004038 if (!(staterr & E1000_RXD_STAT_EOP)) {
Alexander Duyckb2d56532008-11-20 00:47:34 -08004039 buffer_info->skb = next_buffer->skb;
4040 buffer_info->dma = next_buffer->dma;
4041 next_buffer->skb = skb;
4042 next_buffer->dma = 0;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07004043 goto next_desc;
4044 }
Alexander Duyck69d3ca52009-02-06 23:15:04 +00004045send_up:
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004046 /*
4047 * If this bit is set, then the RX registers contain
4048 * the time stamp. No other packet will be time
4049 * stamped until we read these registers, so read the
4050 * registers to make them available again. Because
4051 * only one packet can be time stamped at a time, we
4052 * know that the register values must belong to this
4053 * one here and therefore we don't need to compare
4054 * any of the additional attributes stored for it.
4055 *
4056 * If nothing went wrong, then it should have a
4057 * skb_shared_tx that we can turn into a
4058 * skb_shared_hwtstamps.
4059 *
4060 * TODO: can time stamping be triggered (thus locking
4061 * the registers) without the packet reaching this point
4062 * here? In that case RX time stamping would get stuck.
4063 *
4064 * TODO: in "time stamp all packets" mode this bit is
4065 * not set. Need a global flag for this mode and then
4066 * always read the registers. Cannot be done without
4067 * a race condition.
4068 */
4069 if (unlikely(staterr & E1000_RXD_STAT_TS)) {
4070 u64 regval;
4071 u64 ns;
4072 struct skb_shared_hwtstamps *shhwtstamps =
4073 skb_hwtstamps(skb);
4074
4075 WARN(!(rd32(E1000_TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID),
4076 "igb: no RX time stamp available for time stamped packet");
4077 regval = rd32(E1000_RXSTMPL);
4078 regval |= (u64)rd32(E1000_RXSTMPH) << 32;
4079 ns = timecounter_cyc2time(&adapter->clock, regval);
4080 timecompare_update(&adapter->compare, ns);
4081 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
4082 shhwtstamps->hwtstamp = ns_to_ktime(ns);
4083 shhwtstamps->syststamp =
4084 timecompare_transform(&adapter->compare, ns);
4085 }
4086
Auke Kok9d5c8242008-01-24 02:22:38 -08004087 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
4088 dev_kfree_skb_irq(skb);
4089 goto next_desc;
4090 }
Auke Kok9d5c8242008-01-24 02:22:38 -08004091
4092 total_bytes += skb->len;
4093 total_packets++;
4094
4095 igb_rx_checksum_adv(adapter, staterr, skb);
4096
4097 skb->protocol = eth_type_trans(skb, netdev);
4098
Alexander Duyckd3352522008-07-08 15:12:13 -07004099 igb_receive_skb(rx_ring, staterr, rx_desc, skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08004100
Auke Kok9d5c8242008-01-24 02:22:38 -08004101next_desc:
4102 rx_desc->wb.upper.status_error = 0;
4103
4104 /* return some buffers to hardware, one at a time is too slow */
4105 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
Mitch Williams3b644cf2008-06-27 10:59:48 -07004106 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
Auke Kok9d5c8242008-01-24 02:22:38 -08004107 cleaned_count = 0;
4108 }
4109
4110 /* use prefetched values */
4111 rx_desc = next_rxd;
4112 buffer_info = next_buffer;
Auke Kok9d5c8242008-01-24 02:22:38 -08004113 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
4114 }
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07004115
Auke Kok9d5c8242008-01-24 02:22:38 -08004116 rx_ring->next_to_clean = i;
4117 cleaned_count = IGB_DESC_UNUSED(rx_ring);
4118
4119 if (cleaned_count)
Mitch Williams3b644cf2008-06-27 10:59:48 -07004120 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
Auke Kok9d5c8242008-01-24 02:22:38 -08004121
4122 rx_ring->total_packets += total_packets;
4123 rx_ring->total_bytes += total_bytes;
4124 rx_ring->rx_stats.packets += total_packets;
4125 rx_ring->rx_stats.bytes += total_bytes;
4126 adapter->net_stats.rx_bytes += total_bytes;
4127 adapter->net_stats.rx_packets += total_packets;
4128 return cleaned;
4129}
4130
Auke Kok9d5c8242008-01-24 02:22:38 -08004131/**
4132 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
4133 * @adapter: address of board private structure
4134 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07004135static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
Auke Kok9d5c8242008-01-24 02:22:38 -08004136 int cleaned_count)
4137{
Mitch Williams3b644cf2008-06-27 10:59:48 -07004138 struct igb_adapter *adapter = rx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08004139 struct net_device *netdev = adapter->netdev;
4140 struct pci_dev *pdev = adapter->pdev;
4141 union e1000_adv_rx_desc *rx_desc;
4142 struct igb_buffer *buffer_info;
4143 struct sk_buff *skb;
4144 unsigned int i;
Alexander Duyckdb761762009-02-06 23:15:25 +00004145 int bufsz;
Auke Kok9d5c8242008-01-24 02:22:38 -08004146
4147 i = rx_ring->next_to_use;
4148 buffer_info = &rx_ring->buffer_info[i];
4149
Alexander Duyckdb761762009-02-06 23:15:25 +00004150 if (adapter->rx_ps_hdr_size)
4151 bufsz = adapter->rx_ps_hdr_size;
4152 else
4153 bufsz = adapter->rx_buffer_len;
4154 bufsz += NET_IP_ALIGN;
4155
Auke Kok9d5c8242008-01-24 02:22:38 -08004156 while (cleaned_count--) {
4157 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
4158
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07004159 if (adapter->rx_ps_hdr_size && !buffer_info->page_dma) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004160 if (!buffer_info->page) {
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07004161 buffer_info->page = alloc_page(GFP_ATOMIC);
4162 if (!buffer_info->page) {
4163 adapter->alloc_rx_buff_failed++;
4164 goto no_buffers;
4165 }
4166 buffer_info->page_offset = 0;
4167 } else {
4168 buffer_info->page_offset ^= PAGE_SIZE / 2;
Auke Kok9d5c8242008-01-24 02:22:38 -08004169 }
4170 buffer_info->page_dma =
Alexander Duyckdb761762009-02-06 23:15:25 +00004171 pci_map_page(pdev, buffer_info->page,
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07004172 buffer_info->page_offset,
4173 PAGE_SIZE / 2,
Auke Kok9d5c8242008-01-24 02:22:38 -08004174 PCI_DMA_FROMDEVICE);
4175 }
4176
4177 if (!buffer_info->skb) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004178 skb = netdev_alloc_skb(netdev, bufsz);
Auke Kok9d5c8242008-01-24 02:22:38 -08004179 if (!skb) {
4180 adapter->alloc_rx_buff_failed++;
4181 goto no_buffers;
4182 }
4183
4184 /* Make buffer alignment 2 beyond a 16 byte boundary
4185 * this will result in a 16 byte aligned IP header after
4186 * the 14 byte MAC header is removed
4187 */
4188 skb_reserve(skb, NET_IP_ALIGN);
4189
4190 buffer_info->skb = skb;
4191 buffer_info->dma = pci_map_single(pdev, skb->data,
4192 bufsz,
4193 PCI_DMA_FROMDEVICE);
Auke Kok9d5c8242008-01-24 02:22:38 -08004194 }
4195 /* Refresh the desc even if buffer_addrs didn't change because
4196 * each write-back erases this info. */
4197 if (adapter->rx_ps_hdr_size) {
4198 rx_desc->read.pkt_addr =
4199 cpu_to_le64(buffer_info->page_dma);
4200 rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
4201 } else {
4202 rx_desc->read.pkt_addr =
4203 cpu_to_le64(buffer_info->dma);
4204 rx_desc->read.hdr_addr = 0;
4205 }
4206
4207 i++;
4208 if (i == rx_ring->count)
4209 i = 0;
4210 buffer_info = &rx_ring->buffer_info[i];
4211 }
4212
4213no_buffers:
4214 if (rx_ring->next_to_use != i) {
4215 rx_ring->next_to_use = i;
4216 if (i == 0)
4217 i = (rx_ring->count - 1);
4218 else
4219 i--;
4220
4221 /* Force memory writes to complete before letting h/w
4222 * know there are new descriptors to fetch. (Only
4223 * applicable for weak-ordered memory model archs,
4224 * such as IA-64). */
4225 wmb();
4226 writel(i, adapter->hw.hw_addr + rx_ring->tail);
4227 }
4228}
4229
4230/**
4231 * igb_mii_ioctl -
4232 * @netdev:
4233 * @ifreq:
4234 * @cmd:
4235 **/
4236static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4237{
4238 struct igb_adapter *adapter = netdev_priv(netdev);
4239 struct mii_ioctl_data *data = if_mii(ifr);
4240
4241 if (adapter->hw.phy.media_type != e1000_media_type_copper)
4242 return -EOPNOTSUPP;
4243
4244 switch (cmd) {
4245 case SIOCGMIIPHY:
4246 data->phy_id = adapter->hw.phy.addr;
4247 break;
4248 case SIOCGMIIREG:
4249 if (!capable(CAP_NET_ADMIN))
4250 return -EPERM;
Alexander Duyckf5f4cf02008-11-21 21:30:24 -08004251 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4252 &data->val_out))
Auke Kok9d5c8242008-01-24 02:22:38 -08004253 return -EIO;
4254 break;
4255 case SIOCSMIIREG:
4256 default:
4257 return -EOPNOTSUPP;
4258 }
4259 return 0;
4260}
4261
4262/**
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00004263 * igb_hwtstamp_ioctl - control hardware time stamping
4264 * @netdev:
4265 * @ifreq:
4266 * @cmd:
4267 *
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004268 * Outgoing time stamping can be enabled and disabled. Play nice and
4269 * disable it when requested, although it shouldn't case any overhead
4270 * when no packet needs it. At most one packet in the queue may be
4271 * marked for time stamping, otherwise it would be impossible to tell
4272 * for sure to which packet the hardware time stamp belongs.
4273 *
4274 * Incoming time stamping has to be configured via the hardware
4275 * filters. Not all combinations are supported, in particular event
4276 * type has to be specified. Matching the kind of event packet is
4277 * not supported, with the exception of "all V2 events regardless of
4278 * level 2 or 4".
4279 *
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00004280 **/
4281static int igb_hwtstamp_ioctl(struct net_device *netdev,
4282 struct ifreq *ifr, int cmd)
4283{
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004284 struct igb_adapter *adapter = netdev_priv(netdev);
4285 struct e1000_hw *hw = &adapter->hw;
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00004286 struct hwtstamp_config config;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004287 u32 tsync_tx_ctl_bit = E1000_TSYNCTXCTL_ENABLED;
4288 u32 tsync_rx_ctl_bit = E1000_TSYNCRXCTL_ENABLED;
4289 u32 tsync_rx_ctl_type = 0;
4290 u32 tsync_rx_cfg = 0;
4291 int is_l4 = 0;
4292 int is_l2 = 0;
4293 short port = 319; /* PTP */
4294 u32 regval;
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00004295
4296 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
4297 return -EFAULT;
4298
4299 /* reserved for future extensions */
4300 if (config.flags)
4301 return -EINVAL;
4302
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004303 switch (config.tx_type) {
4304 case HWTSTAMP_TX_OFF:
4305 tsync_tx_ctl_bit = 0;
4306 break;
4307 case HWTSTAMP_TX_ON:
4308 tsync_tx_ctl_bit = E1000_TSYNCTXCTL_ENABLED;
4309 break;
4310 default:
4311 return -ERANGE;
4312 }
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00004313
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004314 switch (config.rx_filter) {
4315 case HWTSTAMP_FILTER_NONE:
4316 tsync_rx_ctl_bit = 0;
4317 break;
4318 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
4319 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
4320 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
4321 case HWTSTAMP_FILTER_ALL:
4322 /*
4323 * register TSYNCRXCFG must be set, therefore it is not
4324 * possible to time stamp both Sync and Delay_Req messages
4325 * => fall back to time stamping all packets
4326 */
4327 tsync_rx_ctl_type = E1000_TSYNCRXCTL_TYPE_ALL;
4328 config.rx_filter = HWTSTAMP_FILTER_ALL;
4329 break;
4330 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
4331 tsync_rx_ctl_type = E1000_TSYNCRXCTL_TYPE_L4_V1;
4332 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE;
4333 is_l4 = 1;
4334 break;
4335 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
4336 tsync_rx_ctl_type = E1000_TSYNCRXCTL_TYPE_L4_V1;
4337 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE;
4338 is_l4 = 1;
4339 break;
4340 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
4341 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
4342 tsync_rx_ctl_type = E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
4343 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE;
4344 is_l2 = 1;
4345 is_l4 = 1;
4346 config.rx_filter = HWTSTAMP_FILTER_SOME;
4347 break;
4348 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
4349 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
4350 tsync_rx_ctl_type = E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
4351 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE;
4352 is_l2 = 1;
4353 is_l4 = 1;
4354 config.rx_filter = HWTSTAMP_FILTER_SOME;
4355 break;
4356 case HWTSTAMP_FILTER_PTP_V2_EVENT:
4357 case HWTSTAMP_FILTER_PTP_V2_SYNC:
4358 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
4359 tsync_rx_ctl_type = E1000_TSYNCRXCTL_TYPE_EVENT_V2;
4360 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
4361 is_l2 = 1;
4362 break;
4363 default:
4364 return -ERANGE;
4365 }
4366
4367 /* enable/disable TX */
4368 regval = rd32(E1000_TSYNCTXCTL);
4369 regval = (regval & ~E1000_TSYNCTXCTL_ENABLED) | tsync_tx_ctl_bit;
4370 wr32(E1000_TSYNCTXCTL, regval);
4371
4372 /* enable/disable RX, define which PTP packets are time stamped */
4373 regval = rd32(E1000_TSYNCRXCTL);
4374 regval = (regval & ~E1000_TSYNCRXCTL_ENABLED) | tsync_rx_ctl_bit;
4375 regval = (regval & ~0xE) | tsync_rx_ctl_type;
4376 wr32(E1000_TSYNCRXCTL, regval);
4377 wr32(E1000_TSYNCRXCFG, tsync_rx_cfg);
4378
4379 /*
4380 * Ethertype Filter Queue Filter[0][15:0] = 0x88F7
4381 * (Ethertype to filter on)
4382 * Ethertype Filter Queue Filter[0][26] = 0x1 (Enable filter)
4383 * Ethertype Filter Queue Filter[0][30] = 0x1 (Enable Timestamping)
4384 */
4385 wr32(E1000_ETQF0, is_l2 ? 0x440088f7 : 0);
4386
4387 /* L4 Queue Filter[0]: only filter by source and destination port */
4388 wr32(E1000_SPQF0, htons(port));
4389 wr32(E1000_IMIREXT(0), is_l4 ?
4390 ((1<<12) | (1<<19) /* bypass size and control flags */) : 0);
4391 wr32(E1000_IMIR(0), is_l4 ?
4392 (htons(port)
4393 | (0<<16) /* immediate interrupt disabled */
4394 | 0 /* (1<<17) bit cleared: do not bypass
4395 destination port check */)
4396 : 0);
4397 wr32(E1000_FTQF0, is_l4 ?
4398 (0x11 /* UDP */
4399 | (1<<15) /* VF not compared */
4400 | (1<<27) /* Enable Timestamping */
4401 | (7<<28) /* only source port filter enabled,
4402 source/target address and protocol
4403 masked */)
4404 : ((1<<15) | (15<<28) /* all mask bits set = filter not
4405 enabled */));
4406
4407 wrfl();
4408
4409 adapter->hwtstamp_config = config;
4410
4411 /* clear TX/RX time stamp registers, just to be sure */
4412 regval = rd32(E1000_TXSTMPH);
4413 regval = rd32(E1000_RXSTMPH);
4414
4415 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
4416 -EFAULT : 0;
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00004417}
4418
4419/**
Auke Kok9d5c8242008-01-24 02:22:38 -08004420 * igb_ioctl -
4421 * @netdev:
4422 * @ifreq:
4423 * @cmd:
4424 **/
4425static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4426{
4427 switch (cmd) {
4428 case SIOCGMIIPHY:
4429 case SIOCGMIIREG:
4430 case SIOCSMIIREG:
4431 return igb_mii_ioctl(netdev, ifr, cmd);
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00004432 case SIOCSHWTSTAMP:
4433 return igb_hwtstamp_ioctl(netdev, ifr, cmd);
Auke Kok9d5c8242008-01-24 02:22:38 -08004434 default:
4435 return -EOPNOTSUPP;
4436 }
4437}
4438
4439static void igb_vlan_rx_register(struct net_device *netdev,
4440 struct vlan_group *grp)
4441{
4442 struct igb_adapter *adapter = netdev_priv(netdev);
4443 struct e1000_hw *hw = &adapter->hw;
4444 u32 ctrl, rctl;
4445
4446 igb_irq_disable(adapter);
4447 adapter->vlgrp = grp;
4448
4449 if (grp) {
4450 /* enable VLAN tag insert/strip */
4451 ctrl = rd32(E1000_CTRL);
4452 ctrl |= E1000_CTRL_VME;
4453 wr32(E1000_CTRL, ctrl);
4454
4455 /* enable VLAN receive filtering */
4456 rctl = rd32(E1000_RCTL);
Auke Kok9d5c8242008-01-24 02:22:38 -08004457 rctl &= ~E1000_RCTL_CFIEN;
4458 wr32(E1000_RCTL, rctl);
4459 igb_update_mng_vlan(adapter);
4460 wr32(E1000_RLPML,
4461 adapter->max_frame_size + VLAN_TAG_SIZE);
4462 } else {
4463 /* disable VLAN tag insert/strip */
4464 ctrl = rd32(E1000_CTRL);
4465 ctrl &= ~E1000_CTRL_VME;
4466 wr32(E1000_CTRL, ctrl);
4467
Auke Kok9d5c8242008-01-24 02:22:38 -08004468 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
4469 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4470 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
4471 }
4472 wr32(E1000_RLPML,
4473 adapter->max_frame_size);
4474 }
4475
4476 if (!test_bit(__IGB_DOWN, &adapter->state))
4477 igb_irq_enable(adapter);
4478}
4479
4480static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4481{
4482 struct igb_adapter *adapter = netdev_priv(netdev);
4483 struct e1000_hw *hw = &adapter->hw;
4484 u32 vfta, index;
4485
Alexander Duyck28b07592009-02-06 23:20:31 +00004486 if ((hw->mng_cookie.status &
Auke Kok9d5c8242008-01-24 02:22:38 -08004487 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4488 (vid == adapter->mng_vlan_id))
4489 return;
4490 /* add VID to filter table */
4491 index = (vid >> 5) & 0x7F;
4492 vfta = array_rd32(E1000_VFTA, index);
4493 vfta |= (1 << (vid & 0x1F));
4494 igb_write_vfta(&adapter->hw, index, vfta);
4495}
4496
4497static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4498{
4499 struct igb_adapter *adapter = netdev_priv(netdev);
4500 struct e1000_hw *hw = &adapter->hw;
4501 u32 vfta, index;
4502
4503 igb_irq_disable(adapter);
4504 vlan_group_set_device(adapter->vlgrp, vid, NULL);
4505
4506 if (!test_bit(__IGB_DOWN, &adapter->state))
4507 igb_irq_enable(adapter);
4508
4509 if ((adapter->hw.mng_cookie.status &
4510 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4511 (vid == adapter->mng_vlan_id)) {
4512 /* release control to f/w */
4513 igb_release_hw_control(adapter);
4514 return;
4515 }
4516
4517 /* remove VID from filter table */
4518 index = (vid >> 5) & 0x7F;
4519 vfta = array_rd32(E1000_VFTA, index);
4520 vfta &= ~(1 << (vid & 0x1F));
4521 igb_write_vfta(&adapter->hw, index, vfta);
4522}
4523
4524static void igb_restore_vlan(struct igb_adapter *adapter)
4525{
4526 igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4527
4528 if (adapter->vlgrp) {
4529 u16 vid;
4530 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4531 if (!vlan_group_get_device(adapter->vlgrp, vid))
4532 continue;
4533 igb_vlan_rx_add_vid(adapter->netdev, vid);
4534 }
4535 }
4536}
4537
4538int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
4539{
4540 struct e1000_mac_info *mac = &adapter->hw.mac;
4541
4542 mac->autoneg = 0;
4543
4544 /* Fiber NICs only allow 1000 gbps Full duplex */
4545 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
4546 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4547 dev_err(&adapter->pdev->dev,
4548 "Unsupported Speed/Duplex configuration\n");
4549 return -EINVAL;
4550 }
4551
4552 switch (spddplx) {
4553 case SPEED_10 + DUPLEX_HALF:
4554 mac->forced_speed_duplex = ADVERTISE_10_HALF;
4555 break;
4556 case SPEED_10 + DUPLEX_FULL:
4557 mac->forced_speed_duplex = ADVERTISE_10_FULL;
4558 break;
4559 case SPEED_100 + DUPLEX_HALF:
4560 mac->forced_speed_duplex = ADVERTISE_100_HALF;
4561 break;
4562 case SPEED_100 + DUPLEX_FULL:
4563 mac->forced_speed_duplex = ADVERTISE_100_FULL;
4564 break;
4565 case SPEED_1000 + DUPLEX_FULL:
4566 mac->autoneg = 1;
4567 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
4568 break;
4569 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4570 default:
4571 dev_err(&adapter->pdev->dev,
4572 "Unsupported Speed/Duplex configuration\n");
4573 return -EINVAL;
4574 }
4575 return 0;
4576}
4577
Auke Kok9d5c8242008-01-24 02:22:38 -08004578static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
4579{
4580 struct net_device *netdev = pci_get_drvdata(pdev);
4581 struct igb_adapter *adapter = netdev_priv(netdev);
4582 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck2d064c02008-07-08 15:10:12 -07004583 u32 ctrl, rctl, status;
Auke Kok9d5c8242008-01-24 02:22:38 -08004584 u32 wufc = adapter->wol;
4585#ifdef CONFIG_PM
4586 int retval = 0;
4587#endif
4588
4589 netif_device_detach(netdev);
4590
Alexander Duycka88f10e2008-07-08 15:13:38 -07004591 if (netif_running(netdev))
4592 igb_close(netdev);
4593
4594 igb_reset_interrupt_capability(adapter);
4595
4596 igb_free_queues(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08004597
4598#ifdef CONFIG_PM
4599 retval = pci_save_state(pdev);
4600 if (retval)
4601 return retval;
4602#endif
4603
4604 status = rd32(E1000_STATUS);
4605 if (status & E1000_STATUS_LU)
4606 wufc &= ~E1000_WUFC_LNKC;
4607
4608 if (wufc) {
4609 igb_setup_rctl(adapter);
4610 igb_set_multi(netdev);
4611
4612 /* turn on all-multi mode if wake on multicast is enabled */
4613 if (wufc & E1000_WUFC_MC) {
4614 rctl = rd32(E1000_RCTL);
4615 rctl |= E1000_RCTL_MPE;
4616 wr32(E1000_RCTL, rctl);
4617 }
4618
4619 ctrl = rd32(E1000_CTRL);
4620 /* advertise wake from D3Cold */
4621 #define E1000_CTRL_ADVD3WUC 0x00100000
4622 /* phy power management enable */
4623 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4624 ctrl |= E1000_CTRL_ADVD3WUC;
4625 wr32(E1000_CTRL, ctrl);
4626
Auke Kok9d5c8242008-01-24 02:22:38 -08004627 /* Allow time for pending master requests to run */
4628 igb_disable_pcie_master(&adapter->hw);
4629
4630 wr32(E1000_WUC, E1000_WUC_PME_EN);
4631 wr32(E1000_WUFC, wufc);
Auke Kok9d5c8242008-01-24 02:22:38 -08004632 } else {
4633 wr32(E1000_WUC, 0);
4634 wr32(E1000_WUFC, 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08004635 }
4636
Alexander Duyck2d064c02008-07-08 15:10:12 -07004637 /* make sure adapter isn't asleep if manageability/wol is enabled */
4638 if (wufc || adapter->en_mng_pt) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004639 pci_enable_wake(pdev, PCI_D3hot, 1);
4640 pci_enable_wake(pdev, PCI_D3cold, 1);
Alexander Duyck2d064c02008-07-08 15:10:12 -07004641 } else {
4642 igb_shutdown_fiber_serdes_link_82575(hw);
4643 pci_enable_wake(pdev, PCI_D3hot, 0);
4644 pci_enable_wake(pdev, PCI_D3cold, 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08004645 }
4646
4647 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4648 * would have already happened in close and is redundant. */
4649 igb_release_hw_control(adapter);
4650
4651 pci_disable_device(pdev);
4652
4653 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4654
4655 return 0;
4656}
4657
4658#ifdef CONFIG_PM
4659static int igb_resume(struct pci_dev *pdev)
4660{
4661 struct net_device *netdev = pci_get_drvdata(pdev);
4662 struct igb_adapter *adapter = netdev_priv(netdev);
4663 struct e1000_hw *hw = &adapter->hw;
4664 u32 err;
4665
4666 pci_set_power_state(pdev, PCI_D0);
4667 pci_restore_state(pdev);
Taku Izumi42bfd33a2008-06-20 12:10:30 +09004668
Alexander Duyckaed5dec2009-02-06 23:16:04 +00004669 err = pci_enable_device_mem(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08004670 if (err) {
4671 dev_err(&pdev->dev,
4672 "igb: Cannot enable PCI device from suspend\n");
4673 return err;
4674 }
4675 pci_set_master(pdev);
4676
4677 pci_enable_wake(pdev, PCI_D3hot, 0);
4678 pci_enable_wake(pdev, PCI_D3cold, 0);
4679
Alexander Duycka88f10e2008-07-08 15:13:38 -07004680 igb_set_interrupt_capability(adapter);
4681
4682 if (igb_alloc_queues(adapter)) {
4683 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4684 return -ENOMEM;
Auke Kok9d5c8242008-01-24 02:22:38 -08004685 }
4686
4687 /* e1000_power_up_phy(adapter); */
4688
4689 igb_reset(adapter);
Alexander Duycka8564f02009-02-06 23:21:10 +00004690
4691 /* let the f/w know that the h/w is now under the control of the
4692 * driver. */
4693 igb_get_hw_control(adapter);
4694
Auke Kok9d5c8242008-01-24 02:22:38 -08004695 wr32(E1000_WUS, ~0);
4696
Alexander Duycka88f10e2008-07-08 15:13:38 -07004697 if (netif_running(netdev)) {
4698 err = igb_open(netdev);
4699 if (err)
4700 return err;
4701 }
Auke Kok9d5c8242008-01-24 02:22:38 -08004702
4703 netif_device_attach(netdev);
4704
Auke Kok9d5c8242008-01-24 02:22:38 -08004705 return 0;
4706}
4707#endif
4708
4709static void igb_shutdown(struct pci_dev *pdev)
4710{
4711 igb_suspend(pdev, PMSG_SUSPEND);
4712}
4713
4714#ifdef CONFIG_NET_POLL_CONTROLLER
4715/*
4716 * Polling 'interrupt' - used by things like netconsole to send skbs
4717 * without having to re-enable interrupts. It's not called while
4718 * the interrupt routine is executing.
4719 */
4720static void igb_netpoll(struct net_device *netdev)
4721{
4722 struct igb_adapter *adapter = netdev_priv(netdev);
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00004723 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08004724 int i;
Auke Kok9d5c8242008-01-24 02:22:38 -08004725
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00004726 if (!adapter->msix_entries) {
4727 igb_irq_disable(adapter);
4728 napi_schedule(&adapter->rx_ring[0].napi);
4729 return;
4730 }
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07004731
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00004732 for (i = 0; i < adapter->num_tx_queues; i++) {
4733 struct igb_ring *tx_ring = &adapter->tx_ring[i];
4734 wr32(E1000_EIMC, tx_ring->eims_value);
4735 igb_clean_tx_irq(tx_ring);
4736 wr32(E1000_EIMS, tx_ring->eims_value);
4737 }
Auke Kok9d5c8242008-01-24 02:22:38 -08004738
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00004739 for (i = 0; i < adapter->num_rx_queues; i++) {
4740 struct igb_ring *rx_ring = &adapter->rx_ring[i];
4741 wr32(E1000_EIMC, rx_ring->eims_value);
4742 napi_schedule(&rx_ring->napi);
4743 }
Auke Kok9d5c8242008-01-24 02:22:38 -08004744}
4745#endif /* CONFIG_NET_POLL_CONTROLLER */
4746
4747/**
4748 * igb_io_error_detected - called when PCI error is detected
4749 * @pdev: Pointer to PCI device
4750 * @state: The current pci connection state
4751 *
4752 * This function is called after a PCI bus error affecting
4753 * this device has been detected.
4754 */
4755static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4756 pci_channel_state_t state)
4757{
4758 struct net_device *netdev = pci_get_drvdata(pdev);
4759 struct igb_adapter *adapter = netdev_priv(netdev);
4760
4761 netif_device_detach(netdev);
4762
4763 if (netif_running(netdev))
4764 igb_down(adapter);
4765 pci_disable_device(pdev);
4766
4767 /* Request a slot slot reset. */
4768 return PCI_ERS_RESULT_NEED_RESET;
4769}
4770
4771/**
4772 * igb_io_slot_reset - called after the pci bus has been reset.
4773 * @pdev: Pointer to PCI device
4774 *
4775 * Restart the card from scratch, as if from a cold-boot. Implementation
4776 * resembles the first-half of the igb_resume routine.
4777 */
4778static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4779{
4780 struct net_device *netdev = pci_get_drvdata(pdev);
4781 struct igb_adapter *adapter = netdev_priv(netdev);
4782 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck40a914f2008-11-27 00:24:37 -08004783 pci_ers_result_t result;
Taku Izumi42bfd33a2008-06-20 12:10:30 +09004784 int err;
Auke Kok9d5c8242008-01-24 02:22:38 -08004785
Alexander Duyckaed5dec2009-02-06 23:16:04 +00004786 if (pci_enable_device_mem(pdev)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004787 dev_err(&pdev->dev,
4788 "Cannot re-enable PCI device after reset.\n");
Alexander Duyck40a914f2008-11-27 00:24:37 -08004789 result = PCI_ERS_RESULT_DISCONNECT;
4790 } else {
4791 pci_set_master(pdev);
4792 pci_restore_state(pdev);
4793
4794 pci_enable_wake(pdev, PCI_D3hot, 0);
4795 pci_enable_wake(pdev, PCI_D3cold, 0);
4796
4797 igb_reset(adapter);
4798 wr32(E1000_WUS, ~0);
4799 result = PCI_ERS_RESULT_RECOVERED;
Auke Kok9d5c8242008-01-24 02:22:38 -08004800 }
Auke Kok9d5c8242008-01-24 02:22:38 -08004801
Jeff Kirsherea943d42008-12-11 20:34:19 -08004802 err = pci_cleanup_aer_uncorrect_error_status(pdev);
4803 if (err) {
4804 dev_err(&pdev->dev, "pci_cleanup_aer_uncorrect_error_status "
4805 "failed 0x%0x\n", err);
4806 /* non-fatal, continue */
4807 }
Auke Kok9d5c8242008-01-24 02:22:38 -08004808
Alexander Duyck40a914f2008-11-27 00:24:37 -08004809 return result;
Auke Kok9d5c8242008-01-24 02:22:38 -08004810}
4811
4812/**
4813 * igb_io_resume - called when traffic can start flowing again.
4814 * @pdev: Pointer to PCI device
4815 *
4816 * This callback is called when the error recovery driver tells us that
4817 * its OK to resume normal operation. Implementation resembles the
4818 * second-half of the igb_resume routine.
4819 */
4820static void igb_io_resume(struct pci_dev *pdev)
4821{
4822 struct net_device *netdev = pci_get_drvdata(pdev);
4823 struct igb_adapter *adapter = netdev_priv(netdev);
4824
Auke Kok9d5c8242008-01-24 02:22:38 -08004825 if (netif_running(netdev)) {
4826 if (igb_up(adapter)) {
4827 dev_err(&pdev->dev, "igb_up failed after reset\n");
4828 return;
4829 }
4830 }
4831
4832 netif_device_attach(netdev);
4833
4834 /* let the f/w know that the h/w is now under the control of the
4835 * driver. */
4836 igb_get_hw_control(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08004837}
4838
4839/* igb_main.c */