blob: 1e7a2b060bdef58c33d3797ec964008f27379c66 [file] [log] [blame]
Kukjin Kim1355bbc2012-10-24 13:41:15 +09001/*
2 * SAMSUNG EXYNOS5440 SoC device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12/include/ "skeleton.dtsi"
13
14/ {
15 compatible = "samsung,exynos5440";
16
17 interrupt-parent = <&gic>;
18
19 gic:interrupt-controller@2E0000 {
20 compatible = "arm,cortex-a15-gic";
21 #interrupt-cells = <3>;
22 interrupt-controller;
23 reg = <0x2E1000 0x1000>, <0x2E2000 0x1000>;
24 };
25
26 cpus {
27 cpu@0 {
28 compatible = "arm,cortex-a15";
29 timer {
30 compatible = "arm,armv7-timer";
31 interrupts = <1 13 0xf08>;
32 clock-frequency = <1000000>;
33 };
34 };
35 cpu@1 {
36 compatible = "arm,cortex-a15";
37 timer {
38 compatible = "arm,armv7-timer";
39 interrupts = <1 14 0xf08>;
40 clock-frequency = <1000000>;
41 };
42 };
43 cpu@2 {
44 compatible = "arm,cortex-a15";
45 timer {
46 compatible = "arm,armv7-timer";
47 interrupts = <1 14 0xf08>;
48 clock-frequency = <1000000>;
49 };
50 };
51 cpu@3 {
52 compatible = "arm,cortex-a15";
53 timer {
54 compatible = "arm,armv7-timer";
55 interrupts = <1 14 0xf08>;
56 clock-frequency = <1000000>;
57 };
58 };
59 };
60
Kukjin Kim1355bbc2012-10-24 13:41:15 +090061 serial@B0000 {
62 compatible = "samsung,exynos4210-uart";
63 reg = <0xB0000 0x1000>;
64 interrupts = <0 2 0>;
65 };
66
67 serial@C0000 {
68 compatible = "samsung,exynos4210-uart";
69 reg = <0xC0000 0x1000>;
70 interrupts = <0 3 0>;
71 };
72
73 spi {
74 compatible = "samsung,exynos4210-spi";
75 reg = <0xD0000 0x1000>;
76 interrupts = <0 4 0>;
77 tx-dma-channel = <&pdma0 5>; /* preliminary */
78 rx-dma-channel = <&pdma0 4>; /* preliminary */
79 #address-cells = <1>;
80 #size-cells = <0>;
81 };
82
83 pinctrl {
Thomas Abrahamf6925432012-12-27 13:25:02 -080084 compatible = "samsung,exynos5440-pinctrl";
Kukjin Kim1355bbc2012-10-24 13:41:15 +090085 reg = <0xE0000 0x1000>;
86 interrupt-controller;
87 #interrupt-cells = <2>;
Thomas Abrahamb1ce1012012-10-24 17:18:52 +090088 #gpio-cells = <2>;
89
90 fan: fan {
91 samsung,exynos5440-pin-function = <1>;
92 };
93
94 hdd_led0: hdd_led0 {
95 samsung,exynos5440-pin-function = <2>;
96 };
97
98 hdd_led1: hdd_led1 {
99 samsung,exynos5440-pin-function = <3>;
100 };
101
102 uart1: uart1 {
103 samsung,exynos5440-pin-function = <4>;
104 };
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900105 };
106
107 i2c@F0000 {
Giridhar Maruthy49498c52012-12-28 09:33:58 -0800108 compatible = "samsung,exynos5440-i2c";
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900109 reg = <0xF0000 0x1000>;
110 interrupts = <0 5 0>;
111 #address-cells = <1>;
112 #size-cells = <0>;
113 };
114
115 i2c@100000 {
Giridhar Maruthy49498c52012-12-28 09:33:58 -0800116 compatible = "samsung,exynos5440-i2c";
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900117 reg = <0x100000 0x1000>;
118 interrupts = <0 6 0>;
119 #address-cells = <1>;
120 #size-cells = <0>;
121 };
122
123 watchdog {
124 compatible = "samsung,s3c2410-wdt";
125 reg = <0x110000 0x1000>;
126 interrupts = <0 1 0>;
127 };
128
129 amba {
130 #address-cells = <1>;
131 #size-cells = <1>;
132 compatible = "arm,amba-bus";
133 interrupt-parent = <&gic>;
134 ranges;
135
136 pdma0: pdma@121A0000 {
137 compatible = "arm,pl330", "arm,primecell";
138 reg = <0x120000 0x1000>;
139 interrupts = <0 34 0>;
140 };
141
142 pdma1: pdma@121B0000 {
143 compatible = "arm,pl330", "arm,primecell";
144 reg = <0x121000 0x1000>;
145 interrupts = <0 35 0>;
146 };
147 };
148
149 rtc {
150 compatible = "samsung,s3c6410-rtc";
151 reg = <0x130000 0x1000>;
Giridhar Maruthye877a5a2012-12-27 18:02:58 -0800152 interrupts = <0 17 0>, <0 16 0>;
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900153 };
154};