blob: 9371603a0ac90ca5f206e86f356f9e33b74814c2 [file] [log] [blame]
Hans de Goede49ad7122018-10-14 19:54:27 +02001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Dummy driver for Intel's Image Signal Processor found on Bay and Cherry
4 * Trail devices. The sole purpose of this driver is to allow the ISP to
5 * be put in D3.
6 *
7 * Copyright (C) 2018 Hans de Goede <hdegoede@redhat.com>
8 *
9 * Based on various non upstream patches for ISP support:
10 * Copyright (C) 2010-2017 Intel Corporation. All rights reserved.
11 * Copyright (c) 2010 Silicon Hive www.siliconhive.com.
12 */
13
14#include <linux/delay.h>
15#include <linux/module.h>
16#include <linux/mod_devicetable.h>
17#include <linux/pci.h>
18#include <linux/pm_runtime.h>
19#include <asm/iosf_mbi.h>
20
21/* PCI configuration regs */
22#define PCI_INTERRUPT_CTRL 0x9c
23
24#define PCI_CSI_CONTROL 0xe8
25#define PCI_CSI_CONTROL_PORTS_OFF_MASK 0x7
26
27/* IOSF BT_MBI_UNIT_PMC regs */
28#define ISPSSPM0 0x39
29#define ISPSSPM0_ISPSSC_OFFSET 0
30#define ISPSSPM0_ISPSSC_MASK 0x00000003
31#define ISPSSPM0_ISPSSS_OFFSET 24
32#define ISPSSPM0_ISPSSS_MASK 0x03000000
33#define ISPSSPM0_IUNIT_POWER_ON 0x0
34#define ISPSSPM0_IUNIT_POWER_OFF 0x3
35
36static int isp_probe(struct pci_dev *dev, const struct pci_device_id *id)
37{
38 unsigned long timeout;
39 u32 val;
40
41 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, 0);
42
43 /*
44 * MRFLD IUNIT DPHY is located in an always-power-on island
45 * MRFLD HW design need all CSI ports are disabled before
46 * powering down the IUNIT.
47 */
48 pci_read_config_dword(dev, PCI_CSI_CONTROL, &val);
49 val |= PCI_CSI_CONTROL_PORTS_OFF_MASK;
50 pci_write_config_dword(dev, PCI_CSI_CONTROL, val);
51
52 /* Write 0x3 to ISPSSPM0 bit[1:0] to power off the IUNIT */
53 iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM0,
54 ISPSSPM0_IUNIT_POWER_OFF, ISPSSPM0_ISPSSC_MASK);
55
56 /*
57 * There should be no IUNIT access while power-down is
58 * in progress HW sighting: 4567865
59 * Wait up to 50 ms for the IUNIT to shut down.
60 */
61 timeout = jiffies + msecs_to_jiffies(50);
62 while (1) {
63 /* Wait until ISPSSPM0 bit[25:24] shows 0x3 */
64 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM0, &val);
65 val = (val & ISPSSPM0_ISPSSS_MASK) >> ISPSSPM0_ISPSSS_OFFSET;
66 if (val == ISPSSPM0_IUNIT_POWER_OFF)
67 break;
68
69 if (time_after(jiffies, timeout)) {
70 dev_err(&dev->dev, "IUNIT power-off timeout.\n");
71 return -EBUSY;
72 }
73 usleep_range(1000, 2000);
74 }
75
76 pm_runtime_allow(&dev->dev);
77 pm_runtime_put_sync_suspend(&dev->dev);
78
79 return 0;
80}
81
82static void isp_remove(struct pci_dev *dev)
83{
84 pm_runtime_get_sync(&dev->dev);
85 pm_runtime_forbid(&dev->dev);
86}
87
88static int isp_pci_suspend(struct device *dev)
89{
90 return 0;
91}
92
93static int isp_pci_resume(struct device *dev)
94{
95 return 0;
96}
97
98static UNIVERSAL_DEV_PM_OPS(isp_pm_ops, isp_pci_suspend,
99 isp_pci_resume, NULL);
100
101static const struct pci_device_id isp_id_table[] = {
102 { PCI_VDEVICE(INTEL, 0x22b8), },
103 { 0, }
104};
105MODULE_DEVICE_TABLE(pci, isp_id_table);
106
107static struct pci_driver isp_pci_driver = {
108 .name = "intel_atomisp2_pm",
109 .id_table = isp_id_table,
110 .probe = isp_probe,
111 .remove = isp_remove,
112 .driver.pm = &isp_pm_ops,
113};
114
115module_pci_driver(isp_pci_driver);
116
117MODULE_DESCRIPTION("Intel AtomISP2 dummy / power-management drv (for suspend)");
118MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
119MODULE_LICENSE("GPL v2");