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Thomas Gleixneraf873fc2019-05-28 09:57:21 -07001// SPDX-License-Identifier: GPL-2.0-only
Linus Walleij60013b92013-09-22 21:49:18 +02002/*
3 * Core driver for STw4810/STw4811
4 *
5 * Copyright (C) 2013 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
7 *
8 * Author: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij60013b92013-09-22 21:49:18 +02009 */
10
11#include <linux/err.h>
12#include <linux/i2c.h>
13#include <linux/init.h>
14#include <linux/mfd/core.h>
15#include <linux/mfd/stw481x.h>
16#include <linux/module.h>
17#include <linux/regmap.h>
18#include <linux/spinlock.h>
19#include <linux/slab.h>
20
21/*
22 * This driver can only access the non-USB portions of STw4811, the register
23 * range 0x00-0x10 dealing with USB is bound to the two special I2C pins used
24 * for USB control.
25 */
26
27/* Registers inside the power control address space */
28#define STW_PC_VCORE_SEL 0x05U
29#define STW_PC_VAUX_SEL 0x06U
30#define STW_PC_VPLL_SEL 0x07U
31
32/**
33 * stw481x_get_pctl_reg() - get a power control register
34 * @stw481x: handle to the stw481x chip
35 * @reg: power control register to fetch
36 *
37 * The power control registers is a set of one-time-programmable registers
38 * in its own register space, accessed by writing addess bits to these
39 * two registers: bits 7,6,5 of PCTL_REG_LO corresponds to the 3 LSBs of
40 * the address and bits 8,9 of PCTL_REG_HI corresponds to the 2 MSBs of
41 * the address, forming an address space of 5 bits, i.e. 32 registers
42 * 0x00 ... 0x1f can be obtained.
43 */
44static int stw481x_get_pctl_reg(struct stw481x *stw481x, u8 reg)
45{
46 u8 msb = (reg >> 3) & 0x03;
47 u8 lsb = (reg << 5) & 0xe0;
48 unsigned int val;
49 u8 vrfy;
50 int ret;
51
52 ret = regmap_write(stw481x->map, STW_PCTL_REG_HI, msb);
53 if (ret)
54 return ret;
55 ret = regmap_write(stw481x->map, STW_PCTL_REG_LO, lsb);
56 if (ret)
57 return ret;
58 ret = regmap_read(stw481x->map, STW_PCTL_REG_HI, &val);
59 if (ret)
60 return ret;
61 vrfy = (val & 0x03) << 3;
62 ret = regmap_read(stw481x->map, STW_PCTL_REG_LO, &val);
63 if (ret)
64 return ret;
65 vrfy |= ((val >> 5) & 0x07);
66 if (vrfy != reg)
67 return -EIO;
68 return (val >> 1) & 0x0f;
69}
70
71static int stw481x_startup(struct stw481x *stw481x)
72{
73 /* Voltages multiplied by 100 */
Colin Ian King223fd9f2017-09-05 12:27:12 +010074 static const u8 vcore_val[] = {
75 100, 105, 110, 115, 120, 122, 124, 126, 128,
76 130, 132, 134, 136, 138, 140, 145
77 };
78 static const u8 vpll_val[] = { 105, 120, 130, 180 };
79 static const u8 vaux_val[] = { 15, 18, 25, 28 };
Linus Walleij60013b92013-09-22 21:49:18 +020080 u8 vcore;
81 u8 vcore_slp;
82 u8 vpll;
83 u8 vaux;
84 bool vaux_en;
85 bool it_warn;
86 int ret;
87 unsigned int val;
88
89 ret = regmap_read(stw481x->map, STW_CONF1, &val);
90 if (ret)
91 return ret;
92 vaux_en = !!(val & STW_CONF1_PDN_VAUX);
93 it_warn = !!(val & STW_CONF1_IT_WARN);
94
95 dev_info(&stw481x->client->dev, "voltages %s\n",
96 (val & STW_CONF1_V_MONITORING) ? "OK" : "LOW");
97 dev_info(&stw481x->client->dev, "MMC level shifter %s\n",
98 (val & STW_CONF1_MMC_LS_STATUS) ? "high impedance" : "ON");
99 dev_info(&stw481x->client->dev, "VMMC: %s\n",
100 (val & STW_CONF1_PDN_VMMC) ? "ON" : "disabled");
101
102 dev_info(&stw481x->client->dev, "STw481x power control registers:\n");
103
104 ret = stw481x_get_pctl_reg(stw481x, STW_PC_VCORE_SEL);
105 if (ret < 0)
106 return ret;
107 vcore = ret & 0x0f;
108
109 ret = stw481x_get_pctl_reg(stw481x, STW_PC_VAUX_SEL);
110 if (ret < 0)
111 return ret;
112 vaux = (ret >> 2) & 3;
113 vpll = (ret >> 4) & 1; /* Save bit 4 */
114
115 ret = stw481x_get_pctl_reg(stw481x, STW_PC_VPLL_SEL);
116 if (ret < 0)
117 return ret;
118 vpll |= (ret >> 1) & 2;
119
120 dev_info(&stw481x->client->dev, "VCORE: %u.%uV %s\n",
121 vcore_val[vcore] / 100, vcore_val[vcore] % 100,
122 (ret & 4) ? "ON" : "OFF");
123
124 dev_info(&stw481x->client->dev, "VPLL: %u.%uV %s\n",
125 vpll_val[vpll] / 100, vpll_val[vpll] % 100,
126 (ret & 0x10) ? "ON" : "OFF");
127
128 dev_info(&stw481x->client->dev, "VAUX: %u.%uV %s\n",
129 vaux_val[vaux] / 10, vaux_val[vaux] % 10,
130 vaux_en ? "ON" : "OFF");
131
132 ret = regmap_read(stw481x->map, STW_CONF2, &val);
133 if (ret)
134 return ret;
135
136 dev_info(&stw481x->client->dev, "TWARN: %s threshold, %s\n",
137 it_warn ? "below" : "above",
138 (val & STW_CONF2_MASK_TWARN) ?
139 "enabled" : "mask through VDDOK");
140 dev_info(&stw481x->client->dev, "VMMC: %s\n",
141 (val & STW_CONF2_VMMC_EXT) ? "internal" : "external");
142 dev_info(&stw481x->client->dev, "IT WAKE UP: %s\n",
143 (val & STW_CONF2_MASK_IT_WAKE_UP) ? "enabled" : "masked");
144 dev_info(&stw481x->client->dev, "GPO1: %s\n",
145 (val & STW_CONF2_GPO1) ? "low" : "high impedance");
146 dev_info(&stw481x->client->dev, "GPO2: %s\n",
147 (val & STW_CONF2_GPO2) ? "low" : "high impedance");
148
149 ret = regmap_read(stw481x->map, STW_VCORE_SLEEP, &val);
150 if (ret)
151 return ret;
152 vcore_slp = val & 0x0f;
153 dev_info(&stw481x->client->dev, "VCORE SLEEP: %u.%uV\n",
154 vcore_val[vcore_slp] / 100, vcore_val[vcore_slp] % 100);
155
156 return 0;
157}
158
159/*
160 * MFD cells - we have one cell which is selected operation
161 * mode, and we always have a GPIO cell.
162 */
163static struct mfd_cell stw481x_cells[] = {
164 {
165 .of_compatible = "st,stw481x-vmmc",
166 .name = "stw481x-vmmc-regulator",
167 .id = -1,
168 },
169};
170
Sachin Kamate2f3e9b2014-02-12 14:40:12 +0530171static const struct regmap_config stw481x_regmap_config = {
Linus Walleij60013b92013-09-22 21:49:18 +0200172 .reg_bits = 8,
173 .val_bits = 8,
174};
175
176static int stw481x_probe(struct i2c_client *client,
177 const struct i2c_device_id *id)
178{
179 struct stw481x *stw481x;
180 int ret;
181 int i;
182
183 stw481x = devm_kzalloc(&client->dev, sizeof(*stw481x), GFP_KERNEL);
184 if (!stw481x)
185 return -ENOMEM;
186
187 i2c_set_clientdata(client, stw481x);
188 stw481x->client = client;
189 stw481x->map = devm_regmap_init_i2c(client, &stw481x_regmap_config);
Sachin Kamatc88fd912014-02-12 14:40:13 +0530190 if (IS_ERR(stw481x->map)) {
191 ret = PTR_ERR(stw481x->map);
192 dev_err(&client->dev, "Failed to allocate register map: %d\n",
193 ret);
194 return ret;
195 }
Linus Walleij60013b92013-09-22 21:49:18 +0200196
197 ret = stw481x_startup(stw481x);
198 if (ret) {
199 dev_err(&client->dev, "chip initialization failed\n");
200 return ret;
201 }
202
203 /* Set up and register the platform devices. */
204 for (i = 0; i < ARRAY_SIZE(stw481x_cells); i++) {
205 /* One state holder for all drivers, this is simple */
206 stw481x_cells[i].platform_data = stw481x;
207 stw481x_cells[i].pdata_size = sizeof(*stw481x);
208 }
209
Laxman Dewangane253fb02016-04-08 00:13:10 +0530210 ret = devm_mfd_add_devices(&client->dev, 0, stw481x_cells,
211 ARRAY_SIZE(stw481x_cells), NULL, 0, NULL);
Linus Walleij60013b92013-09-22 21:49:18 +0200212 if (ret)
213 return ret;
214
215 dev_info(&client->dev, "initialized STw481x device\n");
216
217 return ret;
218}
219
Linus Walleij60013b92013-09-22 21:49:18 +0200220/*
221 * This ID table is completely unused, as this is a pure
222 * device-tree probed driver, but it has to be here due to
223 * the structure of the I2C core.
224 */
225static const struct i2c_device_id stw481x_id[] = {
226 { "stw481x", 0 },
227 { },
228};
Javier Martinez Canillas0f63bde2015-07-30 18:18:26 +0200229MODULE_DEVICE_TABLE(i2c, stw481x_id);
Linus Walleij60013b92013-09-22 21:49:18 +0200230
231static const struct of_device_id stw481x_match[] = {
232 { .compatible = "st,stw4810", },
233 { .compatible = "st,stw4811", },
234 { },
235};
236MODULE_DEVICE_TABLE(of, stw481x_match);
237
238static struct i2c_driver stw481x_driver = {
239 .driver = {
240 .name = "stw481x",
241 .of_match_table = stw481x_match,
242 },
243 .probe = stw481x_probe,
Linus Walleij60013b92013-09-22 21:49:18 +0200244 .id_table = stw481x_id,
245};
246
247module_i2c_driver(stw481x_driver);
248
249MODULE_AUTHOR("Linus Walleij");
250MODULE_DESCRIPTION("STw481x PMIC driver");
251MODULE_LICENSE("GPL v2");