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Simon Glassa17d94f2013-02-25 14:08:39 -08001/*
2 * ChromeOS EC multi-function device (SPI)
3 *
4 * Copyright (C) 2012 Google, Inc
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/delay.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/mfd/cros_ec.h>
20#include <linux/mfd/cros_ec_commands.h>
21#include <linux/platform_device.h>
22#include <linux/slab.h>
23#include <linux/spi/spi.h>
24
25
26/* The header byte, which follows the preamble */
27#define EC_MSG_HEADER 0xec
28
29/*
30 * Number of EC preamble bytes we read at a time. Since it takes
31 * about 400-500us for the EC to respond there is not a lot of
32 * point in tuning this. If the EC could respond faster then
33 * we could increase this so that might expect the preamble and
34 * message to occur in a single transaction. However, the maximum
35 * SPI transfer size is 256 bytes, so at 5MHz we need a response
36 * time of perhaps <320us (200 bytes / 1600 bits).
37 */
38#define EC_MSG_PREAMBLE_COUNT 32
39
40/*
41 * We must get a response from the EC in 5ms. This is a very long
42 * time, but the flash write command can take 2-3ms. The EC command
43 * processing is currently not very fast (about 500us). We could
44 * look at speeding this up and making the flash write command a
45 * 'slow' command, requiring a GET_STATUS wait loop, like flash
46 * erase.
47 */
48#define EC_MSG_DEADLINE_MS 5
49
50/*
51 * Time between raising the SPI chip select (for the end of a
52 * transaction) and dropping it again (for the next transaction).
Derek Basehore49f91ac2013-11-18 11:30:48 +010053 * If we go too fast, the EC will miss the transaction. We know that we
54 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
55 * safe.
Simon Glassa17d94f2013-02-25 14:08:39 -080056 */
Derek Basehore49f91ac2013-11-18 11:30:48 +010057#define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
Simon Glassa17d94f2013-02-25 14:08:39 -080058
59/**
60 * struct cros_ec_spi - information about a SPI-connected EC
61 *
62 * @spi: SPI device we are connected to
63 * @last_transfer_ns: time that we last finished a transfer, or 0 if there
64 * if no record
65 */
66struct cros_ec_spi {
67 struct spi_device *spi;
68 s64 last_transfer_ns;
69};
70
71static void debug_packet(struct device *dev, const char *name, u8 *ptr,
72 int len)
73{
74#ifdef DEBUG
75 int i;
76
77 dev_dbg(dev, "%s: ", name);
78 for (i = 0; i < len; i++)
79 dev_cont(dev, " %02x", ptr[i]);
80#endif
81}
82
83/**
84 * cros_ec_spi_receive_response - Receive a response from the EC.
85 *
86 * This function has two phases: reading the preamble bytes (since if we read
87 * data from the EC before it is ready to send, we just get preamble) and
88 * reading the actual message.
89 *
90 * The received data is placed into ec_dev->din.
91 *
92 * @ec_dev: ChromeOS EC device
93 * @need_len: Number of message bytes we need to read
94 */
95static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
96 int need_len)
97{
98 struct cros_ec_spi *ec_spi = ec_dev->priv;
99 struct spi_transfer trans;
100 struct spi_message msg;
101 u8 *ptr, *end;
102 int ret;
103 unsigned long deadline;
104 int todo;
105
106 /* Receive data until we see the header byte */
107 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
108 do {
109 memset(&trans, '\0', sizeof(trans));
110 trans.cs_change = 1;
111 trans.rx_buf = ptr = ec_dev->din;
112 trans.len = EC_MSG_PREAMBLE_COUNT;
113
114 spi_message_init(&msg);
115 spi_message_add_tail(&trans, &msg);
116 ret = spi_sync(ec_spi->spi, &msg);
117 if (ret < 0) {
118 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
119 return ret;
120 }
121
122 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
123 if (*ptr == EC_MSG_HEADER) {
Geert Uytterhoevenc34924b2013-05-08 23:37:45 +0200124 dev_dbg(ec_dev->dev, "msg found at %zd\n",
Simon Glassa17d94f2013-02-25 14:08:39 -0800125 ptr - ec_dev->din);
126 break;
127 }
128 }
129
130 if (time_after(jiffies, deadline)) {
131 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
132 return -ETIMEDOUT;
133 }
134 } while (ptr == end);
135
136 /*
137 * ptr now points to the header byte. Copy any valid data to the
138 * start of our buffer
139 */
140 todo = end - ++ptr;
141 BUG_ON(todo < 0 || todo > ec_dev->din_size);
142 todo = min(todo, need_len);
143 memmove(ec_dev->din, ptr, todo);
144 ptr = ec_dev->din + todo;
145 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
146 need_len, todo);
147 need_len -= todo;
148
149 /* Receive data until we have it all */
150 while (need_len > 0) {
151 /*
152 * We can't support transfers larger than the SPI FIFO size
153 * unless we have DMA. We don't have DMA on the ISP SPI ports
154 * for Exynos. We need a way of asking SPI driver for
155 * maximum-supported transfer size.
156 */
157 todo = min(need_len, 256);
Geert Uytterhoevenc34924b2013-05-08 23:37:45 +0200158 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
Simon Glassa17d94f2013-02-25 14:08:39 -0800159 todo, need_len, ptr - ec_dev->din);
160
161 memset(&trans, '\0', sizeof(trans));
162 trans.cs_change = 1;
163 trans.rx_buf = ptr;
164 trans.len = todo;
165 spi_message_init(&msg);
166 spi_message_add_tail(&trans, &msg);
167
168 /* send command to EC and read answer */
169 BUG_ON((u8 *)trans.rx_buf - ec_dev->din + todo >
170 ec_dev->din_size);
171 ret = spi_sync(ec_spi->spi, &msg);
172 if (ret < 0) {
173 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
174 return ret;
175 }
176
177 debug_packet(ec_dev->dev, "interim", ptr, todo);
178 ptr += todo;
179 need_len -= todo;
180 }
181
Geert Uytterhoevenc34924b2013-05-08 23:37:45 +0200182 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
Simon Glassa17d94f2013-02-25 14:08:39 -0800183
184 return 0;
185}
186
187/**
188 * cros_ec_command_spi_xfer - Transfer a message over SPI and receive the reply
189 *
190 * @ec_dev: ChromeOS EC device
191 * @ec_msg: Message to transfer
192 */
193static int cros_ec_command_spi_xfer(struct cros_ec_device *ec_dev,
194 struct cros_ec_msg *ec_msg)
195{
196 struct cros_ec_spi *ec_spi = ec_dev->priv;
197 struct spi_transfer trans;
198 struct spi_message msg;
199 int i, len;
200 u8 *ptr;
201 int sum;
202 int ret = 0, final_ret;
203 struct timespec ts;
204
205 len = cros_ec_prepare_tx(ec_dev, ec_msg);
206 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
207
208 /* If it's too soon to do another transaction, wait */
209 if (ec_spi->last_transfer_ns) {
210 struct timespec ts;
211 unsigned long delay; /* The delay completed so far */
212
213 ktime_get_ts(&ts);
214 delay = timespec_to_ns(&ts) - ec_spi->last_transfer_ns;
215 if (delay < EC_SPI_RECOVERY_TIME_NS)
216 ndelay(delay);
217 }
218
219 /* Transmit phase - send our message */
220 debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
221 memset(&trans, '\0', sizeof(trans));
222 trans.tx_buf = ec_dev->dout;
223 trans.len = len;
224 trans.cs_change = 1;
225 spi_message_init(&msg);
226 spi_message_add_tail(&trans, &msg);
227 ret = spi_sync(ec_spi->spi, &msg);
228
229 /* Get the response */
230 if (!ret) {
231 ret = cros_ec_spi_receive_response(ec_dev,
232 ec_msg->in_len + EC_MSG_TX_PROTO_BYTES);
233 } else {
234 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
235 }
236
237 /* turn off CS */
238 spi_message_init(&msg);
239 final_ret = spi_sync(ec_spi->spi, &msg);
240 ktime_get_ts(&ts);
241 ec_spi->last_transfer_ns = timespec_to_ns(&ts);
242 if (!ret)
243 ret = final_ret;
244 if (ret < 0) {
245 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
246 return ret;
247 }
248
249 /* check response error code */
250 ptr = ec_dev->din;
251 if (ptr[0]) {
252 dev_warn(ec_dev->dev, "command 0x%02x returned an error %d\n",
253 ec_msg->cmd, ptr[0]);
254 debug_packet(ec_dev->dev, "in_err", ptr, len);
255 return -EINVAL;
256 }
257 len = ptr[1];
258 sum = ptr[0] + ptr[1];
259 if (len > ec_msg->in_len) {
260 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
261 len, ec_msg->in_len);
262 return -ENOSPC;
263 }
264
265 /* copy response packet payload and compute checksum */
266 for (i = 0; i < len; i++) {
267 sum += ptr[i + 2];
268 if (ec_msg->in_len)
269 ec_msg->in_buf[i] = ptr[i + 2];
270 }
271 sum &= 0xff;
272
273 debug_packet(ec_dev->dev, "in", ptr, len + 3);
274
275 if (sum != ptr[len + 2]) {
276 dev_err(ec_dev->dev,
277 "bad packet checksum, expected %02x, got %02x\n",
278 sum, ptr[len + 2]);
279 return -EBADMSG;
280 }
281
282 return 0;
283}
284
285static int cros_ec_probe_spi(struct spi_device *spi)
286{
287 struct device *dev = &spi->dev;
288 struct cros_ec_device *ec_dev;
289 struct cros_ec_spi *ec_spi;
290 int err;
291
292 spi->bits_per_word = 8;
293 spi->mode = SPI_MODE_0;
294 err = spi_setup(spi);
295 if (err < 0)
296 return err;
297
298 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
299 if (ec_spi == NULL)
300 return -ENOMEM;
301 ec_spi->spi = spi;
302 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
303 if (!ec_dev)
304 return -ENOMEM;
305
306 spi_set_drvdata(spi, ec_dev);
307 ec_dev->name = "SPI";
308 ec_dev->dev = dev;
309 ec_dev->priv = ec_spi;
310 ec_dev->irq = spi->irq;
311 ec_dev->command_xfer = cros_ec_command_spi_xfer;
312 ec_dev->ec_name = ec_spi->spi->modalias;
313 ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
314 ec_dev->parent = &ec_spi->spi->dev;
315 ec_dev->din_size = EC_MSG_BYTES + EC_MSG_PREAMBLE_COUNT;
316 ec_dev->dout_size = EC_MSG_BYTES;
317
318 err = cros_ec_register(ec_dev);
319 if (err) {
320 dev_err(dev, "cannot register EC\n");
321 return err;
322 }
323
324 return 0;
325}
326
327static int cros_ec_remove_spi(struct spi_device *spi)
328{
329 struct cros_ec_device *ec_dev;
330
331 ec_dev = spi_get_drvdata(spi);
332 cros_ec_remove(ec_dev);
333
334 return 0;
335}
336
337#ifdef CONFIG_PM_SLEEP
338static int cros_ec_spi_suspend(struct device *dev)
339{
340 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
341
342 return cros_ec_suspend(ec_dev);
343}
344
345static int cros_ec_spi_resume(struct device *dev)
346{
347 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
348
349 return cros_ec_resume(ec_dev);
350}
351#endif
352
353static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
354 cros_ec_spi_resume);
355
356static const struct spi_device_id cros_ec_spi_id[] = {
357 { "cros-ec-spi", 0 },
358 { }
359};
360MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
361
362static struct spi_driver cros_ec_driver_spi = {
363 .driver = {
364 .name = "cros-ec-spi",
365 .owner = THIS_MODULE,
366 .pm = &cros_ec_spi_pm_ops,
367 },
368 .probe = cros_ec_probe_spi,
369 .remove = cros_ec_remove_spi,
370 .id_table = cros_ec_spi_id,
371};
372
373module_spi_driver(cros_ec_driver_spi);
374
375MODULE_LICENSE("GPL");
376MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)");