Antti Palosaari | 4b64bb2 | 2012-03-30 08:21:25 -0300 | [diff] [blame^] | 1 | /* |
| 2 | * Afatech AF9033 demodulator driver |
| 3 | * |
| 4 | * Copyright (C) 2009 Antti Palosaari <crope@iki.fi> |
| 5 | * Copyright (C) 2012 Antti Palosaari <crope@iki.fi> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License along |
| 18 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. |
| 20 | */ |
| 21 | |
| 22 | #ifndef AF9033_PRIV_H |
| 23 | #define AF9033_PRIV_H |
| 24 | |
| 25 | #include "dvb_frontend.h" |
| 26 | #include "af9033.h" |
| 27 | |
| 28 | struct reg_val { |
| 29 | u32 reg; |
| 30 | u8 val; |
| 31 | }; |
| 32 | |
| 33 | struct reg_val_mask { |
| 34 | u32 reg; |
| 35 | u8 val; |
| 36 | u8 mask; |
| 37 | }; |
| 38 | |
| 39 | struct coeff { |
| 40 | u32 clock; |
| 41 | u32 bandwidth_hz; |
| 42 | u8 val[36]; |
| 43 | }; |
| 44 | |
| 45 | struct clock_adc { |
| 46 | u32 clock; |
| 47 | u32 adc; |
| 48 | }; |
| 49 | |
| 50 | /* Xtal clock vs. ADC clock lookup table */ |
| 51 | static const struct clock_adc clock_adc_lut[] = { |
| 52 | { 16384000, 20480000 }, |
| 53 | { 20480000, 20480000 }, |
| 54 | { 36000000, 20250000 }, |
| 55 | { 30000000, 20156250 }, |
| 56 | { 26000000, 20583333 }, |
| 57 | { 28000000, 20416667 }, |
| 58 | { 32000000, 20500000 }, |
| 59 | { 34000000, 20187500 }, |
| 60 | { 24000000, 20500000 }, |
| 61 | { 22000000, 20625000 }, |
| 62 | { 12000000, 20250000 }, |
| 63 | }; |
| 64 | |
| 65 | /* pre-calculated coeff lookup table */ |
| 66 | static const struct coeff coeff_lut[] = { |
| 67 | /* 12.000 MHz */ |
| 68 | { 12000000, 8000000, { |
| 69 | 0x01, 0xce, 0x55, 0xc9, 0x00, 0xe7, 0x2a, 0xe4, 0x00, 0x73, |
| 70 | 0x99, 0x0f, 0x00, 0x73, 0x95, 0x72, 0x00, 0x73, 0x91, 0xd5, |
| 71 | 0x00, 0x39, 0xca, 0xb9, 0x00, 0xe7, 0x2a, 0xe4, 0x00, 0x73, |
| 72 | 0x95, 0x72, 0x37, 0x02, 0xce, 0x01 } |
| 73 | }, |
| 74 | { 12000000, 7000000, { |
| 75 | 0x01, 0x94, 0x8b, 0x10, 0x00, 0xca, 0x45, 0x88, 0x00, 0x65, |
| 76 | 0x25, 0xed, 0x00, 0x65, 0x22, 0xc4, 0x00, 0x65, 0x1f, 0x9b, |
| 77 | 0x00, 0x32, 0x91, 0x62, 0x00, 0xca, 0x45, 0x88, 0x00, 0x65, |
| 78 | 0x22, 0xc4, 0x88, 0x02, 0x95, 0x01 } |
| 79 | }, |
| 80 | { 12000000, 6000000, { |
| 81 | 0x01, 0x5a, 0xc0, 0x56, 0x00, 0xad, 0x60, 0x2b, 0x00, 0x56, |
| 82 | 0xb2, 0xcb, 0x00, 0x56, 0xb0, 0x15, 0x00, 0x56, 0xad, 0x60, |
| 83 | 0x00, 0x2b, 0x58, 0x0b, 0x00, 0xad, 0x60, 0x2b, 0x00, 0x56, |
| 84 | 0xb0, 0x15, 0xf4, 0x02, 0x5b, 0x01 } |
| 85 | }, |
| 86 | }; |
| 87 | |
| 88 | static const struct reg_val ofsm_init[] = { |
| 89 | { 0x800051, 0x01 }, |
| 90 | { 0x800070, 0x0a }, |
| 91 | { 0x80007e, 0x04 }, |
| 92 | { 0x800081, 0x0a }, |
| 93 | { 0x80008a, 0x01 }, |
| 94 | { 0x80008e, 0x01 }, |
| 95 | { 0x800092, 0x06 }, |
| 96 | { 0x800099, 0x01 }, |
| 97 | { 0x80009f, 0xe1 }, |
| 98 | { 0x8000a0, 0xcf }, |
| 99 | { 0x8000a3, 0x01 }, |
| 100 | { 0x8000a5, 0x01 }, |
| 101 | { 0x8000a6, 0x01 }, |
| 102 | { 0x8000a9, 0x00 }, |
| 103 | { 0x8000aa, 0x01 }, |
| 104 | { 0x8000ab, 0x01 }, |
| 105 | { 0x8000b0, 0x01 }, |
| 106 | { 0x8000c0, 0x05 }, |
| 107 | { 0x8000c4, 0x19 }, |
| 108 | { 0x80f000, 0x0f }, |
| 109 | { 0x80f016, 0x10 }, |
| 110 | { 0x80f017, 0x04 }, |
| 111 | { 0x80f018, 0x05 }, |
| 112 | { 0x80f019, 0x04 }, |
| 113 | { 0x80f01a, 0x05 }, |
| 114 | { 0x80f021, 0x03 }, |
| 115 | { 0x80f022, 0x0a }, |
| 116 | { 0x80f023, 0x0a }, |
| 117 | { 0x80f02b, 0x00 }, |
| 118 | { 0x80f02c, 0x01 }, |
| 119 | { 0x80f064, 0x03 }, |
| 120 | { 0x80f065, 0xf9 }, |
| 121 | { 0x80f066, 0x03 }, |
| 122 | { 0x80f067, 0x01 }, |
| 123 | { 0x80f06f, 0xe0 }, |
| 124 | { 0x80f070, 0x03 }, |
| 125 | { 0x80f072, 0x0f }, |
| 126 | { 0x80f073, 0x03 }, |
| 127 | { 0x80f078, 0x00 }, |
| 128 | { 0x80f087, 0x00 }, |
| 129 | { 0x80f09b, 0x3f }, |
| 130 | { 0x80f09c, 0x00 }, |
| 131 | { 0x80f09d, 0x20 }, |
| 132 | { 0x80f09e, 0x00 }, |
| 133 | { 0x80f09f, 0x0c }, |
| 134 | { 0x80f0a0, 0x00 }, |
| 135 | { 0x80f130, 0x04 }, |
| 136 | { 0x80f132, 0x04 }, |
| 137 | { 0x80f144, 0x1a }, |
| 138 | { 0x80f146, 0x00 }, |
| 139 | { 0x80f14a, 0x01 }, |
| 140 | { 0x80f14c, 0x00 }, |
| 141 | { 0x80f14d, 0x00 }, |
| 142 | { 0x80f14f, 0x04 }, |
| 143 | { 0x80f158, 0x7f }, |
| 144 | { 0x80f15a, 0x00 }, |
| 145 | { 0x80f15b, 0x08 }, |
| 146 | { 0x80f15d, 0x03 }, |
| 147 | { 0x80f15e, 0x05 }, |
| 148 | { 0x80f163, 0x05 }, |
| 149 | { 0x80f166, 0x01 }, |
| 150 | { 0x80f167, 0x40 }, |
| 151 | { 0x80f168, 0x0f }, |
| 152 | { 0x80f17a, 0x00 }, |
| 153 | { 0x80f17b, 0x00 }, |
| 154 | { 0x80f183, 0x01 }, |
| 155 | { 0x80f19d, 0x40 }, |
| 156 | { 0x80f1bc, 0x36 }, |
| 157 | { 0x80f1bd, 0x00 }, |
| 158 | { 0x80f1cb, 0xa0 }, |
| 159 | { 0x80f1cc, 0x01 }, |
| 160 | { 0x80f204, 0x10 }, |
| 161 | { 0x80f214, 0x00 }, |
| 162 | { 0x80f40e, 0x0a }, |
| 163 | { 0x80f40f, 0x40 }, |
| 164 | { 0x80f410, 0x08 }, |
| 165 | { 0x80f55f, 0x0a }, |
| 166 | { 0x80f561, 0x15 }, |
| 167 | { 0x80f562, 0x20 }, |
| 168 | { 0x80f5df, 0xfb }, |
| 169 | { 0x80f5e0, 0x00 }, |
| 170 | { 0x80f5e3, 0x09 }, |
| 171 | { 0x80f5e4, 0x01 }, |
| 172 | { 0x80f5e5, 0x01 }, |
| 173 | { 0x80f5f8, 0x01 }, |
| 174 | { 0x80f5fd, 0x01 }, |
| 175 | { 0x80f600, 0x05 }, |
| 176 | { 0x80f601, 0x08 }, |
| 177 | { 0x80f602, 0x0b }, |
| 178 | { 0x80f603, 0x0e }, |
| 179 | { 0x80f604, 0x11 }, |
| 180 | { 0x80f605, 0x14 }, |
| 181 | { 0x80f606, 0x17 }, |
| 182 | { 0x80f607, 0x1f }, |
| 183 | { 0x80f60e, 0x00 }, |
| 184 | { 0x80f60f, 0x04 }, |
| 185 | { 0x80f610, 0x32 }, |
| 186 | { 0x80f611, 0x10 }, |
| 187 | { 0x80f707, 0xfc }, |
| 188 | { 0x80f708, 0x00 }, |
| 189 | { 0x80f709, 0x37 }, |
| 190 | { 0x80f70a, 0x00 }, |
| 191 | { 0x80f78b, 0x01 }, |
| 192 | { 0x80f80f, 0x40 }, |
| 193 | { 0x80f810, 0x54 }, |
| 194 | { 0x80f811, 0x5a }, |
| 195 | { 0x80f905, 0x01 }, |
| 196 | { 0x80fb06, 0x03 }, |
| 197 | { 0x80fd8b, 0x00 }, |
| 198 | }; |
| 199 | |
| 200 | /* Infineon TUA 9001 tuner init |
| 201 | AF9033_TUNER_TUA9001 = 0x27 */ |
| 202 | static const struct reg_val tuner_init_tua9001[] = { |
| 203 | { 0x800046, 0x27 }, |
| 204 | { 0x800057, 0x00 }, |
| 205 | { 0x800058, 0x01 }, |
| 206 | { 0x80005f, 0x00 }, |
| 207 | { 0x800060, 0x00 }, |
| 208 | { 0x80006d, 0x00 }, |
| 209 | { 0x800071, 0x05 }, |
| 210 | { 0x800072, 0x02 }, |
| 211 | { 0x800074, 0x01 }, |
| 212 | { 0x800075, 0x03 }, |
| 213 | { 0x800076, 0x02 }, |
| 214 | { 0x800077, 0x00 }, |
| 215 | { 0x800078, 0x01 }, |
| 216 | { 0x800079, 0x00 }, |
| 217 | { 0x80007a, 0x7e }, |
| 218 | { 0x80007b, 0x3e }, |
| 219 | { 0x800093, 0x00 }, |
| 220 | { 0x800094, 0x01 }, |
| 221 | { 0x800095, 0x02 }, |
| 222 | { 0x800096, 0x01 }, |
| 223 | { 0x800098, 0x0a }, |
| 224 | { 0x80009b, 0x05 }, |
| 225 | { 0x80009c, 0x80 }, |
| 226 | { 0x8000b3, 0x00 }, |
| 227 | { 0x8000c1, 0x01 }, |
| 228 | { 0x8000c2, 0x00 }, |
| 229 | { 0x80f007, 0x00 }, |
| 230 | { 0x80f01f, 0x82 }, |
| 231 | { 0x80f020, 0x00 }, |
| 232 | { 0x80f029, 0x82 }, |
| 233 | { 0x80f02a, 0x00 }, |
| 234 | { 0x80f047, 0x00 }, |
| 235 | { 0x80f054, 0x00 }, |
| 236 | { 0x80f055, 0x00 }, |
| 237 | { 0x80f077, 0x01 }, |
| 238 | { 0x80f1e6, 0x00 }, |
| 239 | }; |
| 240 | |
| 241 | #endif /* AF9033_PRIV_H */ |
| 242 | |