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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef _M68KNOMMU_CACHEFLUSH_H
2#define _M68KNOMMU_CACHEFLUSH_H
3
4/*
Greg Ungerer8ce877a2010-11-09 13:35:55 +10005 * (C) Copyright 2000-2010, Greg Ungerer <gerg@snapgear.com>
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 */
7#include <linux/mm.h>
Greg Ungerer3d461402010-11-09 10:40:44 +10008#include <asm/mcfsim.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07009
10#define flush_cache_all() __flush_cache_all()
11#define flush_cache_mm(mm) do { } while (0)
Ralf Baechleec8c0442006-12-12 17:14:57 +000012#define flush_cache_dup_mm(mm) do { } while (0)
Greg Ungerer8ce877a2010-11-09 13:35:55 +100013#define flush_cache_range(vma, start, end) do { } while (0)
Greg Ungerer962d69e2005-09-13 11:14:08 +100014#define flush_cache_page(vma, vmaddr) do { } while (0)
Greg Ungerer07ffee52010-11-10 15:22:19 +100015#define flush_dcache_range(start, len) __flush_dcache_all()
Ilya Loginov2d4dc892009-11-26 09:16:19 +010016#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#define flush_dcache_page(page) do { } while (0)
18#define flush_dcache_mmap_lock(mapping) do { } while (0)
19#define flush_dcache_mmap_unlock(mapping) do { } while (0)
Greg Ungerer07ffee52010-11-10 15:22:19 +100020#define flush_icache_range(start, len) __flush_icache_all()
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#define flush_icache_page(vma,pg) do { } while (0)
22#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
Greg Ungerer962d69e2005-09-13 11:14:08 +100023#define flush_cache_vmap(start, end) do { } while (0)
24#define flush_cache_vunmap(start, end) do { } while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070025
26#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
27 memcpy(dst, src, len)
28#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
29 memcpy(dst, src, len)
30
Greg Ungererd475e3e42010-11-09 14:27:50 +100031void mcf_cache_push(void);
32
Greg Ungerer1744bd92012-05-02 17:02:21 +100033static inline void __clear_cache_all(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070034{
Greg Ungerer8ce877a2010-11-09 13:35:55 +100035#ifdef CACHE_INVALIDATE
Greg Ungerera1a9bcb2009-01-13 10:17:30 +100036 __asm__ __volatile__ (
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020037 "movec %0, %%CACR\n\t"
Greg Ungerera1a9bcb2009-01-13 10:17:30 +100038 "nop\n\t"
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020039 : : "r" (CACHE_INVALIDATE) );
Greg Ungerer8ce877a2010-11-09 13:35:55 +100040#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070041}
Linus Torvalds1da177e2005-04-16 15:20:36 -070042
Greg Ungerer1744bd92012-05-02 17:02:21 +100043static inline void __flush_cache_all(void)
44{
45#ifdef CACHE_PUSH
46 mcf_cache_push();
47#endif
48 __clear_cache_all();
49}
50
Greg Ungerer07ffee52010-11-10 15:22:19 +100051/*
52 * Some ColdFire parts implement separate instruction and data caches,
53 * on those we should just flush the appropriate cache. If we don't need
54 * to do any specific flushing then this will be optimized away.
55 */
56static inline void __flush_icache_all(void)
57{
58#ifdef CACHE_INVALIDATEI
59 __asm__ __volatile__ (
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020060 "movec %0, %%CACR\n\t"
Greg Ungerer07ffee52010-11-10 15:22:19 +100061 "nop\n\t"
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020062 : : "r" (CACHE_INVALIDATEI) );
Greg Ungerer07ffee52010-11-10 15:22:19 +100063#endif
64}
65
66static inline void __flush_dcache_all(void)
67{
68#ifdef CACHE_PUSH
69 mcf_cache_push();
70#endif
71#ifdef CACHE_INVALIDATED
72 __asm__ __volatile__ (
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020073 "movec %0, %%CACR\n\t"
Greg Ungerer07ffee52010-11-10 15:22:19 +100074 "nop\n\t"
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020075 : : "r" (CACHE_INVALIDATED) );
Greg Ungerer07ffee52010-11-10 15:22:19 +100076#else
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020077 /* Flush the write buffer */
Greg Ungerer07ffee52010-11-10 15:22:19 +100078 __asm__ __volatile__ ( "nop" );
79#endif
80}
Greg Ungerer1744bd92012-05-02 17:02:21 +100081
82/*
83 * Push cache entries at supplied address. We want to write back any dirty
Philippe De Muyter300b9ff2012-09-09 17:56:35 +020084 * data and then invalidate the cache lines associated with this address.
Greg Ungerer1744bd92012-05-02 17:02:21 +100085 */
86static inline void cache_push(unsigned long paddr, int len)
87{
88 __flush_cache_all();
89}
90
91/*
92 * Clear cache entries at supplied address (that is don't write back any
93 * dirty data).
94 */
95static inline void cache_clear(unsigned long paddr, int len)
96{
97 __clear_cache_all();
98}
99
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100#endif /* _M68KNOMMU_CACHEFLUSH_H */