Sanjay Lal | 740765c | 2012-11-21 18:34:00 -0800 | [diff] [blame] | 1 | /* |
David Daney | 1f3dc6d | 2013-05-23 09:49:05 -0700 | [diff] [blame] | 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved. |
| 7 | * Copyright (C) 2013 Cavium, Inc. |
| 8 | * Authors: Sanjay Lal <sanjayl@kymasys.com> |
| 9 | */ |
Sanjay Lal | 740765c | 2012-11-21 18:34:00 -0800 | [diff] [blame] | 10 | |
| 11 | #ifndef __LINUX_KVM_MIPS_H |
| 12 | #define __LINUX_KVM_MIPS_H |
| 13 | |
| 14 | #include <linux/types.h> |
| 15 | |
David Daney | 4c73fb2 | 2013-05-23 09:49:09 -0700 | [diff] [blame^] | 16 | /* |
| 17 | * KVM MIPS specific structures and definitions. |
| 18 | * |
| 19 | * Some parts derived from the x86 version of this file. |
| 20 | */ |
Sanjay Lal | 740765c | 2012-11-21 18:34:00 -0800 | [diff] [blame] | 21 | |
David Daney | 688cded | 2013-05-23 09:49:06 -0700 | [diff] [blame] | 22 | /* |
| 23 | * for KVM_GET_REGS and KVM_SET_REGS |
| 24 | * |
| 25 | * If Config[AT] is zero (32-bit CPU), the register contents are |
| 26 | * stored in the lower 32-bits of the struct kvm_regs fields and sign |
| 27 | * extended to 64-bits. |
| 28 | */ |
Sanjay Lal | 740765c | 2012-11-21 18:34:00 -0800 | [diff] [blame] | 29 | struct kvm_regs { |
David Daney | bf32ebf | 2013-05-23 09:49:07 -0700 | [diff] [blame] | 30 | /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */ |
| 31 | __u64 gpr[32]; |
David Daney | 688cded | 2013-05-23 09:49:06 -0700 | [diff] [blame] | 32 | __u64 hi; |
| 33 | __u64 lo; |
| 34 | __u64 pc; |
Sanjay Lal | 740765c | 2012-11-21 18:34:00 -0800 | [diff] [blame] | 35 | }; |
| 36 | |
David Daney | 1f3dc6d | 2013-05-23 09:49:05 -0700 | [diff] [blame] | 37 | /* |
| 38 | * for KVM_GET_FPU and KVM_SET_FPU |
| 39 | * |
| 40 | * If Status[FR] is zero (32-bit FPU), the upper 32-bits of the FPRs |
| 41 | * are zero filled. |
| 42 | */ |
Sanjay Lal | 740765c | 2012-11-21 18:34:00 -0800 | [diff] [blame] | 43 | struct kvm_fpu { |
David Daney | 1f3dc6d | 2013-05-23 09:49:05 -0700 | [diff] [blame] | 44 | __u64 fpr[32]; |
| 45 | __u32 fir; |
| 46 | __u32 fccr; |
| 47 | __u32 fexr; |
| 48 | __u32 fenr; |
| 49 | __u32 fcsr; |
| 50 | __u32 pad; |
Sanjay Lal | 740765c | 2012-11-21 18:34:00 -0800 | [diff] [blame] | 51 | }; |
| 52 | |
David Daney | 4c73fb2 | 2013-05-23 09:49:09 -0700 | [diff] [blame^] | 53 | |
| 54 | /* |
| 55 | * For MIPS, we use KVM_SET_ONE_REG and KVM_GET_ONE_REG to access CP0 |
| 56 | * registers. The id field is broken down as follows: |
| 57 | * |
| 58 | * bits[2..0] - Register 'sel' index. |
| 59 | * bits[7..3] - Register 'rd' index. |
| 60 | * bits[15..8] - Must be zero. |
| 61 | * bits[63..16] - 1 -> CP0 registers. |
| 62 | * |
| 63 | * Other sets registers may be added in the future. Each set would |
| 64 | * have its own identifier in bits[63..16]. |
| 65 | * |
| 66 | * The addr field of struct kvm_one_reg must point to an aligned |
| 67 | * 64-bit wide location. For registers that are narrower than |
| 68 | * 64-bits, the value is stored in the low order bits of the location, |
| 69 | * and sign extended to 64-bits. |
| 70 | * |
| 71 | * The registers defined in struct kvm_regs are also accessible, the |
| 72 | * id values for these are below. |
| 73 | */ |
| 74 | |
| 75 | #define KVM_REG_MIPS_R0 0 |
| 76 | #define KVM_REG_MIPS_R1 1 |
| 77 | #define KVM_REG_MIPS_R2 2 |
| 78 | #define KVM_REG_MIPS_R3 3 |
| 79 | #define KVM_REG_MIPS_R4 4 |
| 80 | #define KVM_REG_MIPS_R5 5 |
| 81 | #define KVM_REG_MIPS_R6 6 |
| 82 | #define KVM_REG_MIPS_R7 7 |
| 83 | #define KVM_REG_MIPS_R8 8 |
| 84 | #define KVM_REG_MIPS_R9 9 |
| 85 | #define KVM_REG_MIPS_R10 10 |
| 86 | #define KVM_REG_MIPS_R11 11 |
| 87 | #define KVM_REG_MIPS_R12 12 |
| 88 | #define KVM_REG_MIPS_R13 13 |
| 89 | #define KVM_REG_MIPS_R14 14 |
| 90 | #define KVM_REG_MIPS_R15 15 |
| 91 | #define KVM_REG_MIPS_R16 16 |
| 92 | #define KVM_REG_MIPS_R17 17 |
| 93 | #define KVM_REG_MIPS_R18 18 |
| 94 | #define KVM_REG_MIPS_R19 19 |
| 95 | #define KVM_REG_MIPS_R20 20 |
| 96 | #define KVM_REG_MIPS_R21 21 |
| 97 | #define KVM_REG_MIPS_R22 22 |
| 98 | #define KVM_REG_MIPS_R23 23 |
| 99 | #define KVM_REG_MIPS_R24 24 |
| 100 | #define KVM_REG_MIPS_R25 25 |
| 101 | #define KVM_REG_MIPS_R26 26 |
| 102 | #define KVM_REG_MIPS_R27 27 |
| 103 | #define KVM_REG_MIPS_R28 28 |
| 104 | #define KVM_REG_MIPS_R29 29 |
| 105 | #define KVM_REG_MIPS_R30 30 |
| 106 | #define KVM_REG_MIPS_R31 31 |
| 107 | |
| 108 | #define KVM_REG_MIPS_HI 32 |
| 109 | #define KVM_REG_MIPS_LO 33 |
| 110 | #define KVM_REG_MIPS_PC 34 |
| 111 | |
| 112 | /* |
| 113 | * KVM MIPS specific structures and definitions |
| 114 | * |
| 115 | */ |
Sanjay Lal | 740765c | 2012-11-21 18:34:00 -0800 | [diff] [blame] | 116 | struct kvm_debug_exit_arch { |
David Daney | 4c73fb2 | 2013-05-23 09:49:09 -0700 | [diff] [blame^] | 117 | __u64 epc; |
Sanjay Lal | 740765c | 2012-11-21 18:34:00 -0800 | [diff] [blame] | 118 | }; |
| 119 | |
| 120 | /* for KVM_SET_GUEST_DEBUG */ |
| 121 | struct kvm_guest_debug_arch { |
| 122 | }; |
| 123 | |
David Daney | 4c73fb2 | 2013-05-23 09:49:09 -0700 | [diff] [blame^] | 124 | /* definition of registers in kvm_run */ |
| 125 | struct kvm_sync_regs { |
| 126 | }; |
| 127 | |
| 128 | /* dummy definition */ |
| 129 | struct kvm_sregs { |
| 130 | }; |
| 131 | |
Sanjay Lal | 740765c | 2012-11-21 18:34:00 -0800 | [diff] [blame] | 132 | struct kvm_mips_interrupt { |
| 133 | /* in */ |
| 134 | __u32 cpu; |
| 135 | __u32 irq; |
| 136 | }; |
| 137 | |
Sanjay Lal | 740765c | 2012-11-21 18:34:00 -0800 | [diff] [blame] | 138 | #endif /* __LINUX_KVM_MIPS_H */ |