Ley Foon Tan | eaa6111 | 2015-10-23 18:27:12 +0800 | [diff] [blame] | 1 | * Altera PCIe controller |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible : should contain "altr,pcie-root-port-1.0" |
| 5 | - reg: a list of physical base address and length for TXS and CRA. |
| 6 | - reg-names: must include the following entries: |
| 7 | "Txs": TX slave port region |
| 8 | "Cra": Control register access region |
| 9 | - interrupt-parent: interrupt source phandle. |
Bjorn Helgaas | 96291d5 | 2017-09-01 16:35:50 -0500 | [diff] [blame] | 10 | - interrupts: specifies the interrupt source of the parent interrupt |
| 11 | controller. The format of the interrupt specifier depends |
| 12 | on the parent interrupt controller. |
Ley Foon Tan | eaa6111 | 2015-10-23 18:27:12 +0800 | [diff] [blame] | 13 | - device_type: must be "pci" |
| 14 | - #address-cells: set to <3> |
Bjorn Helgaas | 96291d5 | 2017-09-01 16:35:50 -0500 | [diff] [blame] | 15 | - #size-cells: set to <2> |
Ley Foon Tan | eaa6111 | 2015-10-23 18:27:12 +0800 | [diff] [blame] | 16 | - #interrupt-cells: set to <1> |
Bjorn Helgaas | 96291d5 | 2017-09-01 16:35:50 -0500 | [diff] [blame] | 17 | - ranges: describes the translation of addresses for root ports and |
| 18 | standard PCI regions. |
Ley Foon Tan | eaa6111 | 2015-10-23 18:27:12 +0800 | [diff] [blame] | 19 | - interrupt-map-mask and interrupt-map: standard PCI properties to define the |
| 20 | mapping of the PCIe interface to interrupt numbers. |
| 21 | |
| 22 | Optional properties: |
Bjorn Helgaas | 96291d5 | 2017-09-01 16:35:50 -0500 | [diff] [blame] | 23 | - msi-parent: Link to the hardware entity that serves as the MSI controller |
| 24 | for this PCIe controller. |
Ley Foon Tan | eaa6111 | 2015-10-23 18:27:12 +0800 | [diff] [blame] | 25 | - bus-range: PCI bus numbers covered |
| 26 | |
| 27 | Example |
Mathieu Malaterre | 4c9847b | 2017-11-29 21:55:15 +0100 | [diff] [blame^] | 28 | pcie_0: pcie@c00000000 { |
Ley Foon Tan | eaa6111 | 2015-10-23 18:27:12 +0800 | [diff] [blame] | 29 | compatible = "altr,pcie-root-port-1.0"; |
| 30 | reg = <0xc0000000 0x20000000>, |
| 31 | <0xff220000 0x00004000>; |
| 32 | reg-names = "Txs", "Cra"; |
| 33 | interrupt-parent = <&hps_0_arm_gic_0>; |
| 34 | interrupts = <0 40 4>; |
| 35 | interrupt-controller; |
| 36 | #interrupt-cells = <1>; |
| 37 | bus-range = <0x0 0xFF>; |
| 38 | device_type = "pci"; |
| 39 | msi-parent = <&msi_to_gic_gen_0>; |
| 40 | #address-cells = <3>; |
| 41 | #size-cells = <2>; |
| 42 | interrupt-map-mask = <0 0 0 7>; |
| 43 | interrupt-map = <0 0 0 1 &pcie_0 1>, |
| 44 | <0 0 0 2 &pcie_0 2>, |
| 45 | <0 0 0 3 &pcie_0 3>, |
| 46 | <0 0 0 4 &pcie_0 4>; |
| 47 | ranges = <0x82000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x10000000 |
Bjorn Helgaas | 96291d5 | 2017-09-01 16:35:50 -0500 | [diff] [blame] | 48 | 0x82000000 0x00000000 0x10000000 0xd0000000 0x00000000 0x10000000>; |
Ley Foon Tan | eaa6111 | 2015-10-23 18:27:12 +0800 | [diff] [blame] | 49 | }; |