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David Brownell9904f222006-01-08 13:34:26 -08001#ifndef __SPI_BITBANG_H
2#define __SPI_BITBANG_H
3
4/*
5 * Mix this utility code with some glue code to get one of several types of
6 * simple SPI master driver. Two do polled word-at-a-time I/O:
7 *
8 * - GPIO/parport bitbangers. Provide chipselect() and txrx_word[](),
9 * expanding the per-word routines from the inline templates below.
10 *
11 * - Drivers for controllers resembling bare shift registers. Provide
12 * chipselect() and txrx_word[](), with custom setup()/cleanup() methods
13 * that use your controller's clock and chipselect registers.
14 *
15 * Some hardware works well with requests at spi_transfer scope:
16 *
17 * - Drivers leveraging smarter hardware, with fifos or DMA; or for half
18 * duplex (MicroWire) controllers. Provide chipslect() and txrx_bufs(),
19 * and custom setup()/cleanup() methods.
20 */
21struct spi_bitbang {
22 struct workqueue_struct *workqueue;
23 struct work_struct work;
24
25 spinlock_t lock;
26 struct list_head queue;
27 u8 busy;
28 u8 shutdown;
29 u8 use_dma;
30
31 struct spi_master *master;
32
Imre Deak4cff33f2006-02-17 10:02:18 -080033 /* setup_transfer() changes clock and/or wordsize to match settings
34 * for this transfer; zeroes restore defaults from spi_device.
35 */
36 int (*setup_transfer)(struct spi_device *spi,
37 struct spi_transfer *t);
38
David Brownell9904f222006-01-08 13:34:26 -080039 void (*chipselect)(struct spi_device *spi, int is_on);
Vitaly Wool8275c642006-01-08 13:34:28 -080040#define BITBANG_CS_ACTIVE 1 /* normally nCS, active low */
41#define BITBANG_CS_INACTIVE 0
David Brownell9904f222006-01-08 13:34:26 -080042
Vitaly Wool8275c642006-01-08 13:34:28 -080043 /* txrx_bufs() may handle dma mapping for transfers that don't
44 * already have one (transfer.{tx,rx}_dma is zero), or use PIO
45 */
David Brownell9904f222006-01-08 13:34:26 -080046 int (*txrx_bufs)(struct spi_device *spi, struct spi_transfer *t);
Vitaly Wool8275c642006-01-08 13:34:28 -080047
48 /* txrx_word[SPI_MODE_*]() just looks like a shift register */
David Brownell9904f222006-01-08 13:34:26 -080049 u32 (*txrx_word[4])(struct spi_device *spi,
50 unsigned nsecs,
51 u32 word, u8 bits);
52};
53
54/* you can call these default bitbang->master methods from your custom
55 * methods, if you like.
56 */
57extern int spi_bitbang_setup(struct spi_device *spi);
58extern void spi_bitbang_cleanup(const struct spi_device *spi);
59extern int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m);
60
61/* start or stop queue processing */
62extern int spi_bitbang_start(struct spi_bitbang *spi);
63extern int spi_bitbang_stop(struct spi_bitbang *spi);
64
65#endif /* __SPI_BITBANG_H */
66
67/*-------------------------------------------------------------------------*/
68
69#ifdef EXPAND_BITBANG_TXRX
70
71/*
72 * The code that knows what GPIO pins do what should have declared four
73 * functions, ideally as inlines, before #defining EXPAND_BITBANG_TXRX
74 * and including this header:
75 *
76 * void setsck(struct spi_device *, int is_on);
77 * void setmosi(struct spi_device *, int is_on);
78 * int getmiso(struct spi_device *);
79 * void spidelay(unsigned);
80 *
81 * A non-inlined routine would call bitbang_txrx_*() routines. The
82 * main loop could easily compile down to a handful of instructions,
83 * especially if the delay is a NOP (to run at peak speed).
84 *
85 * Since this is software, the timings may not be exactly what your board's
86 * chips need ... there may be several reasons you'd need to tweak timings
87 * in these routines, not just make to make it faster or slower to match a
88 * particular CPU clock rate.
89 */
90
91static inline u32
92bitbang_txrx_be_cpha0(struct spi_device *spi,
93 unsigned nsecs, unsigned cpol,
94 u32 word, u8 bits)
95{
96 /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
97
98 /* clock starts at inactive polarity */
99 for (word <<= (32 - bits); likely(bits); bits--) {
100
101 /* setup MSB (to slave) on trailing edge */
102 setmosi(spi, word & (1 << 31));
103 spidelay(nsecs); /* T(setup) */
104
105 setsck(spi, !cpol);
106 spidelay(nsecs);
107
108 /* sample MSB (from slave) on leading edge */
109 word <<= 1;
110 word |= getmiso(spi);
111 setsck(spi, cpol);
112 }
113 return word;
114}
115
116static inline u32
117bitbang_txrx_be_cpha1(struct spi_device *spi,
118 unsigned nsecs, unsigned cpol,
119 u32 word, u8 bits)
120{
121 /* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */
122
123 /* clock starts at inactive polarity */
124 for (word <<= (32 - bits); likely(bits); bits--) {
125
126 /* setup MSB (to slave) on leading edge */
127 setsck(spi, !cpol);
128 setmosi(spi, word & (1 << 31));
129 spidelay(nsecs); /* T(setup) */
130
131 setsck(spi, cpol);
132 spidelay(nsecs);
133
134 /* sample MSB (from slave) on trailing edge */
135 word <<= 1;
136 word |= getmiso(spi);
137 }
138 return word;
139}
140
141#endif /* EXPAND_BITBANG_TXRX */