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Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -07001/*******************************************************************************
2 Copyright (C) 2007-2009 STMicroelectronics Ltd
3
4 This program is free software; you can redistribute it and/or modify it
5 under the terms and conditions of the GNU General Public License,
6 version 2, as published by the Free Software Foundation.
7
8 This program is distributed in the hope it will be useful, but WITHOUT
9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 more details.
12
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -070013 The full GNU General Public License is included in this distribution in
14 the file called "COPYING".
15
16 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
17*******************************************************************************/
18
Rayagond Kokatanurbd4242d2012-08-22 21:28:18 +000019#ifndef __STMMAC_H__
20#define __STMMAC_H__
21
Giuseppe CAVALLARObfab27a2011-12-21 03:58:19 +000022#define STMMAC_RESOURCE_NAME "stmmaceth"
Alexandre TORGUE06bce7d2016-04-01 11:37:36 +020023#define DRV_MODULE_VERSION "Jan_2016"
Giuseppe CAVALLAROba1377ff2012-04-04 04:33:25 +000024
25#include <linux/clk.h>
Giuseppe CAVALLAROee7946a2010-01-06 23:07:14 +000026#include <linux/stmmac.h>
Giuseppe CAVALLARO286a8372011-10-18 00:01:24 +000027#include <linux/phy.h>
Giuseppe CAVALLARO33d5e332012-06-07 19:25:07 +000028#include <linux/pci.h>
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -070029#include "common.h"
Rayagond Kokatanur92ba6882013-03-26 04:43:11 +000030#include <linux/ptp_clock_kernel.h>
Chen-Yu Tsaic5e4ddb2014-01-17 21:24:41 +080031#include <linux/reset.h>
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -070032
Joachim Eastwoode56788c2015-05-20 20:03:07 +020033struct stmmac_resources {
34 void __iomem *addr;
35 const char *mac;
36 int wol_irq;
37 int lpi_irq;
38 int irq;
39};
40
Giuseppe CAVALLARO362b37b2014-08-27 11:27:00 +020041struct stmmac_tx_info {
42 dma_addr_t buf;
43 bool map_as_page;
Giuseppe Cavallaro553e2ab2016-02-29 14:27:31 +010044 unsigned len;
Giuseppe Cavallaro2a6d8e12016-02-29 14:27:32 +010045 bool last_segment;
Giuseppe Cavallaro96951362016-02-29 14:27:33 +010046 bool is_jumbo;
Giuseppe CAVALLARO362b37b2014-08-27 11:27:00 +020047};
48
Joao Pintoce736782017-04-06 09:49:10 +010049/* Frequently used values are kept adjacent for cache effect */
50struct stmmac_tx_queue {
51 u32 queue_index;
52 struct stmmac_priv *priv_data;
53 struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
54 struct dma_desc *dma_tx;
55 struct sk_buff **tx_skbuff;
56 struct stmmac_tx_info *tx_skbuff_dma;
57 unsigned int cur_tx;
58 unsigned int dirty_tx;
59 dma_addr_t dma_tx_phy;
60 u32 tx_tail_addr;
Niklas Cassel8d212a9e2018-02-19 18:11:09 +010061 u32 mss;
Joao Pintoce736782017-04-06 09:49:10 +010062};
63
Joao Pinto54139cf2017-04-06 09:49:09 +010064struct stmmac_rx_queue {
65 u32 queue_index;
66 struct stmmac_priv *priv_data;
67 struct dma_extended_desc *dma_erx;
68 struct dma_desc *dma_rx ____cacheline_aligned_in_smp;
69 struct sk_buff **rx_skbuff;
70 dma_addr_t *rx_skbuff_dma;
71 unsigned int cur_rx;
72 unsigned int dirty_rx;
73 u32 rx_zeroc_thresh;
74 dma_addr_t dma_rx_phy;
75 u32 rx_tail_addr;
Joao Pintoc22a3f42017-04-06 09:49:11 +010076 struct napi_struct napi ____cacheline_aligned_in_smp;
Joao Pinto54139cf2017-04-06 09:49:09 +010077};
78
Jose Abreu4dbbe8d2018-05-04 10:01:38 +010079struct stmmac_tc_entry {
80 bool in_use;
81 bool in_hw;
82 bool is_last;
83 bool is_frag;
84 void *frag_ptr;
85 unsigned int table_pos;
86 u32 handle;
87 u32 prio;
88 struct {
89 u32 match_data;
90 u32 match_en;
91 u8 af:1;
92 u8 rf:1;
93 u8 im:1;
94 u8 nc:1;
95 u8 res1:4;
96 u8 frame_offset;
97 u8 ok_index;
98 u8 dma_ch_no;
99 u32 res2;
100 } __packed val;
101};
102
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700103struct stmmac_priv {
104 /* Frequently used values are kept adjacent for cache effect */
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000105 u32 tx_count_frames;
106 u32 tx_coal_frames;
107 u32 tx_coal_timer;
Joao Pintoce736782017-04-06 09:49:10 +0100108
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700109 int tx_coalesce;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000110 int hwts_tx_en;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000111 bool tx_path_in_lpi_mode;
112 struct timer_list txtimer;
Alexandre TORGUEf748be52016-04-01 11:37:34 +0200113 bool tso;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700114
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700115 unsigned int dma_buf_sz;
Giuseppe Cavallaro22ad3832016-02-29 14:27:41 +0100116 unsigned int rx_copybreak;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000117 u32 rx_riwt;
118 int hwts_rx_en;
LABBE Corentin5bacd772017-03-29 07:05:40 +0200119
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000120 void __iomem *ioaddr;
121 struct net_device *dev;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700122 struct device *device;
Giuseppe CAVALLAROdb98a0b2010-01-06 23:07:17 +0000123 struct mac_device_info *hw;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000124 spinlock_t lock;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700125
Joao Pinto54139cf2017-04-06 09:49:09 +0100126 /* RX Queue */
127 struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES];
128
Joao Pintoce736782017-04-06 09:49:10 +0100129 /* TX Queue */
130 struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES];
131
LABBE Corentin4d869b02017-05-24 09:16:46 +0200132 bool oldlink;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700133 int speed;
134 int oldduplex;
135 unsigned int flow_ctrl;
136 unsigned int pause;
137 struct mii_bus *mii;
Giuseppe CAVALLARO36bcfe72011-07-20 00:05:23 +0000138 int mii_irq[PHY_MAX_ADDR];
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700139
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000140 struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp;
Jose Abreu8bf993a2018-03-29 10:40:19 +0100141 struct stmmac_safety_stats sstats;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000142 struct plat_stmmacenet_data *plat;
143 struct dma_features dma_cap;
144 struct stmmac_counters mmc;
145 int hw_cap_support;
146 int synopsys_id;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700147 u32 msg_enable;
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700148 int wolopts;
Deepak Sikri3172d3a2011-09-01 21:51:37 +0000149 int wol_irq;
Giuseppe CAVALLAROcd7201f2012-04-04 04:33:27 +0000150 int clk_csr;
Giuseppe CAVALLAROd7659552012-06-27 21:14:37 +0000151 struct timer_list eee_ctrl_timer;
Giuseppe CAVALLAROd7659552012-06-27 21:14:37 +0000152 int lpi_irq;
153 int eee_enabled;
154 int eee_active;
155 int tx_lpi_timer;
Giuseppe CAVALLARO4a7d6662013-03-26 04:43:05 +0000156 unsigned int mode;
Jose Abreu5f0456b2018-04-23 09:05:15 +0100157 unsigned int chain_mode;
Giuseppe CAVALLAROc24602e2013-03-26 04:43:06 +0000158 int extend_desc;
Rayagond Kokatanur92ba6882013-03-26 04:43:11 +0000159 struct ptp_clock *ptp_clock;
160 struct ptp_clock_info ptp_clock_ops;
Giuseppe CAVALLARO1bb6dea2013-04-08 02:10:02 +0000161 unsigned int default_addend;
162 u32 adv_ts;
163 int use_riwt;
Srinivas Kandagatla89f7f2c2014-01-16 10:53:00 +0000164 int irq_wake;
Rayagond Kokatanur92ba6882013-03-26 04:43:11 +0000165 spinlock_t ptp_lock;
Alexandre TORGUE36ff7c12016-04-01 11:37:32 +0200166 void __iomem *mmcaddr;
Giuseppe CAVALLAROba1ffd72016-11-14 09:27:29 +0100167 void __iomem *ptpaddr;
Mathieu Olivari466c5ac2015-05-22 19:03:29 -0700168
169#ifdef CONFIG_DEBUG_FS
170 struct dentry *dbgfs_dir;
171 struct dentry *dbgfs_rings_status;
172 struct dentry *dbgfs_dma_cap;
173#endif
Jose Abreu34877a12018-03-29 10:40:18 +0100174
175 unsigned long state;
176 struct workqueue_struct *wq;
177 struct work_struct service_task;
Jose Abreu4dbbe8d2018-05-04 10:01:38 +0100178
179 /* TC Handling */
180 unsigned int tc_entries_max;
181 unsigned int tc_off_max;
182 struct stmmac_tc_entry *tc_entries;
Jose Abreu34877a12018-03-29 10:40:18 +0100183};
184
185enum stmmac_state {
186 STMMAC_DOWN,
187 STMMAC_RESET_REQUESTED,
188 STMMAC_RESETING,
189 STMMAC_SERVICE_SCHED,
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -0700190};
191
Joe Perchesd6cc64e2013-09-23 11:37:59 -0700192int stmmac_mdio_unregister(struct net_device *ndev);
193int stmmac_mdio_register(struct net_device *ndev);
Srinivas Kandagatla073752a2014-01-16 10:52:27 +0000194int stmmac_mdio_reset(struct mii_bus *mii);
Joe Perchesd6cc64e2013-09-23 11:37:59 -0700195void stmmac_set_ethtool_ops(struct net_device *netdev);
Andy Shevchenko915af652014-11-05 11:45:32 +0200196
Giuseppe CAVALLAROc30a70d2016-10-19 09:06:41 +0200197void stmmac_ptp_register(struct stmmac_priv *priv);
Joe Perchesd6cc64e2013-09-23 11:37:59 -0700198void stmmac_ptp_unregister(struct stmmac_priv *priv);
Joachim Eastwoodf4e7bd82016-05-01 22:58:19 +0200199int stmmac_resume(struct device *dev);
200int stmmac_suspend(struct device *dev);
201int stmmac_dvr_remove(struct device *dev);
Joachim Eastwood15ffac72015-05-20 20:03:08 +0200202int stmmac_dvr_probe(struct device *device,
203 struct plat_stmmacenet_data *plat_dat,
204 struct stmmac_resources *res);
Giuseppe CAVALLAROd7659552012-06-27 21:14:37 +0000205void stmmac_disable_eee_mode(struct stmmac_priv *priv);
206bool stmmac_eee_init(struct stmmac_priv *priv);
Giuseppe CAVALLAROba1377ff2012-04-04 04:33:25 +0000207
Rayagond Kokatanurbd4242d2012-08-22 21:28:18 +0000208#endif /* __STMMAC_H__ */