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Sujith Manoharanef1b6cd2012-06-04 20:23:37 +05301/*
2 * Copyright (c) 2012 Qualcomm Atheros, Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include "ath9k.h"
18
19/*
20 * TX polling - checks if the TX engine is stuck somewhere
21 * and issues a chip reset if so.
22 */
23void ath_tx_complete_poll_work(struct work_struct *work)
24{
25 struct ath_softc *sc = container_of(work, struct ath_softc,
26 tx_complete_work.work);
27 struct ath_txq *txq;
28 int i;
29 bool needreset = false;
30#ifdef CONFIG_ATH9K_DEBUGFS
31 sc->tx_complete_poll_work_seen++;
32#endif
33
34 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
35 if (ATH_TXQ_SETUP(sc, i)) {
36 txq = &sc->tx.txq[i];
37 ath_txq_lock(sc, txq);
38 if (txq->axq_depth) {
39 if (txq->axq_tx_inprogress) {
40 needreset = true;
41 ath_txq_unlock(sc, txq);
42 break;
43 } else {
44 txq->axq_tx_inprogress = true;
45 }
46 }
47 ath_txq_unlock_complete(sc, txq);
48 }
49
50 if (needreset) {
51 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET,
52 "tx hung, resetting the chip\n");
53 RESET_STAT_INC(sc, RESET_TYPE_TX_HANG);
54 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
Sujith Manoharanaf68aba2012-06-04 20:23:43 +053055 return;
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +053056 }
57
58 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
59 msecs_to_jiffies(ATH_TX_COMPLETE_POLL_INT));
60}
61
62/*
63 * Checks if the BB/MAC is hung.
64 */
65void ath_hw_check(struct work_struct *work)
66{
67 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
68 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
69 unsigned long flags;
70 int busy;
71 u8 is_alive, nbeacon = 1;
72
73 ath9k_ps_wakeup(sc);
74 is_alive = ath9k_hw_check_alive(sc->sc_ah);
75
76 if (is_alive && !AR_SREV_9300(sc->sc_ah))
77 goto out;
78 else if (!is_alive && AR_SREV_9300(sc->sc_ah)) {
79 ath_dbg(common, RESET,
80 "DCU stuck is detected. Schedule chip reset\n");
81 RESET_STAT_INC(sc, RESET_TYPE_MAC_HANG);
82 goto sched_reset;
83 }
84
85 spin_lock_irqsave(&common->cc_lock, flags);
86 busy = ath_update_survey_stats(sc);
87 spin_unlock_irqrestore(&common->cc_lock, flags);
88
89 ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
90 busy, sc->hw_busy_count + 1);
91 if (busy >= 99) {
92 if (++sc->hw_busy_count >= 3) {
93 RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
94 goto sched_reset;
95 }
96 } else if (busy >= 0) {
97 sc->hw_busy_count = 0;
98 nbeacon = 3;
99 }
100
101 ath_start_rx_poll(sc, nbeacon);
102 goto out;
103
104sched_reset:
105 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
106out:
107 ath9k_ps_restore(sc);
108}
109
110/*
Sujith Manoharanaf68aba2012-06-04 20:23:43 +0530111 * PLL-WAR for AR9485/AR9340
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +0530112 */
Sujith Manoharanaf68aba2012-06-04 20:23:43 +0530113static bool ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +0530114{
115 static int count;
116 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
117
118 if (pll_sqsum >= 0x40000) {
119 count++;
120 if (count == 3) {
Sujith Manoharanaf68aba2012-06-04 20:23:43 +0530121 ath_dbg(common, RESET, "PLL WAR, resetting the chip\n");
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +0530122 RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
123 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
124 count = 0;
Sujith Manoharanaf68aba2012-06-04 20:23:43 +0530125 return true;
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +0530126 }
Sujith Manoharanaf68aba2012-06-04 20:23:43 +0530127 } else {
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +0530128 count = 0;
Sujith Manoharanaf68aba2012-06-04 20:23:43 +0530129 }
130
131 return false;
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +0530132}
133
134void ath_hw_pll_work(struct work_struct *work)
135{
Sujith Manoharanaf68aba2012-06-04 20:23:43 +0530136 u32 pll_sqsum;
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +0530137 struct ath_softc *sc = container_of(work, struct ath_softc,
138 hw_pll_work.work);
Mohammed Shafi Shajakhan64bc1232012-06-12 20:13:43 +0530139 /*
140 * ensure that the PLL WAR is executed only
141 * after the STA is associated (or) if the
142 * beaconing had started in interfaces that
143 * uses beacons.
144 */
145 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
146 return;
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +0530147
Sujith Manoharanaf68aba2012-06-04 20:23:43 +0530148 ath9k_ps_wakeup(sc);
149 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
150 ath9k_ps_restore(sc);
151 if (ath_hw_pll_rx_hang_check(sc, pll_sqsum))
152 return;
153
154 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
155 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +0530156}
157
158/*
159 * RX Polling - monitors baseband hangs.
160 */
161void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon)
162{
163 if (!AR_SREV_9300(sc->sc_ah))
164 return;
165
Sujith Manoharan781b14a2012-06-04 20:23:55 +0530166 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +0530167 return;
168
169 mod_timer(&sc->rx_poll_timer, jiffies + msecs_to_jiffies
170 (nbeacon * sc->cur_beacon_conf.beacon_interval));
171}
172
173void ath_rx_poll(unsigned long data)
174{
175 struct ath_softc *sc = (struct ath_softc *)data;
176
177 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
178}
179
180/*
181 * PA Pre-distortion.
182 */
183static void ath_paprd_activate(struct ath_softc *sc)
184{
185 struct ath_hw *ah = sc->sc_ah;
186 struct ath9k_hw_cal_data *caldata = ah->caldata;
187 int chain;
188
189 if (!caldata || !caldata->paprd_done)
190 return;
191
192 ath9k_ps_wakeup(sc);
193 ar9003_paprd_enable(ah, false);
194 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
195 if (!(ah->txchainmask & BIT(chain)))
196 continue;
197
198 ar9003_paprd_populate_single_table(ah, caldata, chain);
199 }
200
201 ar9003_paprd_enable(ah, true);
202 ath9k_ps_restore(sc);
203}
204
205static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
206{
207 struct ieee80211_hw *hw = sc->hw;
208 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
209 struct ath_hw *ah = sc->sc_ah;
210 struct ath_common *common = ath9k_hw_common(ah);
211 struct ath_tx_control txctl;
212 int time_left;
213
214 memset(&txctl, 0, sizeof(txctl));
215 txctl.txq = sc->tx.txq_map[WME_AC_BE];
216
217 memset(tx_info, 0, sizeof(*tx_info));
218 tx_info->band = hw->conf.channel->band;
219 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
220 tx_info->control.rates[0].idx = 0;
221 tx_info->control.rates[0].count = 1;
222 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
223 tx_info->control.rates[1].idx = -1;
224
225 init_completion(&sc->paprd_complete);
226 txctl.paprd = BIT(chain);
227
228 if (ath_tx_start(hw, skb, &txctl) != 0) {
229 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
230 dev_kfree_skb_any(skb);
231 return false;
232 }
233
234 time_left = wait_for_completion_timeout(&sc->paprd_complete,
235 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
236
237 if (!time_left)
238 ath_dbg(common, CALIBRATE,
239 "Timeout waiting for paprd training on TX chain %d\n",
240 chain);
241
242 return !!time_left;
243}
244
245void ath_paprd_calibrate(struct work_struct *work)
246{
247 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
248 struct ieee80211_hw *hw = sc->hw;
249 struct ath_hw *ah = sc->sc_ah;
250 struct ieee80211_hdr *hdr;
251 struct sk_buff *skb = NULL;
252 struct ath9k_hw_cal_data *caldata = ah->caldata;
253 struct ath_common *common = ath9k_hw_common(ah);
254 int ftype;
255 int chain_ok = 0;
256 int chain;
257 int len = 1800;
258
259 if (!caldata)
260 return;
261
262 ath9k_ps_wakeup(sc);
263
264 if (ar9003_paprd_init_table(ah) < 0)
265 goto fail_paprd;
266
267 skb = alloc_skb(len, GFP_KERNEL);
268 if (!skb)
269 goto fail_paprd;
270
271 skb_put(skb, len);
272 memset(skb->data, 0, len);
273 hdr = (struct ieee80211_hdr *)skb->data;
274 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
275 hdr->frame_control = cpu_to_le16(ftype);
276 hdr->duration_id = cpu_to_le16(10);
277 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
278 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
279 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
280
281 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
282 if (!(ah->txchainmask & BIT(chain)))
283 continue;
284
285 chain_ok = 0;
286
287 ath_dbg(common, CALIBRATE,
288 "Sending PAPRD frame for thermal measurement on chain %d\n",
289 chain);
290 if (!ath_paprd_send_frame(sc, skb, chain))
291 goto fail_paprd;
292
293 ar9003_paprd_setup_gain_table(ah, chain);
294
295 ath_dbg(common, CALIBRATE,
296 "Sending PAPRD training frame on chain %d\n", chain);
297 if (!ath_paprd_send_frame(sc, skb, chain))
298 goto fail_paprd;
299
300 if (!ar9003_paprd_is_done(ah)) {
301 ath_dbg(common, CALIBRATE,
302 "PAPRD not yet done on chain %d\n", chain);
303 break;
304 }
305
306 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
307 ath_dbg(common, CALIBRATE,
308 "PAPRD create curve failed on chain %d\n",
Sujith Manoharanaf68aba2012-06-04 20:23:43 +0530309 chain);
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +0530310 break;
311 }
312
313 chain_ok = 1;
314 }
315 kfree_skb(skb);
316
317 if (chain_ok) {
318 caldata->paprd_done = true;
319 ath_paprd_activate(sc);
320 }
321
322fail_paprd:
323 ath9k_ps_restore(sc);
324}
325
326/*
327 * ANI performs periodic noise floor calibration
328 * that is used to adjust and optimize the chip performance. This
329 * takes environmental changes (location, temperature) into account.
330 * When the task is complete, it reschedules itself depending on the
331 * appropriate interval that was calculated.
332 */
333void ath_ani_calibrate(unsigned long data)
334{
335 struct ath_softc *sc = (struct ath_softc *)data;
336 struct ath_hw *ah = sc->sc_ah;
337 struct ath_common *common = ath9k_hw_common(ah);
338 bool longcal = false;
339 bool shortcal = false;
340 bool aniflag = false;
341 unsigned int timestamp = jiffies_to_msecs(jiffies);
342 u32 cal_interval, short_cal_interval, long_cal_interval;
343 unsigned long flags;
344
345 if (ah->caldata && ah->caldata->nfcal_interference)
346 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
347 else
348 long_cal_interval = ATH_LONG_CALINTERVAL;
349
350 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
351 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
352
353 /* Only calibrate if awake */
354 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
355 goto set_timer;
356
357 ath9k_ps_wakeup(sc);
358
359 /* Long calibration runs independently of short calibration. */
360 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
361 longcal = true;
362 common->ani.longcal_timer = timestamp;
363 }
364
365 /* Short calibration applies only while caldone is false */
366 if (!common->ani.caldone) {
367 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
368 shortcal = true;
369 common->ani.shortcal_timer = timestamp;
370 common->ani.resetcal_timer = timestamp;
371 }
372 } else {
373 if ((timestamp - common->ani.resetcal_timer) >=
374 ATH_RESTART_CALINTERVAL) {
375 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
376 if (common->ani.caldone)
377 common->ani.resetcal_timer = timestamp;
378 }
379 }
380
381 /* Verify whether we must check ANI */
382 if (sc->sc_ah->config.enable_ani
383 && (timestamp - common->ani.checkani_timer) >=
384 ah->config.ani_poll_interval) {
385 aniflag = true;
386 common->ani.checkani_timer = timestamp;
387 }
388
389 /* Call ANI routine if necessary */
390 if (aniflag) {
391 spin_lock_irqsave(&common->cc_lock, flags);
392 ath9k_hw_ani_monitor(ah, ah->curchan);
393 ath_update_survey_stats(sc);
394 spin_unlock_irqrestore(&common->cc_lock, flags);
395 }
396
397 /* Perform calibration if necessary */
398 if (longcal || shortcal) {
399 common->ani.caldone =
400 ath9k_hw_calibrate(ah, ah->curchan,
401 ah->rxchainmask, longcal);
402 }
403
404 ath_dbg(common, ANI,
405 "Calibration @%lu finished: %s %s %s, caldone: %s\n",
406 jiffies,
407 longcal ? "long" : "", shortcal ? "short" : "",
408 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
409
Rajkumar Manoharan5039f382012-06-19 14:50:28 +0530410 ath9k_debug_samp_bb_mac(sc);
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +0530411 ath9k_ps_restore(sc);
412
413set_timer:
414 /*
415 * Set timer interval based on previous results.
416 * The interval must be the shortest necessary to satisfy ANI,
417 * short calibration and long calibration.
418 */
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +0530419 cal_interval = ATH_LONG_CALINTERVAL;
420 if (sc->sc_ah->config.enable_ani)
421 cal_interval = min(cal_interval,
422 (u32)ah->config.ani_poll_interval);
423 if (!common->ani.caldone)
424 cal_interval = min(cal_interval, (u32)short_cal_interval);
425
426 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
427 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
428 if (!ah->caldata->paprd_done)
429 ieee80211_queue_work(sc->hw, &sc->paprd_work);
430 else if (!ah->paprd_table_write_done)
431 ath_paprd_activate(sc);
432 }
433}
434
435void ath_start_ani(struct ath_common *common)
436{
437 struct ath_hw *ah = common->ah;
438 unsigned long timestamp = jiffies_to_msecs(jiffies);
439 struct ath_softc *sc = (struct ath_softc *) common->priv;
440
Sujith Manoharan781b14a2012-06-04 20:23:55 +0530441 if (!test_bit(SC_OP_ANI_RUN, &sc->sc_flags))
Sujith Manoharanef1b6cd2012-06-04 20:23:37 +0530442 return;
443
444 if (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
445 return;
446
447 common->ani.longcal_timer = timestamp;
448 common->ani.shortcal_timer = timestamp;
449 common->ani.checkani_timer = timestamp;
450
451 mod_timer(&common->ani.timer,
452 jiffies + msecs_to_jiffies((u32)ah->config.ani_poll_interval));
453}
454
455void ath_update_survey_nf(struct ath_softc *sc, int channel)
456{
457 struct ath_hw *ah = sc->sc_ah;
458 struct ath9k_channel *chan = &ah->channels[channel];
459 struct survey_info *survey = &sc->survey[channel];
460
461 if (chan->noisefloor) {
462 survey->filled |= SURVEY_INFO_NOISE_DBM;
463 survey->noise = ath9k_hw_getchan_noise(ah, chan);
464 }
465}
466
467/*
468 * Updates the survey statistics and returns the busy time since last
469 * update in %, if the measurement duration was long enough for the
470 * result to be useful, -1 otherwise.
471 */
472int ath_update_survey_stats(struct ath_softc *sc)
473{
474 struct ath_hw *ah = sc->sc_ah;
475 struct ath_common *common = ath9k_hw_common(ah);
476 int pos = ah->curchan - &ah->channels[0];
477 struct survey_info *survey = &sc->survey[pos];
478 struct ath_cycle_counters *cc = &common->cc_survey;
479 unsigned int div = common->clockrate * 1000;
480 int ret = 0;
481
482 if (!ah->curchan)
483 return -1;
484
485 if (ah->power_mode == ATH9K_PM_AWAKE)
486 ath_hw_cycle_counters_update(common);
487
488 if (cc->cycles > 0) {
489 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
490 SURVEY_INFO_CHANNEL_TIME_BUSY |
491 SURVEY_INFO_CHANNEL_TIME_RX |
492 SURVEY_INFO_CHANNEL_TIME_TX;
493 survey->channel_time += cc->cycles / div;
494 survey->channel_time_busy += cc->rx_busy / div;
495 survey->channel_time_rx += cc->rx_frame / div;
496 survey->channel_time_tx += cc->tx_frame / div;
497 }
498
499 if (cc->cycles < div)
500 return -1;
501
502 if (cc->cycles > 0)
503 ret = cc->rx_busy * 100 / cc->cycles;
504
505 memset(cc, 0, sizeof(*cc));
506
507 ath_update_survey_nf(sc, pos);
508
509 return ret;
510}