Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Device driver for the IIsi-style ADB on some Mac LC and II-class machines |
| 3 | * |
| 4 | * Based on via-cuda.c and via-macii.c, as well as the original |
| 5 | * adb-bus.c, which in turn is somewhat influenced by (but uses no |
| 6 | * code from) the NetBSD HWDIRECT ADB code. Original IIsi driver work |
| 7 | * was done by Robert Thompson and integrated into the old style |
| 8 | * driver by Michael Schmitz. |
| 9 | * |
| 10 | * Original sources (c) Alan Cox, Paul Mackerras, and others. |
| 11 | * |
| 12 | * Rewritten for Unified ADB by David Huggins-Daines <dhd@debian.org> |
| 13 | * |
| 14 | * 7/13/2000- extensive changes by Andrew McPherson <andrew@macduff.dhs.org> |
| 15 | * Works about 30% of the time now. |
| 16 | */ |
| 17 | |
| 18 | #include <linux/types.h> |
| 19 | #include <linux/errno.h> |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/sched.h> |
| 22 | #include <linux/adb.h> |
| 23 | #include <linux/cuda.h> |
| 24 | #include <linux/delay.h> |
| 25 | #include <linux/interrupt.h> |
| 26 | #include <asm/macintosh.h> |
| 27 | #include <asm/macints.h> |
| 28 | #include <asm/machw.h> |
| 29 | #include <asm/mac_via.h> |
| 30 | |
| 31 | static volatile unsigned char *via; |
| 32 | |
| 33 | /* VIA registers - spaced 0x200 bytes apart - only the ones we actually use */ |
| 34 | #define RS 0x200 /* skip between registers */ |
| 35 | #define B 0 /* B-side data */ |
| 36 | #define A RS /* A-side data */ |
| 37 | #define DIRB (2*RS) /* B-side direction (1=output) */ |
| 38 | #define DIRA (3*RS) /* A-side direction (1=output) */ |
| 39 | #define SR (10*RS) /* Shift register */ |
| 40 | #define ACR (11*RS) /* Auxiliary control register */ |
| 41 | #define IFR (13*RS) /* Interrupt flag register */ |
| 42 | #define IER (14*RS) /* Interrupt enable register */ |
| 43 | |
| 44 | /* Bits in B data register: all active low */ |
| 45 | #define TREQ 0x08 /* Transfer request (input) */ |
| 46 | #define TACK 0x10 /* Transfer acknowledge (output) */ |
| 47 | #define TIP 0x20 /* Transfer in progress (output) */ |
| 48 | #define ST_MASK 0x30 /* mask for selecting ADB state bits */ |
| 49 | |
| 50 | /* Bits in ACR */ |
| 51 | #define SR_CTRL 0x1c /* Shift register control bits */ |
| 52 | #define SR_EXT 0x0c /* Shift on external clock */ |
| 53 | #define SR_OUT 0x10 /* Shift out if 1 */ |
| 54 | |
| 55 | /* Bits in IFR and IER */ |
| 56 | #define IER_SET 0x80 /* set bits in IER */ |
| 57 | #define IER_CLR 0 /* clear bits in IER */ |
| 58 | #define SR_INT 0x04 /* Shift register full/empty */ |
| 59 | #define SR_DATA 0x08 /* Shift register data */ |
| 60 | #define SR_CLOCK 0x10 /* Shift register clock */ |
| 61 | |
| 62 | #define ADB_DELAY 150 |
| 63 | |
| 64 | #undef DEBUG_MACIISI_ADB |
| 65 | |
| 66 | static struct adb_request* current_req = NULL; |
| 67 | static struct adb_request* last_req = NULL; |
| 68 | static unsigned char maciisi_rbuf[16]; |
| 69 | static unsigned char *reply_ptr = NULL; |
| 70 | static int data_index; |
| 71 | static int reading_reply; |
| 72 | static int reply_len; |
| 73 | static int tmp; |
| 74 | static int need_sync; |
| 75 | |
| 76 | static enum maciisi_state { |
| 77 | idle, |
| 78 | sending, |
| 79 | reading, |
| 80 | } maciisi_state; |
| 81 | |
| 82 | static int maciisi_probe(void); |
| 83 | static int maciisi_init(void); |
| 84 | static int maciisi_send_request(struct adb_request* req, int sync); |
| 85 | static void maciisi_sync(struct adb_request *req); |
| 86 | static int maciisi_write(struct adb_request* req); |
| 87 | static irqreturn_t maciisi_interrupt(int irq, void* arg, struct pt_regs* regs); |
| 88 | static void maciisi_input(unsigned char *buf, int nb, struct pt_regs *regs); |
| 89 | static int maciisi_init_via(void); |
| 90 | static void maciisi_poll(void); |
| 91 | static int maciisi_start(void); |
| 92 | |
| 93 | struct adb_driver via_maciisi_driver = { |
| 94 | "Mac IIsi", |
| 95 | maciisi_probe, |
| 96 | maciisi_init, |
| 97 | maciisi_send_request, |
| 98 | NULL, /* maciisi_adb_autopoll, */ |
| 99 | maciisi_poll, |
| 100 | NULL /* maciisi_reset_adb_bus */ |
| 101 | }; |
| 102 | |
| 103 | static int |
| 104 | maciisi_probe(void) |
| 105 | { |
| 106 | if (macintosh_config->adb_type != MAC_ADB_IISI) |
| 107 | return -ENODEV; |
| 108 | |
| 109 | via = via1; |
| 110 | return 0; |
| 111 | } |
| 112 | |
| 113 | static int |
| 114 | maciisi_init(void) |
| 115 | { |
| 116 | int err; |
| 117 | |
| 118 | if (via == NULL) |
| 119 | return -ENODEV; |
| 120 | |
| 121 | if ((err = maciisi_init_via())) { |
| 122 | printk(KERN_ERR "maciisi_init: maciisi_init_via() failed, code %d\n", err); |
| 123 | via = NULL; |
| 124 | return err; |
| 125 | } |
| 126 | |
| 127 | if (request_irq(IRQ_MAC_ADB, maciisi_interrupt, IRQ_FLG_LOCK | IRQ_FLG_FAST, |
| 128 | "ADB", maciisi_interrupt)) { |
| 129 | printk(KERN_ERR "maciisi_init: can't get irq %d\n", IRQ_MAC_ADB); |
| 130 | return -EAGAIN; |
| 131 | } |
| 132 | |
| 133 | printk("adb: Mac IIsi driver v0.2 for Unified ADB.\n"); |
| 134 | return 0; |
| 135 | } |
| 136 | |
| 137 | /* Flush data from the ADB controller */ |
| 138 | static void |
| 139 | maciisi_stfu(void) |
| 140 | { |
| 141 | int status = via[B] & (TIP|TREQ); |
| 142 | |
| 143 | if (status & TREQ) { |
| 144 | #ifdef DEBUG_MACIISI_ADB |
| 145 | printk (KERN_DEBUG "maciisi_stfu called with TREQ high!\n"); |
| 146 | #endif |
| 147 | return; |
| 148 | } |
| 149 | |
| 150 | udelay(ADB_DELAY); |
| 151 | via[ACR] &= ~SR_OUT; |
| 152 | via[IER] = IER_CLR | SR_INT; |
| 153 | |
| 154 | udelay(ADB_DELAY); |
| 155 | |
| 156 | status = via[B] & (TIP|TREQ); |
| 157 | |
| 158 | if (!(status & TREQ)) |
| 159 | { |
| 160 | via[B] |= TIP; |
| 161 | |
| 162 | while(1) |
| 163 | { |
| 164 | int poll_timeout = ADB_DELAY * 5; |
| 165 | /* Poll for SR interrupt */ |
| 166 | while (!(via[IFR] & SR_INT) && poll_timeout-- > 0) |
| 167 | status = via[B] & (TIP|TREQ); |
| 168 | |
| 169 | tmp = via[SR]; /* Clear shift register */ |
| 170 | #ifdef DEBUG_MACIISI_ADB |
| 171 | printk(KERN_DEBUG "maciisi_stfu: status %x timeout %d data %x\n", |
| 172 | status, poll_timeout, tmp); |
| 173 | #endif |
| 174 | if(via[B] & TREQ) |
| 175 | break; |
| 176 | |
| 177 | /* ACK on-off */ |
| 178 | via[B] |= TACK; |
| 179 | udelay(ADB_DELAY); |
| 180 | via[B] &= ~TACK; |
| 181 | } |
| 182 | |
| 183 | /* end frame */ |
| 184 | via[B] &= ~TIP; |
| 185 | udelay(ADB_DELAY); |
| 186 | } |
| 187 | |
| 188 | via[IER] = IER_SET | SR_INT; |
| 189 | } |
| 190 | |
| 191 | /* All specifically VIA-related initialization goes here */ |
| 192 | static int |
| 193 | maciisi_init_via(void) |
| 194 | { |
| 195 | int i; |
| 196 | |
| 197 | /* Set the lines up. We want TREQ as input TACK|TIP as output */ |
| 198 | via[DIRB] = (via[DIRB] | TACK | TIP) & ~TREQ; |
| 199 | /* Shift register on input */ |
| 200 | via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT; |
| 201 | #ifdef DEBUG_MACIISI_ADB |
| 202 | printk(KERN_DEBUG "maciisi_init_via: initial status %x\n", via[B] & (TIP|TREQ)); |
| 203 | #endif |
| 204 | /* Wipe any pending data and int */ |
| 205 | tmp = via[SR]; |
| 206 | /* Enable keyboard interrupts */ |
| 207 | via[IER] = IER_SET | SR_INT; |
| 208 | /* Set initial state: idle */ |
| 209 | via[B] &= ~(TACK|TIP); |
| 210 | /* Clear interrupt bit */ |
| 211 | via[IFR] = SR_INT; |
| 212 | |
| 213 | for(i = 0; i < 60; i++) { |
| 214 | udelay(ADB_DELAY); |
| 215 | maciisi_stfu(); |
| 216 | udelay(ADB_DELAY); |
| 217 | if(via[B] & TREQ) |
| 218 | break; |
| 219 | } |
| 220 | if (i == 60) |
| 221 | printk(KERN_ERR "maciisi_init_via: bus jam?\n"); |
| 222 | |
| 223 | maciisi_state = idle; |
| 224 | need_sync = 0; |
| 225 | |
| 226 | return 0; |
| 227 | } |
| 228 | |
| 229 | /* Send a request, possibly waiting for a reply */ |
| 230 | static int |
| 231 | maciisi_send_request(struct adb_request* req, int sync) |
| 232 | { |
| 233 | int i; |
| 234 | |
| 235 | #ifdef DEBUG_MACIISI_ADB |
| 236 | static int dump_packet = 0; |
| 237 | #endif |
| 238 | |
| 239 | if (via == NULL) { |
| 240 | req->complete = 1; |
| 241 | return -ENXIO; |
| 242 | } |
| 243 | |
| 244 | #ifdef DEBUG_MACIISI_ADB |
| 245 | if (dump_packet) { |
| 246 | printk(KERN_DEBUG "maciisi_send_request:"); |
| 247 | for (i = 0; i < req->nbytes; i++) { |
| 248 | printk(" %.2x", req->data[i]); |
| 249 | } |
| 250 | printk(" sync %d\n", sync); |
| 251 | } |
| 252 | #endif |
| 253 | |
| 254 | req->reply_expected = 1; |
| 255 | |
| 256 | i = maciisi_write(req); |
| 257 | if (i) |
| 258 | { |
| 259 | /* Normally, if a packet requires syncing, that happens at the end of |
| 260 | * maciisi_send_request. But if the transfer fails, it will be restarted |
| 261 | * by maciisi_interrupt(). We use need_sync to tell maciisi_interrupt |
| 262 | * when to sync a packet that it sends out. |
| 263 | * |
| 264 | * Suggestions on a better way to do this are welcome. |
| 265 | */ |
| 266 | if(i == -EBUSY && sync) |
| 267 | need_sync = 1; |
| 268 | else |
| 269 | need_sync = 0; |
| 270 | return i; |
| 271 | } |
| 272 | if(sync) |
| 273 | maciisi_sync(req); |
| 274 | |
| 275 | return 0; |
| 276 | } |
| 277 | |
| 278 | /* Poll the ADB chip until the request completes */ |
| 279 | static void maciisi_sync(struct adb_request *req) |
| 280 | { |
| 281 | int count = 0; |
| 282 | |
| 283 | #ifdef DEBUG_MACIISI_ADB |
| 284 | printk(KERN_DEBUG "maciisi_sync called\n"); |
| 285 | #endif |
| 286 | |
| 287 | /* If for some reason the ADB chip shuts up on us, we want to avoid an endless loop. */ |
| 288 | while (!req->complete && count++ < 50) { |
| 289 | maciisi_poll(); |
| 290 | } |
| 291 | /* This could be BAD... when the ADB controller doesn't respond |
| 292 | * for this long, it's probably not coming back :-( */ |
| 293 | if(count >= 50) /* Hopefully shouldn't happen */ |
| 294 | printk(KERN_ERR "maciisi_send_request: poll timed out!\n"); |
| 295 | } |
| 296 | |
Al Viro | 3272244 | 2006-01-12 01:06:13 -0800 | [diff] [blame] | 297 | int |
| 298 | maciisi_request(struct adb_request *req, void (*done)(struct adb_request *), |
| 299 | int nbytes, ...) |
| 300 | { |
| 301 | va_list list; |
| 302 | int i; |
| 303 | |
| 304 | req->nbytes = nbytes; |
| 305 | req->done = done; |
| 306 | req->reply_expected = 0; |
| 307 | va_start(list, nbytes); |
| 308 | for (i = 0; i < nbytes; i++) |
| 309 | req->data[i++] = va_arg(list, int); |
| 310 | va_end(list); |
| 311 | |
| 312 | return maciisi_send_request(req, 1); |
| 313 | } |
| 314 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 315 | /* Enqueue a request, and run the queue if possible */ |
| 316 | static int |
| 317 | maciisi_write(struct adb_request* req) |
| 318 | { |
| 319 | unsigned long flags; |
| 320 | int i; |
| 321 | |
| 322 | /* We will accept CUDA packets - the VIA sends them to us, so |
| 323 | it figures that we should be able to send them to it */ |
| 324 | if (req->nbytes < 2 || req->data[0] > CUDA_PACKET) { |
| 325 | printk(KERN_ERR "maciisi_write: packet too small or not an ADB or CUDA packet\n"); |
| 326 | req->complete = 1; |
| 327 | return -EINVAL; |
| 328 | } |
Al Viro | a5d361f | 2006-01-12 01:06:34 -0800 | [diff] [blame] | 329 | req->next = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 330 | req->sent = 0; |
| 331 | req->complete = 0; |
| 332 | req->reply_len = 0; |
| 333 | |
| 334 | local_irq_save(flags); |
| 335 | |
| 336 | if (current_req) { |
| 337 | last_req->next = req; |
| 338 | last_req = req; |
| 339 | } else { |
| 340 | current_req = req; |
| 341 | last_req = req; |
| 342 | } |
| 343 | if (maciisi_state == idle) |
| 344 | { |
| 345 | i = maciisi_start(); |
| 346 | if(i != 0) |
| 347 | { |
| 348 | local_irq_restore(flags); |
| 349 | return i; |
| 350 | } |
| 351 | } |
| 352 | else |
| 353 | { |
| 354 | #ifdef DEBUG_MACIISI_ADB |
| 355 | printk(KERN_DEBUG "maciisi_write: would start, but state is %d\n", maciisi_state); |
| 356 | #endif |
| 357 | local_irq_restore(flags); |
| 358 | return -EBUSY; |
| 359 | } |
| 360 | |
| 361 | local_irq_restore(flags); |
| 362 | |
| 363 | return 0; |
| 364 | } |
| 365 | |
| 366 | static int |
| 367 | maciisi_start(void) |
| 368 | { |
| 369 | struct adb_request* req; |
| 370 | int status; |
| 371 | |
| 372 | #ifdef DEBUG_MACIISI_ADB |
| 373 | status = via[B] & (TIP | TREQ); |
| 374 | |
| 375 | printk(KERN_DEBUG "maciisi_start called, state=%d, status=%x, ifr=%x\n", maciisi_state, status, via[IFR]); |
| 376 | #endif |
| 377 | |
| 378 | if (maciisi_state != idle) { |
| 379 | /* shouldn't happen */ |
| 380 | printk(KERN_ERR "maciisi_start: maciisi_start called when driver busy!\n"); |
| 381 | return -EBUSY; |
| 382 | } |
| 383 | |
| 384 | req = current_req; |
| 385 | if (req == NULL) |
| 386 | return -EINVAL; |
| 387 | |
| 388 | status = via[B] & (TIP|TREQ); |
| 389 | if (!(status & TREQ)) { |
| 390 | #ifdef DEBUG_MACIISI_ADB |
| 391 | printk(KERN_DEBUG "maciisi_start: bus busy - aborting\n"); |
| 392 | #endif |
| 393 | return -EBUSY; |
| 394 | } |
| 395 | |
| 396 | /* Okay, send */ |
| 397 | #ifdef DEBUG_MACIISI_ADB |
| 398 | printk(KERN_DEBUG "maciisi_start: sending\n"); |
| 399 | #endif |
| 400 | /* Set state to active */ |
| 401 | via[B] |= TIP; |
| 402 | /* ACK off */ |
| 403 | via[B] &= ~TACK; |
| 404 | /* Delay */ |
| 405 | udelay(ADB_DELAY); |
| 406 | /* Shift out and send */ |
| 407 | via[ACR] |= SR_OUT; |
| 408 | via[SR] = req->data[0]; |
| 409 | data_index = 1; |
| 410 | /* ACK on */ |
| 411 | via[B] |= TACK; |
| 412 | maciisi_state = sending; |
| 413 | |
| 414 | return 0; |
| 415 | } |
| 416 | |
| 417 | void |
| 418 | maciisi_poll(void) |
| 419 | { |
| 420 | unsigned long flags; |
| 421 | |
| 422 | local_irq_save(flags); |
| 423 | if (via[IFR] & SR_INT) { |
Al Viro | a5d361f | 2006-01-12 01:06:34 -0800 | [diff] [blame] | 424 | maciisi_interrupt(0, NULL, NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 425 | } |
| 426 | else /* avoid calling this function too quickly in a loop */ |
| 427 | udelay(ADB_DELAY); |
| 428 | |
| 429 | local_irq_restore(flags); |
| 430 | } |
| 431 | |
| 432 | /* Shift register interrupt - this is *supposed* to mean that the |
| 433 | register is either full or empty. In practice, I have no idea what |
| 434 | it means :( */ |
| 435 | static irqreturn_t |
| 436 | maciisi_interrupt(int irq, void* arg, struct pt_regs* regs) |
| 437 | { |
| 438 | int status; |
| 439 | struct adb_request *req; |
| 440 | #ifdef DEBUG_MACIISI_ADB |
| 441 | static int dump_reply = 0; |
| 442 | #endif |
| 443 | int i; |
| 444 | unsigned long flags; |
| 445 | |
| 446 | local_irq_save(flags); |
| 447 | |
| 448 | status = via[B] & (TIP|TREQ); |
| 449 | #ifdef DEBUG_MACIISI_ADB |
| 450 | printk(KERN_DEBUG "state %d status %x ifr %x\n", maciisi_state, status, via[IFR]); |
| 451 | #endif |
| 452 | |
| 453 | if (!(via[IFR] & SR_INT)) { |
| 454 | /* Shouldn't happen, we hope */ |
| 455 | printk(KERN_ERR "maciisi_interrupt: called without interrupt flag set\n"); |
| 456 | local_irq_restore(flags); |
| 457 | return IRQ_NONE; |
| 458 | } |
| 459 | |
| 460 | /* Clear the interrupt */ |
| 461 | /* via[IFR] = SR_INT; */ |
| 462 | |
| 463 | switch_start: |
| 464 | switch (maciisi_state) { |
| 465 | case idle: |
| 466 | if (status & TIP) |
| 467 | printk(KERN_ERR "maciisi_interrupt: state is idle but TIP asserted!\n"); |
| 468 | |
| 469 | if(!reading_reply) |
| 470 | udelay(ADB_DELAY); |
| 471 | /* Shift in */ |
| 472 | via[ACR] &= ~SR_OUT; |
| 473 | /* Signal start of frame */ |
| 474 | via[B] |= TIP; |
| 475 | /* Clear the interrupt (throw this value on the floor, it's useless) */ |
| 476 | tmp = via[SR]; |
| 477 | /* ACK adb chip, high-low */ |
| 478 | via[B] |= TACK; |
| 479 | udelay(ADB_DELAY); |
| 480 | via[B] &= ~TACK; |
| 481 | reply_len = 0; |
| 482 | maciisi_state = reading; |
| 483 | if (reading_reply) { |
| 484 | reply_ptr = current_req->reply; |
| 485 | } else { |
| 486 | reply_ptr = maciisi_rbuf; |
| 487 | } |
| 488 | break; |
| 489 | |
| 490 | case sending: |
| 491 | /* via[SR]; */ |
| 492 | /* Set ACK off */ |
| 493 | via[B] &= ~TACK; |
| 494 | req = current_req; |
| 495 | |
| 496 | if (!(status & TREQ)) { |
| 497 | /* collision */ |
| 498 | printk(KERN_ERR "maciisi_interrupt: send collision\n"); |
| 499 | /* Set idle and input */ |
| 500 | via[ACR] &= ~SR_OUT; |
| 501 | tmp = via[SR]; |
| 502 | via[B] &= ~TIP; |
| 503 | /* Must re-send */ |
| 504 | reading_reply = 0; |
| 505 | reply_len = 0; |
| 506 | maciisi_state = idle; |
| 507 | udelay(ADB_DELAY); |
| 508 | /* process this now, because the IFR has been cleared */ |
| 509 | goto switch_start; |
| 510 | } |
| 511 | |
| 512 | udelay(ADB_DELAY); |
| 513 | |
| 514 | if (data_index >= req->nbytes) { |
| 515 | /* Sent the whole packet, put the bus back in idle state */ |
| 516 | /* Shift in, we are about to read a reply (hopefully) */ |
| 517 | via[ACR] &= ~SR_OUT; |
| 518 | tmp = via[SR]; |
| 519 | /* End of frame */ |
| 520 | via[B] &= ~TIP; |
| 521 | req->sent = 1; |
| 522 | maciisi_state = idle; |
| 523 | if (req->reply_expected) { |
| 524 | /* Note: only set this once we've |
| 525 | successfully sent the packet */ |
| 526 | reading_reply = 1; |
| 527 | } else { |
| 528 | current_req = req->next; |
| 529 | if (req->done) |
| 530 | (*req->done)(req); |
| 531 | /* Do any queued requests now */ |
| 532 | i = maciisi_start(); |
| 533 | if(i == 0 && need_sync) { |
| 534 | /* Packet needs to be synced */ |
| 535 | maciisi_sync(current_req); |
| 536 | } |
| 537 | if(i != -EBUSY) |
| 538 | need_sync = 0; |
| 539 | } |
| 540 | } else { |
| 541 | /* Sending more stuff */ |
| 542 | /* Shift out */ |
| 543 | via[ACR] |= SR_OUT; |
| 544 | /* Write */ |
| 545 | via[SR] = req->data[data_index++]; |
| 546 | /* Signal 'byte ready' */ |
| 547 | via[B] |= TACK; |
| 548 | } |
| 549 | break; |
| 550 | |
| 551 | case reading: |
| 552 | /* Shift in */ |
| 553 | /* via[ACR] &= ~SR_OUT; */ /* Not in 2.2 */ |
| 554 | if (reply_len++ > 16) { |
| 555 | printk(KERN_ERR "maciisi_interrupt: reply too long, aborting read\n"); |
| 556 | via[B] |= TACK; |
| 557 | udelay(ADB_DELAY); |
| 558 | via[B] &= ~(TACK|TIP); |
| 559 | maciisi_state = idle; |
| 560 | i = maciisi_start(); |
| 561 | if(i == 0 && need_sync) { |
| 562 | /* Packet needs to be synced */ |
| 563 | maciisi_sync(current_req); |
| 564 | } |
| 565 | if(i != -EBUSY) |
| 566 | need_sync = 0; |
| 567 | break; |
| 568 | } |
| 569 | /* Read data */ |
| 570 | *reply_ptr++ = via[SR]; |
| 571 | status = via[B] & (TIP|TREQ); |
| 572 | /* ACK on/off */ |
| 573 | via[B] |= TACK; |
| 574 | udelay(ADB_DELAY); |
| 575 | via[B] &= ~TACK; |
| 576 | if (!(status & TREQ)) |
| 577 | break; /* more stuff to deal with */ |
| 578 | |
| 579 | /* end of frame */ |
| 580 | via[B] &= ~TIP; |
| 581 | tmp = via[SR]; /* That's what happens in 2.2 */ |
| 582 | udelay(ADB_DELAY); /* Give controller time to recover */ |
| 583 | |
| 584 | /* end of packet, deal with it */ |
| 585 | if (reading_reply) { |
| 586 | req = current_req; |
| 587 | req->reply_len = reply_ptr - req->reply; |
| 588 | if (req->data[0] == ADB_PACKET) { |
| 589 | /* Have to adjust the reply from ADB commands */ |
| 590 | if (req->reply_len <= 2 || (req->reply[1] & 2) != 0) { |
| 591 | /* the 0x2 bit indicates no response */ |
| 592 | req->reply_len = 0; |
| 593 | } else { |
| 594 | /* leave just the command and result bytes in the reply */ |
| 595 | req->reply_len -= 2; |
| 596 | memmove(req->reply, req->reply + 2, req->reply_len); |
| 597 | } |
| 598 | } |
| 599 | #ifdef DEBUG_MACIISI_ADB |
| 600 | if (dump_reply) { |
| 601 | int i; |
| 602 | printk(KERN_DEBUG "maciisi_interrupt: reply is "); |
| 603 | for (i = 0; i < req->reply_len; ++i) |
| 604 | printk(" %.2x", req->reply[i]); |
| 605 | printk("\n"); |
| 606 | } |
| 607 | #endif |
| 608 | req->complete = 1; |
| 609 | current_req = req->next; |
| 610 | if (req->done) |
| 611 | (*req->done)(req); |
| 612 | /* Obviously, we got it */ |
| 613 | reading_reply = 0; |
| 614 | } else { |
| 615 | maciisi_input(maciisi_rbuf, reply_ptr - maciisi_rbuf, regs); |
| 616 | } |
| 617 | maciisi_state = idle; |
| 618 | status = via[B] & (TIP|TREQ); |
| 619 | if (!(status & TREQ)) { |
| 620 | /* Timeout?! More likely, another packet coming in already */ |
| 621 | #ifdef DEBUG_MACIISI_ADB |
| 622 | printk(KERN_DEBUG "extra data after packet: status %x ifr %x\n", |
| 623 | status, via[IFR]); |
| 624 | #endif |
| 625 | #if 0 |
| 626 | udelay(ADB_DELAY); |
| 627 | via[B] |= TIP; |
| 628 | |
| 629 | maciisi_state = reading; |
| 630 | reading_reply = 0; |
| 631 | reply_ptr = maciisi_rbuf; |
| 632 | #else |
| 633 | /* Process the packet now */ |
| 634 | reading_reply = 0; |
| 635 | goto switch_start; |
| 636 | #endif |
| 637 | /* We used to do this... but the controller might actually have data for us */ |
| 638 | /* maciisi_stfu(); */ |
| 639 | } |
| 640 | else { |
| 641 | /* Do any queued requests now if possible */ |
| 642 | i = maciisi_start(); |
| 643 | if(i == 0 && need_sync) { |
| 644 | /* Packet needs to be synced */ |
| 645 | maciisi_sync(current_req); |
| 646 | } |
| 647 | if(i != -EBUSY) |
| 648 | need_sync = 0; |
| 649 | } |
| 650 | break; |
| 651 | |
| 652 | default: |
| 653 | printk("maciisi_interrupt: unknown maciisi_state %d?\n", maciisi_state); |
| 654 | } |
| 655 | local_irq_restore(flags); |
| 656 | return IRQ_HANDLED; |
| 657 | } |
| 658 | |
| 659 | static void |
| 660 | maciisi_input(unsigned char *buf, int nb, struct pt_regs *regs) |
| 661 | { |
| 662 | #ifdef DEBUG_MACIISI_ADB |
| 663 | int i; |
| 664 | #endif |
| 665 | |
| 666 | switch (buf[0]) { |
| 667 | case ADB_PACKET: |
| 668 | adb_input(buf+2, nb-2, regs, buf[1] & 0x40); |
| 669 | break; |
| 670 | default: |
| 671 | #ifdef DEBUG_MACIISI_ADB |
| 672 | printk(KERN_DEBUG "data from IIsi ADB (%d bytes):", nb); |
| 673 | for (i = 0; i < nb; ++i) |
| 674 | printk(" %.2x", buf[i]); |
| 675 | printk("\n"); |
| 676 | #endif |
| 677 | break; |
| 678 | } |
| 679 | } |