Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 1 | #if !defined(_I915_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) |
| 2 | #define _I915_TRACE_H_ |
| 3 | |
| 4 | #include <linux/stringify.h> |
| 5 | #include <linux/types.h> |
| 6 | #include <linux/tracepoint.h> |
| 7 | |
| 8 | #include <drm/drmP.h> |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 9 | #include "i915_drv.h" |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 10 | #include "intel_drv.h" |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 11 | #include "intel_ringbuffer.h" |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 12 | |
| 13 | #undef TRACE_SYSTEM |
| 14 | #define TRACE_SYSTEM i915 |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 15 | #define TRACE_INCLUDE_FILE i915_trace |
| 16 | |
Ville Syrjälä | c137d66 | 2017-03-02 19:15:06 +0200 | [diff] [blame] | 17 | /* watermark/fifo updates */ |
| 18 | |
Ville Syrjälä | 53a7915 | 2017-03-02 19:15:08 +0200 | [diff] [blame] | 19 | TRACE_EVENT(intel_cpu_fifo_underrun, |
| 20 | TP_PROTO(struct drm_i915_private *dev_priv, enum pipe pipe), |
| 21 | TP_ARGS(dev_priv, pipe), |
| 22 | |
| 23 | TP_STRUCT__entry( |
| 24 | __field(enum pipe, pipe) |
| 25 | __field(u32, frame) |
| 26 | __field(u32, scanline) |
| 27 | ), |
| 28 | |
| 29 | TP_fast_assign( |
| 30 | __entry->pipe = pipe; |
| 31 | __entry->frame = dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, pipe); |
| 32 | __entry->scanline = intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, pipe)); |
| 33 | ), |
| 34 | |
| 35 | TP_printk("pipe %c, frame=%u, scanline=%u", |
| 36 | pipe_name(__entry->pipe), |
| 37 | __entry->frame, __entry->scanline) |
| 38 | ); |
| 39 | |
| 40 | TRACE_EVENT(intel_pch_fifo_underrun, |
Ville Syrjälä | 41c32e5d | 2017-09-01 17:31:23 +0300 | [diff] [blame] | 41 | TP_PROTO(struct drm_i915_private *dev_priv, enum pipe pch_transcoder), |
Ville Syrjälä | 53a7915 | 2017-03-02 19:15:08 +0200 | [diff] [blame] | 42 | TP_ARGS(dev_priv, pch_transcoder), |
| 43 | |
| 44 | TP_STRUCT__entry( |
| 45 | __field(enum pipe, pipe) |
| 46 | __field(u32, frame) |
| 47 | __field(u32, scanline) |
| 48 | ), |
| 49 | |
| 50 | TP_fast_assign( |
Ville Syrjälä | 41c32e5d | 2017-09-01 17:31:23 +0300 | [diff] [blame] | 51 | enum pipe pipe = pch_transcoder; |
Ville Syrjälä | 53a7915 | 2017-03-02 19:15:08 +0200 | [diff] [blame] | 52 | __entry->pipe = pipe; |
| 53 | __entry->frame = dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, pipe); |
| 54 | __entry->scanline = intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, pipe)); |
| 55 | ), |
| 56 | |
| 57 | TP_printk("pch transcoder %c, frame=%u, scanline=%u", |
| 58 | pipe_name(__entry->pipe), |
| 59 | __entry->frame, __entry->scanline) |
| 60 | ); |
| 61 | |
Ville Syrjälä | 1489bba | 2017-03-02 19:15:07 +0200 | [diff] [blame] | 62 | TRACE_EVENT(intel_memory_cxsr, |
| 63 | TP_PROTO(struct drm_i915_private *dev_priv, bool old, bool new), |
| 64 | TP_ARGS(dev_priv, old, new), |
| 65 | |
| 66 | TP_STRUCT__entry( |
| 67 | __array(u32, frame, 3) |
| 68 | __array(u32, scanline, 3) |
| 69 | __field(bool, old) |
| 70 | __field(bool, new) |
| 71 | ), |
| 72 | |
| 73 | TP_fast_assign( |
| 74 | enum pipe pipe; |
| 75 | for_each_pipe(dev_priv, pipe) { |
| 76 | __entry->frame[pipe] = |
| 77 | dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, pipe); |
| 78 | __entry->scanline[pipe] = |
| 79 | intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, pipe)); |
| 80 | } |
| 81 | __entry->old = old; |
| 82 | __entry->new = new; |
| 83 | ), |
| 84 | |
| 85 | TP_printk("%s->%s, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, scanline=%u, pipe C: frame=%u, scanline=%u", |
| 86 | onoff(__entry->old), onoff(__entry->new), |
| 87 | __entry->frame[PIPE_A], __entry->scanline[PIPE_A], |
| 88 | __entry->frame[PIPE_B], __entry->scanline[PIPE_B], |
| 89 | __entry->frame[PIPE_C], __entry->scanline[PIPE_C]) |
| 90 | ); |
| 91 | |
Ville Syrjälä | e93329a | 2017-04-21 21:14:31 +0300 | [diff] [blame] | 92 | TRACE_EVENT(g4x_wm, |
| 93 | TP_PROTO(struct intel_crtc *crtc, const struct g4x_wm_values *wm), |
| 94 | TP_ARGS(crtc, wm), |
| 95 | |
| 96 | TP_STRUCT__entry( |
| 97 | __field(enum pipe, pipe) |
| 98 | __field(u32, frame) |
| 99 | __field(u32, scanline) |
| 100 | __field(u16, primary) |
| 101 | __field(u16, sprite) |
| 102 | __field(u16, cursor) |
| 103 | __field(u16, sr_plane) |
| 104 | __field(u16, sr_cursor) |
| 105 | __field(u16, sr_fbc) |
| 106 | __field(u16, hpll_plane) |
| 107 | __field(u16, hpll_cursor) |
| 108 | __field(u16, hpll_fbc) |
| 109 | __field(bool, cxsr) |
| 110 | __field(bool, hpll) |
| 111 | __field(bool, fbc) |
| 112 | ), |
| 113 | |
| 114 | TP_fast_assign( |
| 115 | __entry->pipe = crtc->pipe; |
| 116 | __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev, |
| 117 | crtc->pipe); |
| 118 | __entry->scanline = intel_get_crtc_scanline(crtc); |
| 119 | __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY]; |
| 120 | __entry->sprite = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0]; |
| 121 | __entry->cursor = wm->pipe[crtc->pipe].plane[PLANE_CURSOR]; |
| 122 | __entry->sr_plane = wm->sr.plane; |
| 123 | __entry->sr_cursor = wm->sr.cursor; |
| 124 | __entry->sr_fbc = wm->sr.fbc; |
| 125 | __entry->hpll_plane = wm->hpll.plane; |
| 126 | __entry->hpll_cursor = wm->hpll.cursor; |
| 127 | __entry->hpll_fbc = wm->hpll.fbc; |
| 128 | __entry->cxsr = wm->cxsr; |
| 129 | __entry->hpll = wm->hpll_en; |
| 130 | __entry->fbc = wm->fbc_en; |
| 131 | ), |
| 132 | |
| 133 | TP_printk("pipe %c, frame=%u, scanline=%u, wm %d/%d/%d, sr %s/%d/%d/%d, hpll %s/%d/%d/%d, fbc %s", |
| 134 | pipe_name(__entry->pipe), __entry->frame, __entry->scanline, |
| 135 | __entry->primary, __entry->sprite, __entry->cursor, |
| 136 | yesno(__entry->cxsr), __entry->sr_plane, __entry->sr_cursor, __entry->sr_fbc, |
| 137 | yesno(__entry->hpll), __entry->hpll_plane, __entry->hpll_cursor, __entry->hpll_fbc, |
| 138 | yesno(__entry->fbc)) |
| 139 | ); |
| 140 | |
Ville Syrjälä | c137d66 | 2017-03-02 19:15:06 +0200 | [diff] [blame] | 141 | TRACE_EVENT(vlv_wm, |
| 142 | TP_PROTO(struct intel_crtc *crtc, const struct vlv_wm_values *wm), |
| 143 | TP_ARGS(crtc, wm), |
| 144 | |
| 145 | TP_STRUCT__entry( |
| 146 | __field(enum pipe, pipe) |
| 147 | __field(u32, frame) |
| 148 | __field(u32, scanline) |
| 149 | __field(u32, level) |
| 150 | __field(u32, cxsr) |
| 151 | __field(u32, primary) |
| 152 | __field(u32, sprite0) |
| 153 | __field(u32, sprite1) |
| 154 | __field(u32, cursor) |
| 155 | __field(u32, sr_plane) |
| 156 | __field(u32, sr_cursor) |
| 157 | ), |
| 158 | |
| 159 | TP_fast_assign( |
| 160 | __entry->pipe = crtc->pipe; |
| 161 | __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev, |
| 162 | crtc->pipe); |
| 163 | __entry->scanline = intel_get_crtc_scanline(crtc); |
| 164 | __entry->level = wm->level; |
| 165 | __entry->cxsr = wm->cxsr; |
| 166 | __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY]; |
| 167 | __entry->sprite0 = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0]; |
| 168 | __entry->sprite1 = wm->pipe[crtc->pipe].plane[PLANE_SPRITE1]; |
| 169 | __entry->cursor = wm->pipe[crtc->pipe].plane[PLANE_CURSOR]; |
| 170 | __entry->sr_plane = wm->sr.plane; |
| 171 | __entry->sr_cursor = wm->sr.cursor; |
| 172 | ), |
| 173 | |
| 174 | TP_printk("pipe %c, frame=%u, scanline=%u, level=%d, cxsr=%d, wm %d/%d/%d/%d, sr %d/%d", |
| 175 | pipe_name(__entry->pipe), __entry->frame, |
| 176 | __entry->scanline, __entry->level, __entry->cxsr, |
| 177 | __entry->primary, __entry->sprite0, __entry->sprite1, __entry->cursor, |
| 178 | __entry->sr_plane, __entry->sr_cursor) |
| 179 | ); |
| 180 | |
| 181 | TRACE_EVENT(vlv_fifo_size, |
| 182 | TP_PROTO(struct intel_crtc *crtc, u32 sprite0_start, u32 sprite1_start, u32 fifo_size), |
| 183 | TP_ARGS(crtc, sprite0_start, sprite1_start, fifo_size), |
| 184 | |
| 185 | TP_STRUCT__entry( |
| 186 | __field(enum pipe, pipe) |
| 187 | __field(u32, frame) |
| 188 | __field(u32, scanline) |
| 189 | __field(u32, sprite0_start) |
| 190 | __field(u32, sprite1_start) |
| 191 | __field(u32, fifo_size) |
| 192 | ), |
| 193 | |
| 194 | TP_fast_assign( |
| 195 | __entry->pipe = crtc->pipe; |
| 196 | __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev, |
| 197 | crtc->pipe); |
| 198 | __entry->scanline = intel_get_crtc_scanline(crtc); |
| 199 | __entry->sprite0_start = sprite0_start; |
| 200 | __entry->sprite1_start = sprite1_start; |
| 201 | __entry->fifo_size = fifo_size; |
| 202 | ), |
| 203 | |
| 204 | TP_printk("pipe %c, frame=%u, scanline=%u, %d/%d/%d", |
| 205 | pipe_name(__entry->pipe), __entry->frame, |
| 206 | __entry->scanline, __entry->sprite0_start, |
| 207 | __entry->sprite1_start, __entry->fifo_size) |
| 208 | ); |
| 209 | |
Ville Syrjälä | 7225953 | 2017-03-02 19:15:05 +0200 | [diff] [blame] | 210 | /* plane updates */ |
| 211 | |
| 212 | TRACE_EVENT(intel_update_plane, |
| 213 | TP_PROTO(struct drm_plane *plane, struct intel_crtc *crtc), |
| 214 | TP_ARGS(plane, crtc), |
| 215 | |
| 216 | TP_STRUCT__entry( |
| 217 | __field(enum pipe, pipe) |
| 218 | __field(const char *, name) |
| 219 | __field(u32, frame) |
| 220 | __field(u32, scanline) |
| 221 | __array(int, src, 4) |
| 222 | __array(int, dst, 4) |
| 223 | ), |
| 224 | |
| 225 | TP_fast_assign( |
| 226 | __entry->pipe = crtc->pipe; |
| 227 | __entry->name = plane->name; |
| 228 | __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev, |
| 229 | crtc->pipe); |
| 230 | __entry->scanline = intel_get_crtc_scanline(crtc); |
| 231 | memcpy(__entry->src, &plane->state->src, sizeof(__entry->src)); |
| 232 | memcpy(__entry->dst, &plane->state->dst, sizeof(__entry->dst)); |
| 233 | ), |
| 234 | |
| 235 | TP_printk("pipe %c, plane %s, frame=%u, scanline=%u, " DRM_RECT_FP_FMT " -> " DRM_RECT_FMT, |
| 236 | pipe_name(__entry->pipe), __entry->name, |
| 237 | __entry->frame, __entry->scanline, |
| 238 | DRM_RECT_FP_ARG((const struct drm_rect *)__entry->src), |
| 239 | DRM_RECT_ARG((const struct drm_rect *)__entry->dst)) |
| 240 | ); |
| 241 | |
| 242 | TRACE_EVENT(intel_disable_plane, |
| 243 | TP_PROTO(struct drm_plane *plane, struct intel_crtc *crtc), |
| 244 | TP_ARGS(plane, crtc), |
| 245 | |
| 246 | TP_STRUCT__entry( |
| 247 | __field(enum pipe, pipe) |
| 248 | __field(const char *, name) |
| 249 | __field(u32, frame) |
| 250 | __field(u32, scanline) |
| 251 | ), |
| 252 | |
| 253 | TP_fast_assign( |
| 254 | __entry->pipe = crtc->pipe; |
| 255 | __entry->name = plane->name; |
| 256 | __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev, |
| 257 | crtc->pipe); |
| 258 | __entry->scanline = intel_get_crtc_scanline(crtc); |
| 259 | ), |
| 260 | |
| 261 | TP_printk("pipe %c, plane %s, frame=%u, scanline=%u", |
| 262 | pipe_name(__entry->pipe), __entry->name, |
| 263 | __entry->frame, __entry->scanline) |
| 264 | ); |
| 265 | |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 266 | /* pipe updates */ |
| 267 | |
| 268 | TRACE_EVENT(i915_pipe_update_start, |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 269 | TP_PROTO(struct intel_crtc *crtc), |
| 270 | TP_ARGS(crtc), |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 271 | |
| 272 | TP_STRUCT__entry( |
| 273 | __field(enum pipe, pipe) |
| 274 | __field(u32, frame) |
| 275 | __field(u32, scanline) |
| 276 | __field(u32, min) |
| 277 | __field(u32, max) |
| 278 | ), |
| 279 | |
| 280 | TP_fast_assign( |
| 281 | __entry->pipe = crtc->pipe; |
| 282 | __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev, |
| 283 | crtc->pipe); |
| 284 | __entry->scanline = intel_get_crtc_scanline(crtc); |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 285 | __entry->min = crtc->debug.min_vbl; |
| 286 | __entry->max = crtc->debug.max_vbl; |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 287 | ), |
| 288 | |
| 289 | TP_printk("pipe %c, frame=%u, scanline=%u, min=%u, max=%u", |
| 290 | pipe_name(__entry->pipe), __entry->frame, |
| 291 | __entry->scanline, __entry->min, __entry->max) |
| 292 | ); |
| 293 | |
| 294 | TRACE_EVENT(i915_pipe_update_vblank_evaded, |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 295 | TP_PROTO(struct intel_crtc *crtc), |
| 296 | TP_ARGS(crtc), |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 297 | |
| 298 | TP_STRUCT__entry( |
| 299 | __field(enum pipe, pipe) |
| 300 | __field(u32, frame) |
| 301 | __field(u32, scanline) |
| 302 | __field(u32, min) |
| 303 | __field(u32, max) |
| 304 | ), |
| 305 | |
| 306 | TP_fast_assign( |
| 307 | __entry->pipe = crtc->pipe; |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 308 | __entry->frame = crtc->debug.start_vbl_count; |
| 309 | __entry->scanline = crtc->debug.scanline_start; |
| 310 | __entry->min = crtc->debug.min_vbl; |
| 311 | __entry->max = crtc->debug.max_vbl; |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 312 | ), |
| 313 | |
| 314 | TP_printk("pipe %c, frame=%u, scanline=%u, min=%u, max=%u", |
| 315 | pipe_name(__entry->pipe), __entry->frame, |
| 316 | __entry->scanline, __entry->min, __entry->max) |
| 317 | ); |
| 318 | |
| 319 | TRACE_EVENT(i915_pipe_update_end, |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 320 | TP_PROTO(struct intel_crtc *crtc, u32 frame, int scanline_end), |
| 321 | TP_ARGS(crtc, frame, scanline_end), |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 322 | |
| 323 | TP_STRUCT__entry( |
| 324 | __field(enum pipe, pipe) |
| 325 | __field(u32, frame) |
| 326 | __field(u32, scanline) |
| 327 | ), |
| 328 | |
| 329 | TP_fast_assign( |
| 330 | __entry->pipe = crtc->pipe; |
| 331 | __entry->frame = frame; |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 332 | __entry->scanline = scanline_end; |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 333 | ), |
| 334 | |
| 335 | TP_printk("pipe %c, frame=%u, scanline=%u", |
| 336 | pipe_name(__entry->pipe), __entry->frame, |
| 337 | __entry->scanline) |
| 338 | ); |
| 339 | |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 340 | /* object tracking */ |
| 341 | |
| 342 | TRACE_EVENT(i915_gem_object_create, |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 343 | TP_PROTO(struct drm_i915_gem_object *obj), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 344 | TP_ARGS(obj), |
| 345 | |
| 346 | TP_STRUCT__entry( |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 347 | __field(struct drm_i915_gem_object *, obj) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 348 | __field(u32, size) |
| 349 | ), |
| 350 | |
| 351 | TP_fast_assign( |
| 352 | __entry->obj = obj; |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 353 | __entry->size = obj->base.size; |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 354 | ), |
| 355 | |
| 356 | TP_printk("obj=%p, size=%u", __entry->obj, __entry->size) |
| 357 | ); |
| 358 | |
Chris Wilson | 3abafa5 | 2015-10-01 12:18:26 +0100 | [diff] [blame] | 359 | TRACE_EVENT(i915_gem_shrink, |
| 360 | TP_PROTO(struct drm_i915_private *i915, unsigned long target, unsigned flags), |
| 361 | TP_ARGS(i915, target, flags), |
| 362 | |
| 363 | TP_STRUCT__entry( |
| 364 | __field(int, dev) |
| 365 | __field(unsigned long, target) |
| 366 | __field(unsigned, flags) |
| 367 | ), |
| 368 | |
| 369 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 370 | __entry->dev = i915->drm.primary->index; |
Chris Wilson | 3abafa5 | 2015-10-01 12:18:26 +0100 | [diff] [blame] | 371 | __entry->target = target; |
| 372 | __entry->flags = flags; |
| 373 | ), |
| 374 | |
| 375 | TP_printk("dev=%d, target=%lu, flags=%x", |
| 376 | __entry->dev, __entry->target, __entry->flags) |
| 377 | ); |
| 378 | |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 379 | TRACE_EVENT(i915_vma_bind, |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 380 | TP_PROTO(struct i915_vma *vma, unsigned flags), |
| 381 | TP_ARGS(vma, flags), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 382 | |
| 383 | TP_STRUCT__entry( |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 384 | __field(struct drm_i915_gem_object *, obj) |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 385 | __field(struct i915_address_space *, vm) |
Ben Widawsky | 3393871 | 2015-01-22 17:01:23 +0000 | [diff] [blame] | 386 | __field(u64, offset) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 387 | __field(u32, size) |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 388 | __field(unsigned, flags) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 389 | ), |
| 390 | |
| 391 | TP_fast_assign( |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 392 | __entry->obj = vma->obj; |
| 393 | __entry->vm = vma->vm; |
| 394 | __entry->offset = vma->node.start; |
| 395 | __entry->size = vma->node.size; |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 396 | __entry->flags = flags; |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 397 | ), |
| 398 | |
Ben Widawsky | 3393871 | 2015-01-22 17:01:23 +0000 | [diff] [blame] | 399 | TP_printk("obj=%p, offset=%016llx size=%x%s vm=%p", |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 400 | __entry->obj, __entry->offset, __entry->size, |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 401 | __entry->flags & PIN_MAPPABLE ? ", mappable" : "", |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 402 | __entry->vm) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 403 | ); |
| 404 | |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 405 | TRACE_EVENT(i915_vma_unbind, |
| 406 | TP_PROTO(struct i915_vma *vma), |
| 407 | TP_ARGS(vma), |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 408 | |
| 409 | TP_STRUCT__entry( |
| 410 | __field(struct drm_i915_gem_object *, obj) |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 411 | __field(struct i915_address_space *, vm) |
Ben Widawsky | 3393871 | 2015-01-22 17:01:23 +0000 | [diff] [blame] | 412 | __field(u64, offset) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 413 | __field(u32, size) |
| 414 | ), |
| 415 | |
| 416 | TP_fast_assign( |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 417 | __entry->obj = vma->obj; |
| 418 | __entry->vm = vma->vm; |
| 419 | __entry->offset = vma->node.start; |
| 420 | __entry->size = vma->node.size; |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 421 | ), |
| 422 | |
Ben Widawsky | 3393871 | 2015-01-22 17:01:23 +0000 | [diff] [blame] | 423 | TP_printk("obj=%p, offset=%016llx size=%x vm=%p", |
Ben Widawsky | 07fe0b1 | 2013-07-31 17:00:10 -0700 | [diff] [blame] | 424 | __entry->obj, __entry->offset, __entry->size, __entry->vm) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 425 | ); |
| 426 | |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 427 | TRACE_EVENT(i915_gem_object_pwrite, |
| 428 | TP_PROTO(struct drm_i915_gem_object *obj, u32 offset, u32 len), |
| 429 | TP_ARGS(obj, offset, len), |
| 430 | |
| 431 | TP_STRUCT__entry( |
| 432 | __field(struct drm_i915_gem_object *, obj) |
| 433 | __field(u32, offset) |
| 434 | __field(u32, len) |
| 435 | ), |
| 436 | |
| 437 | TP_fast_assign( |
| 438 | __entry->obj = obj; |
| 439 | __entry->offset = offset; |
| 440 | __entry->len = len; |
| 441 | ), |
| 442 | |
| 443 | TP_printk("obj=%p, offset=%u, len=%u", |
| 444 | __entry->obj, __entry->offset, __entry->len) |
| 445 | ); |
| 446 | |
| 447 | TRACE_EVENT(i915_gem_object_pread, |
| 448 | TP_PROTO(struct drm_i915_gem_object *obj, u32 offset, u32 len), |
| 449 | TP_ARGS(obj, offset, len), |
| 450 | |
| 451 | TP_STRUCT__entry( |
| 452 | __field(struct drm_i915_gem_object *, obj) |
| 453 | __field(u32, offset) |
| 454 | __field(u32, len) |
| 455 | ), |
| 456 | |
| 457 | TP_fast_assign( |
| 458 | __entry->obj = obj; |
| 459 | __entry->offset = offset; |
| 460 | __entry->len = len; |
| 461 | ), |
| 462 | |
| 463 | TP_printk("obj=%p, offset=%u, len=%u", |
| 464 | __entry->obj, __entry->offset, __entry->len) |
| 465 | ); |
| 466 | |
| 467 | TRACE_EVENT(i915_gem_object_fault, |
| 468 | TP_PROTO(struct drm_i915_gem_object *obj, u32 index, bool gtt, bool write), |
| 469 | TP_ARGS(obj, index, gtt, write), |
| 470 | |
| 471 | TP_STRUCT__entry( |
| 472 | __field(struct drm_i915_gem_object *, obj) |
| 473 | __field(u32, index) |
| 474 | __field(bool, gtt) |
| 475 | __field(bool, write) |
| 476 | ), |
| 477 | |
| 478 | TP_fast_assign( |
| 479 | __entry->obj = obj; |
| 480 | __entry->index = index; |
| 481 | __entry->gtt = gtt; |
| 482 | __entry->write = write; |
| 483 | ), |
| 484 | |
| 485 | TP_printk("obj=%p, %s index=%u %s", |
| 486 | __entry->obj, |
| 487 | __entry->gtt ? "GTT" : "CPU", |
| 488 | __entry->index, |
| 489 | __entry->write ? ", writable" : "") |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 490 | ); |
| 491 | |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 492 | DECLARE_EVENT_CLASS(i915_gem_object, |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 493 | TP_PROTO(struct drm_i915_gem_object *obj), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 494 | TP_ARGS(obj), |
| 495 | |
| 496 | TP_STRUCT__entry( |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 497 | __field(struct drm_i915_gem_object *, obj) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 498 | ), |
| 499 | |
| 500 | TP_fast_assign( |
| 501 | __entry->obj = obj; |
| 502 | ), |
| 503 | |
| 504 | TP_printk("obj=%p", __entry->obj) |
| 505 | ); |
| 506 | |
Li Zefan | f41275e | 2010-05-24 16:25:44 +0800 | [diff] [blame] | 507 | DEFINE_EVENT(i915_gem_object, i915_gem_object_clflush, |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 508 | TP_PROTO(struct drm_i915_gem_object *obj), |
| 509 | TP_ARGS(obj) |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 510 | ); |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 511 | |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 512 | DEFINE_EVENT(i915_gem_object, i915_gem_object_destroy, |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 513 | TP_PROTO(struct drm_i915_gem_object *obj), |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 514 | TP_ARGS(obj) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 515 | ); |
| 516 | |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 517 | TRACE_EVENT(i915_gem_evict, |
Chris Wilson | e522ac2 | 2016-08-04 16:32:18 +0100 | [diff] [blame] | 518 | TP_PROTO(struct i915_address_space *vm, u32 size, u32 align, unsigned int flags), |
| 519 | TP_ARGS(vm, size, align, flags), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 520 | |
| 521 | TP_STRUCT__entry( |
Chris Wilson | 4f49be5 | 2009-09-24 00:23:33 +0100 | [diff] [blame] | 522 | __field(u32, dev) |
Chris Wilson | e522ac2 | 2016-08-04 16:32:18 +0100 | [diff] [blame] | 523 | __field(struct i915_address_space *, vm) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 524 | __field(u32, size) |
| 525 | __field(u32, align) |
Chris Wilson | e522ac2 | 2016-08-04 16:32:18 +0100 | [diff] [blame] | 526 | __field(unsigned int, flags) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 527 | ), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 528 | |
| 529 | TP_fast_assign( |
Chris Wilson | c6385c9 | 2016-11-29 12:42:05 +0000 | [diff] [blame] | 530 | __entry->dev = vm->i915->drm.primary->index; |
Chris Wilson | e522ac2 | 2016-08-04 16:32:18 +0100 | [diff] [blame] | 531 | __entry->vm = vm; |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 532 | __entry->size = size; |
| 533 | __entry->align = align; |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 534 | __entry->flags = flags; |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 535 | ), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 536 | |
Chris Wilson | e522ac2 | 2016-08-04 16:32:18 +0100 | [diff] [blame] | 537 | TP_printk("dev=%d, vm=%p, size=%d, align=%d %s", |
| 538 | __entry->dev, __entry->vm, __entry->size, __entry->align, |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 539 | __entry->flags & PIN_MAPPABLE ? ", mappable" : "") |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 540 | ); |
| 541 | |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 542 | TRACE_EVENT(i915_gem_evict_everything, |
Chris Wilson | 6c085a7 | 2012-08-20 11:40:46 +0200 | [diff] [blame] | 543 | TP_PROTO(struct drm_device *dev), |
| 544 | TP_ARGS(dev), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 545 | |
| 546 | TP_STRUCT__entry( |
Chris Wilson | 4f49be5 | 2009-09-24 00:23:33 +0100 | [diff] [blame] | 547 | __field(u32, dev) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 548 | ), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 549 | |
| 550 | TP_fast_assign( |
Chris Wilson | 4f49be5 | 2009-09-24 00:23:33 +0100 | [diff] [blame] | 551 | __entry->dev = dev->primary->index; |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 552 | ), |
| 553 | |
Chris Wilson | 6c085a7 | 2012-08-20 11:40:46 +0200 | [diff] [blame] | 554 | TP_printk("dev=%d", __entry->dev) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 555 | ); |
| 556 | |
Ben Widawsky | bcccff8 | 2013-09-24 09:57:56 -0700 | [diff] [blame] | 557 | TRACE_EVENT(i915_gem_evict_vm, |
| 558 | TP_PROTO(struct i915_address_space *vm), |
| 559 | TP_ARGS(vm), |
| 560 | |
| 561 | TP_STRUCT__entry( |
Steven Rostedt | 9297ebf | 2014-03-18 11:27:37 -0400 | [diff] [blame] | 562 | __field(u32, dev) |
Ben Widawsky | bcccff8 | 2013-09-24 09:57:56 -0700 | [diff] [blame] | 563 | __field(struct i915_address_space *, vm) |
| 564 | ), |
| 565 | |
| 566 | TP_fast_assign( |
Chris Wilson | c6385c9 | 2016-11-29 12:42:05 +0000 | [diff] [blame] | 567 | __entry->dev = vm->i915->drm.primary->index; |
Ben Widawsky | bcccff8 | 2013-09-24 09:57:56 -0700 | [diff] [blame] | 568 | __entry->vm = vm; |
| 569 | ), |
| 570 | |
Steven Rostedt | 9297ebf | 2014-03-18 11:27:37 -0400 | [diff] [blame] | 571 | TP_printk("dev=%d, vm=%p", __entry->dev, __entry->vm) |
Ben Widawsky | bcccff8 | 2013-09-24 09:57:56 -0700 | [diff] [blame] | 572 | ); |
| 573 | |
Chris Wilson | 625d988 | 2017-01-11 11:23:11 +0000 | [diff] [blame] | 574 | TRACE_EVENT(i915_gem_evict_node, |
| 575 | TP_PROTO(struct i915_address_space *vm, struct drm_mm_node *node, unsigned int flags), |
| 576 | TP_ARGS(vm, node, flags), |
Chris Wilson | 172ae5b | 2016-12-05 14:29:37 +0000 | [diff] [blame] | 577 | |
| 578 | TP_STRUCT__entry( |
| 579 | __field(u32, dev) |
| 580 | __field(struct i915_address_space *, vm) |
| 581 | __field(u64, start) |
| 582 | __field(u64, size) |
| 583 | __field(unsigned long, color) |
| 584 | __field(unsigned int, flags) |
| 585 | ), |
| 586 | |
| 587 | TP_fast_assign( |
Chris Wilson | 625d988 | 2017-01-11 11:23:11 +0000 | [diff] [blame] | 588 | __entry->dev = vm->i915->drm.primary->index; |
| 589 | __entry->vm = vm; |
| 590 | __entry->start = node->start; |
| 591 | __entry->size = node->size; |
| 592 | __entry->color = node->color; |
Chris Wilson | 172ae5b | 2016-12-05 14:29:37 +0000 | [diff] [blame] | 593 | __entry->flags = flags; |
| 594 | ), |
| 595 | |
| 596 | TP_printk("dev=%d, vm=%p, start=%llx size=%llx, color=%lx, flags=%x", |
| 597 | __entry->dev, __entry->vm, |
| 598 | __entry->start, __entry->size, |
| 599 | __entry->color, __entry->flags) |
| 600 | ); |
| 601 | |
Chris Wilson | b52b89d | 2013-09-25 11:43:28 +0100 | [diff] [blame] | 602 | TRACE_EVENT(i915_gem_ring_sync_to, |
Chris Wilson | 8e63717 | 2016-08-02 22:50:26 +0100 | [diff] [blame] | 603 | TP_PROTO(struct drm_i915_gem_request *to, |
| 604 | struct drm_i915_gem_request *from), |
| 605 | TP_ARGS(to, from), |
Chris Wilson | b52b89d | 2013-09-25 11:43:28 +0100 | [diff] [blame] | 606 | |
| 607 | TP_STRUCT__entry( |
| 608 | __field(u32, dev) |
| 609 | __field(u32, sync_from) |
| 610 | __field(u32, sync_to) |
| 611 | __field(u32, seqno) |
| 612 | ), |
| 613 | |
| 614 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 615 | __entry->dev = from->i915->drm.primary->index; |
Chris Wilson | 8e63717 | 2016-08-02 22:50:26 +0100 | [diff] [blame] | 616 | __entry->sync_from = from->engine->id; |
| 617 | __entry->sync_to = to->engine->id; |
Chris Wilson | 65e4760 | 2016-10-28 13:58:49 +0100 | [diff] [blame] | 618 | __entry->seqno = from->global_seqno; |
Chris Wilson | b52b89d | 2013-09-25 11:43:28 +0100 | [diff] [blame] | 619 | ), |
| 620 | |
| 621 | TP_printk("dev=%u, sync-from=%u, sync-to=%u, seqno=%u", |
| 622 | __entry->dev, |
| 623 | __entry->sync_from, __entry->sync_to, |
| 624 | __entry->seqno) |
| 625 | ); |
| 626 | |
Tvrtko Ursulin | 1cce892 | 2017-02-21 09:13:44 +0000 | [diff] [blame] | 627 | TRACE_EVENT(i915_gem_request_queue, |
John Harrison | 74328ee | 2014-11-24 18:49:38 +0000 | [diff] [blame] | 628 | TP_PROTO(struct drm_i915_gem_request *req, u32 flags), |
| 629 | TP_ARGS(req, flags), |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 630 | |
| 631 | TP_STRUCT__entry( |
| 632 | __field(u32, dev) |
| 633 | __field(u32, ring) |
Tvrtko Ursulin | 1cce892 | 2017-02-21 09:13:44 +0000 | [diff] [blame] | 634 | __field(u32, ctx) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 635 | __field(u32, seqno) |
Chris Wilson | d7d4eed | 2012-10-17 12:09:54 +0100 | [diff] [blame] | 636 | __field(u32, flags) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 637 | ), |
| 638 | |
| 639 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 640 | __entry->dev = req->i915->drm.primary->index; |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 641 | __entry->ring = req->engine->id; |
Chris Wilson | 6036713 | 2017-03-16 20:42:35 +0000 | [diff] [blame] | 642 | __entry->ctx = req->fence.context; |
Tvrtko Ursulin | 1cce892 | 2017-02-21 09:13:44 +0000 | [diff] [blame] | 643 | __entry->seqno = req->fence.seqno; |
Chris Wilson | d7d4eed | 2012-10-17 12:09:54 +0100 | [diff] [blame] | 644 | __entry->flags = flags; |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 645 | ), |
| 646 | |
Tvrtko Ursulin | 1cce892 | 2017-02-21 09:13:44 +0000 | [diff] [blame] | 647 | TP_printk("dev=%u, ring=%u, ctx=%u, seqno=%u, flags=0x%x", |
| 648 | __entry->dev, __entry->ring, __entry->ctx, __entry->seqno, |
| 649 | __entry->flags) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 650 | ); |
| 651 | |
| 652 | TRACE_EVENT(i915_gem_ring_flush, |
John Harrison | a84c3ae | 2015-05-29 17:43:57 +0100 | [diff] [blame] | 653 | TP_PROTO(struct drm_i915_gem_request *req, u32 invalidate, u32 flush), |
| 654 | TP_ARGS(req, invalidate, flush), |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 655 | |
| 656 | TP_STRUCT__entry( |
| 657 | __field(u32, dev) |
| 658 | __field(u32, ring) |
| 659 | __field(u32, invalidate) |
| 660 | __field(u32, flush) |
| 661 | ), |
| 662 | |
| 663 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 664 | __entry->dev = req->i915->drm.primary->index; |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 665 | __entry->ring = req->engine->id; |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 666 | __entry->invalidate = invalidate; |
| 667 | __entry->flush = flush; |
| 668 | ), |
| 669 | |
| 670 | TP_printk("dev=%u, ring=%x, invalidate=%04x, flush=%04x", |
| 671 | __entry->dev, __entry->ring, |
| 672 | __entry->invalidate, __entry->flush) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 673 | ); |
| 674 | |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 675 | DECLARE_EVENT_CLASS(i915_gem_request, |
John Harrison | 74328ee | 2014-11-24 18:49:38 +0000 | [diff] [blame] | 676 | TP_PROTO(struct drm_i915_gem_request *req), |
| 677 | TP_ARGS(req), |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 678 | |
| 679 | TP_STRUCT__entry( |
Chris Wilson | 4f49be5 | 2009-09-24 00:23:33 +0100 | [diff] [blame] | 680 | __field(u32, dev) |
Tvrtko Ursulin | e235b53 | 2017-02-21 09:13:43 +0000 | [diff] [blame] | 681 | __field(u32, ctx) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 682 | __field(u32, ring) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 683 | __field(u32, seqno) |
Tvrtko Ursulin | e235b53 | 2017-02-21 09:13:43 +0000 | [diff] [blame] | 684 | __field(u32, global) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 685 | ), |
| 686 | |
| 687 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 688 | __entry->dev = req->i915->drm.primary->index; |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 689 | __entry->ring = req->engine->id; |
Chris Wilson | 6036713 | 2017-03-16 20:42:35 +0000 | [diff] [blame] | 690 | __entry->ctx = req->fence.context; |
Tvrtko Ursulin | e235b53 | 2017-02-21 09:13:43 +0000 | [diff] [blame] | 691 | __entry->seqno = req->fence.seqno; |
| 692 | __entry->global = req->global_seqno; |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 693 | ), |
| 694 | |
Tvrtko Ursulin | e235b53 | 2017-02-21 09:13:43 +0000 | [diff] [blame] | 695 | TP_printk("dev=%u, ring=%u, ctx=%u, seqno=%u, global=%u", |
| 696 | __entry->dev, __entry->ring, __entry->ctx, __entry->seqno, |
| 697 | __entry->global) |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 698 | ); |
| 699 | |
| 700 | DEFINE_EVENT(i915_gem_request, i915_gem_request_add, |
John Harrison | 74328ee | 2014-11-24 18:49:38 +0000 | [diff] [blame] | 701 | TP_PROTO(struct drm_i915_gem_request *req), |
| 702 | TP_ARGS(req) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 703 | ); |
| 704 | |
Tvrtko Ursulin | 354d036 | 2017-02-21 11:01:42 +0000 | [diff] [blame] | 705 | #if defined(CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS) |
| 706 | DEFINE_EVENT(i915_gem_request, i915_gem_request_submit, |
| 707 | TP_PROTO(struct drm_i915_gem_request *req), |
| 708 | TP_ARGS(req) |
| 709 | ); |
| 710 | |
| 711 | DEFINE_EVENT(i915_gem_request, i915_gem_request_execute, |
| 712 | TP_PROTO(struct drm_i915_gem_request *req), |
| 713 | TP_ARGS(req) |
| 714 | ); |
Tvrtko Ursulin | d7d9683 | 2017-02-21 11:03:00 +0000 | [diff] [blame] | 715 | |
| 716 | DECLARE_EVENT_CLASS(i915_gem_request_hw, |
| 717 | TP_PROTO(struct drm_i915_gem_request *req, |
| 718 | unsigned int port), |
| 719 | TP_ARGS(req, port), |
| 720 | |
| 721 | TP_STRUCT__entry( |
| 722 | __field(u32, dev) |
| 723 | __field(u32, ring) |
| 724 | __field(u32, seqno) |
| 725 | __field(u32, global_seqno) |
| 726 | __field(u32, ctx) |
| 727 | __field(u32, port) |
| 728 | ), |
| 729 | |
| 730 | TP_fast_assign( |
| 731 | __entry->dev = req->i915->drm.primary->index; |
| 732 | __entry->ring = req->engine->id; |
Chris Wilson | 6036713 | 2017-03-16 20:42:35 +0000 | [diff] [blame] | 733 | __entry->ctx = req->fence.context; |
Tvrtko Ursulin | d7d9683 | 2017-02-21 11:03:00 +0000 | [diff] [blame] | 734 | __entry->seqno = req->fence.seqno; |
| 735 | __entry->global_seqno = req->global_seqno; |
| 736 | __entry->port = port; |
| 737 | ), |
| 738 | |
| 739 | TP_printk("dev=%u, ring=%u, ctx=%u, seqno=%u, global=%u, port=%u", |
| 740 | __entry->dev, __entry->ring, __entry->ctx, |
| 741 | __entry->seqno, __entry->global_seqno, |
| 742 | __entry->port) |
| 743 | ); |
| 744 | |
| 745 | DEFINE_EVENT(i915_gem_request_hw, i915_gem_request_in, |
| 746 | TP_PROTO(struct drm_i915_gem_request *req, unsigned int port), |
| 747 | TP_ARGS(req, port) |
| 748 | ); |
| 749 | |
| 750 | DEFINE_EVENT(i915_gem_request, i915_gem_request_out, |
| 751 | TP_PROTO(struct drm_i915_gem_request *req), |
| 752 | TP_ARGS(req) |
| 753 | ); |
Tvrtko Ursulin | 354d036 | 2017-02-21 11:01:42 +0000 | [diff] [blame] | 754 | #else |
| 755 | #if !defined(TRACE_HEADER_MULTI_READ) |
| 756 | static inline void |
| 757 | trace_i915_gem_request_submit(struct drm_i915_gem_request *req) |
| 758 | { |
| 759 | } |
| 760 | |
| 761 | static inline void |
| 762 | trace_i915_gem_request_execute(struct drm_i915_gem_request *req) |
| 763 | { |
| 764 | } |
Tvrtko Ursulin | d7d9683 | 2017-02-21 11:03:00 +0000 | [diff] [blame] | 765 | |
| 766 | static inline void |
| 767 | trace_i915_gem_request_in(struct drm_i915_gem_request *req, unsigned int port) |
| 768 | { |
| 769 | } |
| 770 | |
| 771 | static inline void |
| 772 | trace_i915_gem_request_out(struct drm_i915_gem_request *req) |
| 773 | { |
| 774 | } |
Tvrtko Ursulin | 354d036 | 2017-02-21 11:01:42 +0000 | [diff] [blame] | 775 | #endif |
| 776 | #endif |
| 777 | |
Tvrtko Ursulin | dffabc8 | 2017-02-21 09:13:48 +0000 | [diff] [blame] | 778 | TRACE_EVENT(intel_engine_notify, |
| 779 | TP_PROTO(struct intel_engine_cs *engine, bool waiters), |
| 780 | TP_ARGS(engine, waiters), |
Chris Wilson | 814e9b5 | 2013-09-23 17:33:19 -0300 | [diff] [blame] | 781 | |
| 782 | TP_STRUCT__entry( |
| 783 | __field(u32, dev) |
| 784 | __field(u32, ring) |
| 785 | __field(u32, seqno) |
Tvrtko Ursulin | dffabc8 | 2017-02-21 09:13:48 +0000 | [diff] [blame] | 786 | __field(bool, waiters) |
Chris Wilson | 814e9b5 | 2013-09-23 17:33:19 -0300 | [diff] [blame] | 787 | ), |
| 788 | |
| 789 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 790 | __entry->dev = engine->i915->drm.primary->index; |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 791 | __entry->ring = engine->id; |
Chris Wilson | 1b7744e | 2016-07-01 17:23:17 +0100 | [diff] [blame] | 792 | __entry->seqno = intel_engine_get_seqno(engine); |
Tvrtko Ursulin | dffabc8 | 2017-02-21 09:13:48 +0000 | [diff] [blame] | 793 | __entry->waiters = waiters; |
Chris Wilson | 814e9b5 | 2013-09-23 17:33:19 -0300 | [diff] [blame] | 794 | ), |
| 795 | |
Tvrtko Ursulin | dffabc8 | 2017-02-21 09:13:48 +0000 | [diff] [blame] | 796 | TP_printk("dev=%u, ring=%u, seqno=%u, waiters=%u", |
| 797 | __entry->dev, __entry->ring, __entry->seqno, |
| 798 | __entry->waiters) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 799 | ); |
| 800 | |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 801 | DEFINE_EVENT(i915_gem_request, i915_gem_request_retire, |
John Harrison | 74328ee | 2014-11-24 18:49:38 +0000 | [diff] [blame] | 802 | TP_PROTO(struct drm_i915_gem_request *req), |
| 803 | TP_ARGS(req) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 804 | ); |
| 805 | |
Ben Widawsky | f3fd376 | 2012-05-24 15:03:09 -0700 | [diff] [blame] | 806 | TRACE_EVENT(i915_gem_request_wait_begin, |
Tvrtko Ursulin | 93692502 | 2017-02-21 11:00:24 +0000 | [diff] [blame] | 807 | TP_PROTO(struct drm_i915_gem_request *req, unsigned int flags), |
| 808 | TP_ARGS(req, flags), |
Ben Widawsky | f3fd376 | 2012-05-24 15:03:09 -0700 | [diff] [blame] | 809 | |
| 810 | TP_STRUCT__entry( |
| 811 | __field(u32, dev) |
| 812 | __field(u32, ring) |
Tvrtko Ursulin | 93692502 | 2017-02-21 11:00:24 +0000 | [diff] [blame] | 813 | __field(u32, ctx) |
Ben Widawsky | f3fd376 | 2012-05-24 15:03:09 -0700 | [diff] [blame] | 814 | __field(u32, seqno) |
Tvrtko Ursulin | 93692502 | 2017-02-21 11:00:24 +0000 | [diff] [blame] | 815 | __field(u32, global) |
| 816 | __field(unsigned int, flags) |
Ben Widawsky | f3fd376 | 2012-05-24 15:03:09 -0700 | [diff] [blame] | 817 | ), |
| 818 | |
| 819 | /* NB: the blocking information is racy since mutex_is_locked |
| 820 | * doesn't check that the current thread holds the lock. The only |
| 821 | * other option would be to pass the boolean information of whether |
| 822 | * or not the class was blocking down through the stack which is |
| 823 | * less desirable. |
| 824 | */ |
| 825 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 826 | __entry->dev = req->i915->drm.primary->index; |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 827 | __entry->ring = req->engine->id; |
Chris Wilson | 6036713 | 2017-03-16 20:42:35 +0000 | [diff] [blame] | 828 | __entry->ctx = req->fence.context; |
Tvrtko Ursulin | 93692502 | 2017-02-21 11:00:24 +0000 | [diff] [blame] | 829 | __entry->seqno = req->fence.seqno; |
| 830 | __entry->global = req->global_seqno; |
| 831 | __entry->flags = flags; |
Ben Widawsky | f3fd376 | 2012-05-24 15:03:09 -0700 | [diff] [blame] | 832 | ), |
| 833 | |
Tvrtko Ursulin | 93692502 | 2017-02-21 11:00:24 +0000 | [diff] [blame] | 834 | TP_printk("dev=%u, ring=%u, ctx=%u, seqno=%u, global=%u, blocking=%u, flags=0x%x", |
| 835 | __entry->dev, __entry->ring, __entry->ctx, __entry->seqno, |
| 836 | __entry->global, !!(__entry->flags & I915_WAIT_LOCKED), |
| 837 | __entry->flags) |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 838 | ); |
| 839 | |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 840 | DEFINE_EVENT(i915_gem_request, i915_gem_request_wait_end, |
John Harrison | 74328ee | 2014-11-24 18:49:38 +0000 | [diff] [blame] | 841 | TP_PROTO(struct drm_i915_gem_request *req), |
| 842 | TP_ARGS(req) |
Li Zefan | 903cf20 | 2010-03-11 16:41:45 +0800 | [diff] [blame] | 843 | ); |
| 844 | |
Jesse Barnes | e5510fa | 2010-07-01 16:48:37 -0700 | [diff] [blame] | 845 | TRACE_EVENT(i915_flip_request, |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 846 | TP_PROTO(int plane, struct drm_i915_gem_object *obj), |
Jesse Barnes | e5510fa | 2010-07-01 16:48:37 -0700 | [diff] [blame] | 847 | |
| 848 | TP_ARGS(plane, obj), |
| 849 | |
| 850 | TP_STRUCT__entry( |
| 851 | __field(int, plane) |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 852 | __field(struct drm_i915_gem_object *, obj) |
Jesse Barnes | e5510fa | 2010-07-01 16:48:37 -0700 | [diff] [blame] | 853 | ), |
| 854 | |
| 855 | TP_fast_assign( |
| 856 | __entry->plane = plane; |
| 857 | __entry->obj = obj; |
| 858 | ), |
| 859 | |
| 860 | TP_printk("plane=%d, obj=%p", __entry->plane, __entry->obj) |
| 861 | ); |
| 862 | |
| 863 | TRACE_EVENT(i915_flip_complete, |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 864 | TP_PROTO(int plane, struct drm_i915_gem_object *obj), |
Jesse Barnes | e5510fa | 2010-07-01 16:48:37 -0700 | [diff] [blame] | 865 | |
| 866 | TP_ARGS(plane, obj), |
| 867 | |
| 868 | TP_STRUCT__entry( |
| 869 | __field(int, plane) |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 870 | __field(struct drm_i915_gem_object *, obj) |
Jesse Barnes | e5510fa | 2010-07-01 16:48:37 -0700 | [diff] [blame] | 871 | ), |
| 872 | |
| 873 | TP_fast_assign( |
| 874 | __entry->plane = plane; |
| 875 | __entry->obj = obj; |
| 876 | ), |
| 877 | |
| 878 | TP_printk("plane=%d, obj=%p", __entry->plane, __entry->obj) |
| 879 | ); |
| 880 | |
Chris Wilson | ed71f1b | 2013-07-19 20:36:56 +0100 | [diff] [blame] | 881 | TRACE_EVENT_CONDITION(i915_reg_rw, |
Ville Syrjälä | f0f59a0 | 2015-11-18 15:33:26 +0200 | [diff] [blame] | 882 | TP_PROTO(bool write, i915_reg_t reg, u64 val, int len, bool trace), |
Yuanhan Liu | ba4f01a | 2010-11-08 17:09:41 +0800 | [diff] [blame] | 883 | |
Chris Wilson | ed71f1b | 2013-07-19 20:36:56 +0100 | [diff] [blame] | 884 | TP_ARGS(write, reg, val, len, trace), |
| 885 | |
| 886 | TP_CONDITION(trace), |
Yuanhan Liu | ba4f01a | 2010-11-08 17:09:41 +0800 | [diff] [blame] | 887 | |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 888 | TP_STRUCT__entry( |
| 889 | __field(u64, val) |
| 890 | __field(u32, reg) |
| 891 | __field(u16, write) |
| 892 | __field(u16, len) |
| 893 | ), |
Yuanhan Liu | ba4f01a | 2010-11-08 17:09:41 +0800 | [diff] [blame] | 894 | |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 895 | TP_fast_assign( |
| 896 | __entry->val = (u64)val; |
Ville Syrjälä | f0f59a0 | 2015-11-18 15:33:26 +0200 | [diff] [blame] | 897 | __entry->reg = i915_mmio_reg_offset(reg); |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 898 | __entry->write = write; |
| 899 | __entry->len = len; |
| 900 | ), |
Yuanhan Liu | ba4f01a | 2010-11-08 17:09:41 +0800 | [diff] [blame] | 901 | |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 902 | TP_printk("%s reg=0x%x, len=%d, val=(0x%x, 0x%x)", |
| 903 | __entry->write ? "write" : "read", |
| 904 | __entry->reg, __entry->len, |
| 905 | (u32)(__entry->val & 0xffffffff), |
| 906 | (u32)(__entry->val >> 32)) |
Yuanhan Liu | ba4f01a | 2010-11-08 17:09:41 +0800 | [diff] [blame] | 907 | ); |
| 908 | |
Daniel Vetter | be2cde9 | 2012-08-30 13:26:48 +0200 | [diff] [blame] | 909 | TRACE_EVENT(intel_gpu_freq_change, |
| 910 | TP_PROTO(u32 freq), |
| 911 | TP_ARGS(freq), |
| 912 | |
| 913 | TP_STRUCT__entry( |
| 914 | __field(u32, freq) |
| 915 | ), |
| 916 | |
| 917 | TP_fast_assign( |
| 918 | __entry->freq = freq; |
| 919 | ), |
| 920 | |
| 921 | TP_printk("new_freq=%u", __entry->freq) |
| 922 | ); |
| 923 | |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 924 | /** |
| 925 | * DOC: i915_ppgtt_create and i915_ppgtt_release tracepoints |
| 926 | * |
| 927 | * With full ppgtt enabled each process using drm will allocate at least one |
| 928 | * translation table. With these traces it is possible to keep track of the |
| 929 | * allocation and of the lifetime of the tables; this can be used during |
| 930 | * testing/debug to verify that we are not leaking ppgtts. |
| 931 | * These traces identify the ppgtt through the vm pointer, which is also printed |
| 932 | * by the i915_vma_bind and i915_vma_unbind tracepoints. |
| 933 | */ |
| 934 | DECLARE_EVENT_CLASS(i915_ppgtt, |
| 935 | TP_PROTO(struct i915_address_space *vm), |
| 936 | TP_ARGS(vm), |
| 937 | |
| 938 | TP_STRUCT__entry( |
| 939 | __field(struct i915_address_space *, vm) |
| 940 | __field(u32, dev) |
| 941 | ), |
| 942 | |
| 943 | TP_fast_assign( |
| 944 | __entry->vm = vm; |
Chris Wilson | c6385c9 | 2016-11-29 12:42:05 +0000 | [diff] [blame] | 945 | __entry->dev = vm->i915->drm.primary->index; |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 946 | ), |
| 947 | |
| 948 | TP_printk("dev=%u, vm=%p", __entry->dev, __entry->vm) |
| 949 | ) |
| 950 | |
| 951 | DEFINE_EVENT(i915_ppgtt, i915_ppgtt_create, |
| 952 | TP_PROTO(struct i915_address_space *vm), |
| 953 | TP_ARGS(vm) |
| 954 | ); |
| 955 | |
| 956 | DEFINE_EVENT(i915_ppgtt, i915_ppgtt_release, |
| 957 | TP_PROTO(struct i915_address_space *vm), |
| 958 | TP_ARGS(vm) |
| 959 | ); |
| 960 | |
| 961 | /** |
| 962 | * DOC: i915_context_create and i915_context_free tracepoints |
| 963 | * |
| 964 | * These tracepoints are used to track creation and deletion of contexts. |
| 965 | * If full ppgtt is enabled, they also print the address of the vm assigned to |
| 966 | * the context. |
| 967 | */ |
| 968 | DECLARE_EVENT_CLASS(i915_context, |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 969 | TP_PROTO(struct i915_gem_context *ctx), |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 970 | TP_ARGS(ctx), |
| 971 | |
| 972 | TP_STRUCT__entry( |
| 973 | __field(u32, dev) |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 974 | __field(struct i915_gem_context *, ctx) |
Tvrtko Ursulin | 99c181a | 2017-02-21 09:13:50 +0000 | [diff] [blame] | 975 | __field(u32, hw_id) |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 976 | __field(struct i915_address_space *, vm) |
| 977 | ), |
| 978 | |
| 979 | TP_fast_assign( |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 980 | __entry->dev = ctx->i915->drm.primary->index; |
Tvrtko Ursulin | 99c181a | 2017-02-21 09:13:50 +0000 | [diff] [blame] | 981 | __entry->ctx = ctx; |
| 982 | __entry->hw_id = ctx->hw_id; |
| 983 | __entry->vm = ctx->ppgtt ? &ctx->ppgtt->base : NULL; |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 984 | ), |
| 985 | |
Tvrtko Ursulin | 99c181a | 2017-02-21 09:13:50 +0000 | [diff] [blame] | 986 | TP_printk("dev=%u, ctx=%p, ctx_vm=%p, hw_id=%u", |
| 987 | __entry->dev, __entry->ctx, __entry->vm, __entry->hw_id) |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 988 | ) |
| 989 | |
| 990 | DEFINE_EVENT(i915_context, i915_context_create, |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 991 | TP_PROTO(struct i915_gem_context *ctx), |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 992 | TP_ARGS(ctx) |
| 993 | ); |
| 994 | |
| 995 | DEFINE_EVENT(i915_context, i915_context_free, |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 996 | TP_PROTO(struct i915_gem_context *ctx), |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 997 | TP_ARGS(ctx) |
| 998 | ); |
| 999 | |
| 1000 | /** |
| 1001 | * DOC: switch_mm tracepoint |
| 1002 | * |
| 1003 | * This tracepoint allows tracking of the mm switch, which is an important point |
| 1004 | * in the lifetime of the vm in the legacy submission path. This tracepoint is |
| 1005 | * called only if full ppgtt is enabled. |
| 1006 | */ |
| 1007 | TRACE_EVENT(switch_mm, |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 1008 | TP_PROTO(struct intel_engine_cs *engine, struct i915_gem_context *to), |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 1009 | |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 1010 | TP_ARGS(engine, to), |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 1011 | |
| 1012 | TP_STRUCT__entry( |
| 1013 | __field(u32, ring) |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 1014 | __field(struct i915_gem_context *, to) |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 1015 | __field(struct i915_address_space *, vm) |
| 1016 | __field(u32, dev) |
| 1017 | ), |
| 1018 | |
| 1019 | TP_fast_assign( |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 1020 | __entry->ring = engine->id; |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 1021 | __entry->to = to; |
| 1022 | __entry->vm = to->ppgtt? &to->ppgtt->base : NULL; |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 1023 | __entry->dev = engine->i915->drm.primary->index; |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 1024 | ), |
| 1025 | |
| 1026 | TP_printk("dev=%u, ring=%u, ctx=%p, ctx_vm=%p", |
| 1027 | __entry->dev, __entry->ring, __entry->to, __entry->vm) |
| 1028 | ); |
| 1029 | |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 1030 | #endif /* _I915_TRACE_H_ */ |
| 1031 | |
| 1032 | /* This part must be outside protection */ |
| 1033 | #undef TRACE_INCLUDE_PATH |
Thierry Reding | 4e6d771 | 2017-09-01 16:49:52 +0200 | [diff] [blame] | 1034 | #define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/i915 |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 1035 | #include <trace/define_trace.h> |