Boris Brezillon | 2d472ab | 2016-04-01 14:26:35 +0200 | [diff] [blame] | 1 | * NAND chip and NAND controller generic binding |
| 2 | |
| 3 | NAND controller/NAND chip representation: |
| 4 | |
| 5 | The NAND controller should be represented with its own DT node, and all |
| 6 | NAND chips attached to this controller should be defined as children nodes |
| 7 | of the NAND controller. This representation should be enforced even for |
| 8 | simple controllers supporting only one chip. |
| 9 | |
| 10 | Mandatory NAND controller properties: |
| 11 | - #address-cells: depends on your controller. Should at least be 1 to |
| 12 | encode the CS line id. |
| 13 | - #size-cells: depends on your controller. Put zero unless you need a |
| 14 | mapping between CS lines and dedicated memory regions |
| 15 | |
| 16 | Optional NAND controller properties |
| 17 | - ranges: only needed if you need to define a mapping between CS lines and |
| 18 | memory regions |
| 19 | |
| 20 | Optional NAND chip properties: |
Jean-Christophe PLAGNIOL-VILLARD | 770d7c3 | 2012-01-28 12:12:36 +0800 | [diff] [blame] | 21 | |
| 22 | - nand-ecc-mode : String, operation mode of the NAND ecc mode. |
Rafał Miłecki | 32698aa | 2016-04-22 13:23:14 +0200 | [diff] [blame] | 23 | Supported values are: "none", "soft", "hw", "hw_syndrome", |
| 24 | "hw_oob_first". |
| 25 | Deprecated values: |
| 26 | "soft_bch": use "soft" and nand-ecc-algo instead |
Rafał Miłecki | ba4f46b | 2016-04-22 13:23:13 +0200 | [diff] [blame] | 27 | - nand-ecc-algo: string, algorithm of NAND ECC. |
| 28 | Supported values are: "hamming", "bch". |
Jean-Christophe PLAGNIOL-VILLARD | 770d7c3 | 2012-01-28 12:12:36 +0800 | [diff] [blame] | 29 | - nand-bus-width : 8 or 16 bus width if not present 8 |
| 30 | - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false |
Ezequiel Garcia | 8dd4916 | 2014-02-24 19:24:49 -0300 | [diff] [blame] | 31 | |
| 32 | - nand-ecc-strength: integer representing the number of bits to correct |
| 33 | per ECC step. |
| 34 | |
| 35 | - nand-ecc-step-size: integer representing the number of data bytes |
| 36 | that are covered by a single ECC step. |
| 37 | |
| 38 | The ECC strength and ECC step size properties define the correction capability |
| 39 | of a controller. Together, they say a controller can correct "{strength} bit |
| 40 | errors per {size} bytes". |
| 41 | |
| 42 | The interpretation of these parameters is implementation-defined, so not all |
| 43 | implementations must support all possible combinations. However, implementations |
| 44 | are encouraged to further specify the value(s) they support. |
Boris Brezillon | 2d472ab | 2016-04-01 14:26:35 +0200 | [diff] [blame] | 45 | |
| 46 | Example: |
| 47 | |
| 48 | nand-controller { |
| 49 | #address-cells = <1>; |
| 50 | #size-cells = <0>; |
| 51 | |
| 52 | /* controller specific properties */ |
| 53 | |
| 54 | nand@0 { |
| 55 | reg = <0>; |
Baruch Siach | 507e617 | 2016-05-25 06:45:10 +0300 | [diff] [blame] | 56 | nand-ecc-mode = "soft"; |
| 57 | nand-ecc-algo = "bch"; |
Boris Brezillon | 2d472ab | 2016-04-01 14:26:35 +0200 | [diff] [blame] | 58 | |
| 59 | /* controller specific properties */ |
| 60 | }; |
| 61 | }; |