Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 1 | /* |
| 2 | * File: arch/blackfin/mach-bf538/boards/ezkit.c |
| 3 | * Based on: arch/blackfin/mach-bf537/boards/ezkit.c |
| 4 | * Author: Aidan Williams <aidan@nicta.com.au> |
| 5 | * |
| 6 | * Created: |
| 7 | * Description: |
| 8 | * |
| 9 | * Modified: |
| 10 | * Copyright 2005 National ICT Australia (NICTA) |
| 11 | * Copyright 2004-2008 Analog Devices Inc. |
| 12 | * |
| 13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or modify |
| 16 | * it under the terms of the GNU General Public License as published by |
| 17 | * the Free Software Foundation; either version 2 of the License, or |
| 18 | * (at your option) any later version. |
| 19 | * |
| 20 | * This program is distributed in the hope that it will be useful, |
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 23 | * GNU General Public License for more details. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License |
| 26 | * along with this program; if not, see the file COPYING, or write |
| 27 | * to the Free Software Foundation, Inc., |
| 28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 29 | */ |
| 30 | |
| 31 | #include <linux/device.h> |
| 32 | #include <linux/platform_device.h> |
| 33 | #include <linux/mtd/mtd.h> |
| 34 | #include <linux/mtd/partitions.h> |
| 35 | #include <linux/spi/spi.h> |
| 36 | #include <linux/spi/flash.h> |
| 37 | #include <linux/irq.h> |
| 38 | #include <linux/interrupt.h> |
| 39 | #include <asm/bfin5xx_spi.h> |
| 40 | #include <asm/dma.h> |
| 41 | #include <asm/gpio.h> |
| 42 | #include <asm/nand.h> |
| 43 | #include <asm/portmux.h> |
| 44 | #include <asm/dpmc.h> |
| 45 | #include <linux/input.h> |
| 46 | |
| 47 | /* |
| 48 | * Name the Board for the /proc/cpuinfo |
| 49 | */ |
Mike Frysinger | fe85cad | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 50 | const char bfin_board_name[] = "ADI BF538-EZKIT"; |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 51 | |
| 52 | /* |
| 53 | * Driver needs to know address, irq and flag pin. |
| 54 | */ |
| 55 | |
| 56 | |
| 57 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
| 58 | static struct platform_device rtc_device = { |
| 59 | .name = "rtc-bfin", |
| 60 | .id = -1, |
| 61 | }; |
| 62 | #endif |
| 63 | |
| 64 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| 65 | static struct resource bfin_uart_resources[] = { |
| 66 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
| 67 | { |
| 68 | .start = 0xFFC00400, |
| 69 | .end = 0xFFC004FF, |
| 70 | .flags = IORESOURCE_MEM, |
| 71 | }, |
| 72 | #endif |
| 73 | #ifdef CONFIG_SERIAL_BFIN_UART1 |
| 74 | { |
| 75 | .start = 0xFFC02000, |
| 76 | .end = 0xFFC020FF, |
| 77 | .flags = IORESOURCE_MEM, |
| 78 | }, |
| 79 | #endif |
| 80 | #ifdef CONFIG_SERIAL_BFIN_UART2 |
| 81 | { |
| 82 | .start = 0xFFC02100, |
| 83 | .end = 0xFFC021FF, |
| 84 | .flags = IORESOURCE_MEM, |
| 85 | }, |
| 86 | #endif |
| 87 | }; |
| 88 | |
| 89 | static struct platform_device bfin_uart_device = { |
| 90 | .name = "bfin-uart", |
| 91 | .id = 1, |
| 92 | .num_resources = ARRAY_SIZE(bfin_uart_resources), |
| 93 | .resource = bfin_uart_resources, |
| 94 | }; |
| 95 | #endif |
| 96 | |
| 97 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 98 | #ifdef CONFIG_BFIN_SIR0 |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 99 | static struct resource bfin_sir0_resources[] = { |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 100 | { |
| 101 | .start = 0xFFC00400, |
| 102 | .end = 0xFFC004FF, |
| 103 | .flags = IORESOURCE_MEM, |
| 104 | }, |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 105 | { |
| 106 | .start = IRQ_UART0_RX, |
| 107 | .end = IRQ_UART0_RX+1, |
| 108 | .flags = IORESOURCE_IRQ, |
| 109 | }, |
| 110 | { |
| 111 | .start = CH_UART0_RX, |
| 112 | .end = CH_UART0_RX+1, |
| 113 | .flags = IORESOURCE_DMA, |
| 114 | }, |
| 115 | }; |
| 116 | static struct platform_device bfin_sir0_device = { |
| 117 | .name = "bfin_sir", |
| 118 | .id = 0, |
| 119 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), |
| 120 | .resource = bfin_sir0_resources, |
| 121 | }; |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 122 | #endif |
| 123 | #ifdef CONFIG_BFIN_SIR1 |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 124 | static struct resource bfin_sir1_resources[] = { |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 125 | { |
| 126 | .start = 0xFFC02000, |
| 127 | .end = 0xFFC020FF, |
| 128 | .flags = IORESOURCE_MEM, |
| 129 | }, |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 130 | { |
| 131 | .start = IRQ_UART1_RX, |
| 132 | .end = IRQ_UART1_RX+1, |
| 133 | .flags = IORESOURCE_IRQ, |
| 134 | }, |
| 135 | { |
| 136 | .start = CH_UART1_RX, |
| 137 | .end = CH_UART1_RX+1, |
| 138 | .flags = IORESOURCE_DMA, |
| 139 | }, |
| 140 | }; |
| 141 | static struct platform_device bfin_sir1_device = { |
| 142 | .name = "bfin_sir", |
| 143 | .id = 1, |
| 144 | .num_resources = ARRAY_SIZE(bfin_sir1_resources), |
| 145 | .resource = bfin_sir1_resources, |
| 146 | }; |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 147 | #endif |
| 148 | #ifdef CONFIG_BFIN_SIR2 |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 149 | static struct resource bfin_sir2_resources[] = { |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 150 | { |
| 151 | .start = 0xFFC02100, |
| 152 | .end = 0xFFC021FF, |
| 153 | .flags = IORESOURCE_MEM, |
| 154 | }, |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 155 | { |
| 156 | .start = IRQ_UART2_RX, |
| 157 | .end = IRQ_UART2_RX+1, |
| 158 | .flags = IORESOURCE_IRQ, |
| 159 | }, |
| 160 | { |
| 161 | .start = CH_UART2_RX, |
| 162 | .end = CH_UART2_RX+1, |
| 163 | .flags = IORESOURCE_DMA, |
| 164 | }, |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 165 | }; |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 166 | static struct platform_device bfin_sir2_device = { |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 167 | .name = "bfin_sir", |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 168 | .id = 2, |
| 169 | .num_resources = ARRAY_SIZE(bfin_sir2_resources), |
| 170 | .resource = bfin_sir2_resources, |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 171 | }; |
| 172 | #endif |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 173 | #endif |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 174 | |
| 175 | /* |
| 176 | * USB-LAN EzExtender board |
| 177 | * Driver needs to know address, irq and flag pin. |
| 178 | */ |
| 179 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
| 180 | static struct resource smc91x_resources[] = { |
| 181 | { |
| 182 | .name = "smc91x-regs", |
| 183 | .start = 0x20310300, |
| 184 | .end = 0x20310300 + 16, |
| 185 | .flags = IORESOURCE_MEM, |
| 186 | }, { |
| 187 | .start = IRQ_PF0, |
| 188 | .end = IRQ_PF0, |
| 189 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| 190 | }, |
| 191 | }; |
| 192 | static struct platform_device smc91x_device = { |
| 193 | .name = "smc91x", |
| 194 | .id = 0, |
| 195 | .num_resources = ARRAY_SIZE(smc91x_resources), |
| 196 | .resource = smc91x_resources, |
| 197 | }; |
| 198 | #endif |
| 199 | |
| 200 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 201 | /* all SPI peripherals info goes here */ |
| 202 | #if defined(CONFIG_MTD_M25P80) \ |
| 203 | || defined(CONFIG_MTD_M25P80_MODULE) |
| 204 | /* SPI flash chip (m25p16) */ |
| 205 | static struct mtd_partition bfin_spi_flash_partitions[] = { |
| 206 | { |
| 207 | .name = "bootloader(spi)", |
| 208 | .size = 0x00040000, |
| 209 | .offset = 0, |
| 210 | .mask_flags = MTD_CAP_ROM |
| 211 | }, { |
| 212 | .name = "linux kernel(spi)", |
| 213 | .size = 0x1c0000, |
| 214 | .offset = 0x40000 |
| 215 | } |
| 216 | }; |
| 217 | |
| 218 | static struct flash_platform_data bfin_spi_flash_data = { |
| 219 | .name = "m25p80", |
| 220 | .parts = bfin_spi_flash_partitions, |
| 221 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), |
| 222 | .type = "m25p16", |
| 223 | }; |
| 224 | |
| 225 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
| 226 | .enable_dma = 0, /* use dma transfer with this chip*/ |
| 227 | .bits_per_word = 8, |
| 228 | .cs_change_per_word = 0, |
| 229 | }; |
| 230 | #endif |
| 231 | |
| 232 | #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE) |
| 233 | #include <linux/spi/ad7879.h> |
| 234 | static const struct ad7879_platform_data bfin_ad7879_ts_info = { |
| 235 | .model = 7879, /* Model = AD7879 */ |
| 236 | .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */ |
| 237 | .pressure_max = 10000, |
| 238 | .pressure_min = 0, |
| 239 | .first_conversion_delay = 3, /* wait 512us before do a first conversion */ |
| 240 | .acquisition_time = 1, /* 4us acquisition time per sample */ |
| 241 | .median = 2, /* do 8 measurements */ |
| 242 | .averaging = 1, /* take the average of 4 middle samples */ |
| 243 | .pen_down_acc_interval = 255, /* 9.4 ms */ |
| 244 | .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */ |
| 245 | .gpio_default = 1, /* During initialization set GPIO = HIGH */ |
| 246 | }; |
| 247 | #endif |
| 248 | |
| 249 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) |
| 250 | static struct bfin5xx_spi_chip spi_ad7879_chip_info = { |
| 251 | .enable_dma = 0, |
| 252 | .bits_per_word = 16, |
| 253 | }; |
| 254 | #endif |
| 255 | |
| 256 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
| 257 | #include <asm/bfin-lq035q1.h> |
| 258 | |
| 259 | static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = { |
| 260 | .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB, |
| 261 | .use_bl = 0, /* let something else control the LCD Blacklight */ |
| 262 | .gpio_bl = GPIO_PF7, |
| 263 | }; |
| 264 | |
| 265 | static struct resource bfin_lq035q1_resources[] = { |
| 266 | { |
| 267 | .start = IRQ_PPI_ERROR, |
| 268 | .end = IRQ_PPI_ERROR, |
| 269 | .flags = IORESOURCE_IRQ, |
| 270 | }, |
| 271 | }; |
| 272 | |
| 273 | static struct platform_device bfin_lq035q1_device = { |
| 274 | .name = "bfin-lq035q1", |
| 275 | .id = -1, |
| 276 | .num_resources = ARRAY_SIZE(bfin_lq035q1_resources), |
| 277 | .resource = bfin_lq035q1_resources, |
| 278 | .dev = { |
| 279 | .platform_data = &bfin_lq035q1_data, |
| 280 | }, |
| 281 | }; |
| 282 | #endif |
| 283 | |
| 284 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
| 285 | static struct bfin5xx_spi_chip spidev_chip_info = { |
| 286 | .enable_dma = 0, |
| 287 | .bits_per_word = 8, |
| 288 | }; |
| 289 | #endif |
| 290 | |
| 291 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
| 292 | static struct bfin5xx_spi_chip lq035q1_spi_chip_info = { |
| 293 | .enable_dma = 0, |
| 294 | .bits_per_word = 8, |
| 295 | }; |
| 296 | #endif |
| 297 | |
| 298 | static struct spi_board_info bf538_spi_board_info[] __initdata = { |
| 299 | #if defined(CONFIG_MTD_M25P80) \ |
| 300 | || defined(CONFIG_MTD_M25P80_MODULE) |
| 301 | { |
| 302 | /* the modalias must be the same as spi device driver name */ |
| 303 | .modalias = "m25p80", /* Name of spi_driver for this device */ |
| 304 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| 305 | .bus_num = 0, /* Framework bus number */ |
| 306 | .chip_select = 1, /* SPI_SSEL1*/ |
| 307 | .platform_data = &bfin_spi_flash_data, |
| 308 | .controller_data = &spi_flash_chip_info, |
| 309 | .mode = SPI_MODE_3, |
| 310 | }, |
| 311 | #endif |
| 312 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) |
| 313 | { |
| 314 | .modalias = "ad7879", |
| 315 | .platform_data = &bfin_ad7879_ts_info, |
| 316 | .irq = IRQ_PF3, |
| 317 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ |
| 318 | .bus_num = 0, |
| 319 | .chip_select = 1, |
| 320 | .controller_data = &spi_ad7879_chip_info, |
| 321 | .mode = SPI_CPHA | SPI_CPOL, |
| 322 | }, |
| 323 | #endif |
| 324 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
| 325 | { |
| 326 | .modalias = "bfin-lq035q1-spi", |
| 327 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
| 328 | .bus_num = 0, |
| 329 | .chip_select = 2, |
| 330 | .controller_data = &lq035q1_spi_chip_info, |
| 331 | .mode = SPI_CPHA | SPI_CPOL, |
| 332 | }, |
| 333 | #endif |
| 334 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
| 335 | { |
| 336 | .modalias = "spidev", |
| 337 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
| 338 | .bus_num = 0, |
| 339 | .chip_select = 1, |
| 340 | .controller_data = &spidev_chip_info, |
| 341 | }, |
| 342 | #endif |
| 343 | }; |
| 344 | |
| 345 | /* SPI (0) */ |
| 346 | static struct resource bfin_spi0_resource[] = { |
| 347 | [0] = { |
| 348 | .start = SPI0_REGBASE, |
| 349 | .end = SPI0_REGBASE + 0xFF, |
| 350 | .flags = IORESOURCE_MEM, |
| 351 | }, |
| 352 | [1] = { |
| 353 | .start = CH_SPI0, |
| 354 | .end = CH_SPI0, |
Yi Li | 5312269 | 2009-06-05 12:11:11 +0000 | [diff] [blame^] | 355 | .flags = IORESOURCE_DMA, |
| 356 | }, |
| 357 | [2] = { |
| 358 | .start = IRQ_SPI0, |
| 359 | .end = IRQ_SPI0, |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 360 | .flags = IORESOURCE_IRQ, |
| 361 | } |
| 362 | }; |
| 363 | |
| 364 | /* SPI (1) */ |
| 365 | static struct resource bfin_spi1_resource[] = { |
| 366 | [0] = { |
| 367 | .start = SPI1_REGBASE, |
| 368 | .end = SPI1_REGBASE + 0xFF, |
| 369 | .flags = IORESOURCE_MEM, |
| 370 | }, |
| 371 | [1] = { |
| 372 | .start = CH_SPI1, |
| 373 | .end = CH_SPI1, |
Yi Li | 5312269 | 2009-06-05 12:11:11 +0000 | [diff] [blame^] | 374 | .flags = IORESOURCE_DMA, |
| 375 | }, |
| 376 | [2] = { |
| 377 | .start = IRQ_SPI1, |
| 378 | .end = IRQ_SPI1, |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 379 | .flags = IORESOURCE_IRQ, |
| 380 | } |
| 381 | }; |
| 382 | |
| 383 | /* SPI (2) */ |
| 384 | static struct resource bfin_spi2_resource[] = { |
| 385 | [0] = { |
| 386 | .start = SPI2_REGBASE, |
| 387 | .end = SPI2_REGBASE + 0xFF, |
| 388 | .flags = IORESOURCE_MEM, |
| 389 | }, |
| 390 | [1] = { |
| 391 | .start = CH_SPI2, |
| 392 | .end = CH_SPI2, |
| 393 | .flags = IORESOURCE_IRQ, |
| 394 | } |
| 395 | }; |
| 396 | |
| 397 | /* SPI controller data */ |
| 398 | static struct bfin5xx_spi_master bf538_spi_master_info0 = { |
| 399 | .num_chipselect = 8, |
| 400 | .enable_dma = 1, /* master has the ability to do dma transfer */ |
| 401 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
| 402 | }; |
| 403 | |
| 404 | static struct platform_device bf538_spi_master0 = { |
| 405 | .name = "bfin-spi", |
| 406 | .id = 0, /* Bus number */ |
| 407 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), |
| 408 | .resource = bfin_spi0_resource, |
| 409 | .dev = { |
| 410 | .platform_data = &bf538_spi_master_info0, /* Passed to driver */ |
| 411 | }, |
| 412 | }; |
| 413 | |
| 414 | static struct bfin5xx_spi_master bf538_spi_master_info1 = { |
| 415 | .num_chipselect = 8, |
| 416 | .enable_dma = 1, /* master has the ability to do dma transfer */ |
| 417 | .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0}, |
| 418 | }; |
| 419 | |
| 420 | static struct platform_device bf538_spi_master1 = { |
| 421 | .name = "bfin-spi", |
| 422 | .id = 1, /* Bus number */ |
| 423 | .num_resources = ARRAY_SIZE(bfin_spi1_resource), |
| 424 | .resource = bfin_spi1_resource, |
| 425 | .dev = { |
| 426 | .platform_data = &bf538_spi_master_info1, /* Passed to driver */ |
| 427 | }, |
| 428 | }; |
| 429 | |
| 430 | static struct bfin5xx_spi_master bf538_spi_master_info2 = { |
| 431 | .num_chipselect = 8, |
| 432 | .enable_dma = 1, /* master has the ability to do dma transfer */ |
| 433 | .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0}, |
| 434 | }; |
| 435 | |
| 436 | static struct platform_device bf538_spi_master2 = { |
| 437 | .name = "bfin-spi", |
| 438 | .id = 2, /* Bus number */ |
| 439 | .num_resources = ARRAY_SIZE(bfin_spi2_resource), |
| 440 | .resource = bfin_spi2_resource, |
| 441 | .dev = { |
| 442 | .platform_data = &bf538_spi_master_info2, /* Passed to driver */ |
| 443 | }, |
| 444 | }; |
| 445 | |
| 446 | #endif /* spi master and devices */ |
| 447 | |
| 448 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
| 449 | static struct resource bfin_twi0_resource[] = { |
| 450 | [0] = { |
| 451 | .start = TWI0_REGBASE, |
| 452 | .end = TWI0_REGBASE + 0xFF, |
| 453 | .flags = IORESOURCE_MEM, |
| 454 | }, |
| 455 | [1] = { |
| 456 | .start = IRQ_TWI0, |
| 457 | .end = IRQ_TWI0, |
| 458 | .flags = IORESOURCE_IRQ, |
| 459 | }, |
| 460 | }; |
| 461 | |
| 462 | static struct platform_device i2c_bfin_twi0_device = { |
| 463 | .name = "i2c-bfin-twi", |
| 464 | .id = 0, |
| 465 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), |
| 466 | .resource = bfin_twi0_resource, |
| 467 | }; |
| 468 | |
| 469 | #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */ |
| 470 | static struct resource bfin_twi1_resource[] = { |
| 471 | [0] = { |
| 472 | .start = TWI1_REGBASE, |
| 473 | .end = TWI1_REGBASE + 0xFF, |
| 474 | .flags = IORESOURCE_MEM, |
| 475 | }, |
| 476 | [1] = { |
| 477 | .start = IRQ_TWI1, |
| 478 | .end = IRQ_TWI1, |
| 479 | .flags = IORESOURCE_IRQ, |
| 480 | }, |
| 481 | }; |
| 482 | |
| 483 | static struct platform_device i2c_bfin_twi1_device = { |
| 484 | .name = "i2c-bfin-twi", |
| 485 | .id = 1, |
| 486 | .num_resources = ARRAY_SIZE(bfin_twi1_resource), |
| 487 | .resource = bfin_twi1_resource, |
| 488 | }; |
| 489 | #endif |
| 490 | #endif |
| 491 | |
Mike Frysinger | c97618d | 2009-01-07 23:14:38 +0800 | [diff] [blame] | 492 | static struct resource bfin_gpios_resources = { |
| 493 | .start = 0, |
| 494 | .end = MAX_BLACKFIN_GPIOS - 1, |
| 495 | .flags = IORESOURCE_IRQ, |
| 496 | }; |
| 497 | |
| 498 | static struct platform_device bfin_gpios_device = { |
| 499 | .name = "simple-gpio", |
| 500 | .id = -1, |
| 501 | .num_resources = 1, |
| 502 | .resource = &bfin_gpios_resources, |
| 503 | }; |
| 504 | |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 505 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
| 506 | #include <linux/gpio_keys.h> |
| 507 | |
| 508 | static struct gpio_keys_button bfin_gpio_keys_table[] = { |
| 509 | {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"}, |
| 510 | }; |
| 511 | |
| 512 | static struct gpio_keys_platform_data bfin_gpio_keys_data = { |
| 513 | .buttons = bfin_gpio_keys_table, |
| 514 | .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), |
| 515 | }; |
| 516 | |
| 517 | static struct platform_device bfin_device_gpiokeys = { |
| 518 | .name = "gpio-keys", |
| 519 | .dev = { |
| 520 | .platform_data = &bfin_gpio_keys_data, |
| 521 | }, |
| 522 | }; |
| 523 | #endif |
| 524 | |
| 525 | static const unsigned int cclk_vlev_datasheet[] = |
| 526 | { |
| 527 | /* |
| 528 | * Internal VLEV BF538SBBC1533 |
| 529 | ****temporarily using these values until data sheet is updated |
| 530 | */ |
| 531 | VRPAIR(VLEV_100, 150000000), |
| 532 | VRPAIR(VLEV_100, 250000000), |
| 533 | VRPAIR(VLEV_110, 276000000), |
| 534 | VRPAIR(VLEV_115, 301000000), |
| 535 | VRPAIR(VLEV_120, 525000000), |
| 536 | VRPAIR(VLEV_125, 550000000), |
| 537 | VRPAIR(VLEV_130, 600000000), |
| 538 | }; |
| 539 | |
| 540 | static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { |
| 541 | .tuple_tab = cclk_vlev_datasheet, |
| 542 | .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), |
| 543 | .vr_settling_time = 25 /* us */, |
| 544 | }; |
| 545 | |
| 546 | static struct platform_device bfin_dpmc = { |
| 547 | .name = "bfin dpmc", |
| 548 | .dev = { |
| 549 | .platform_data = &bfin_dmpc_vreg_data, |
| 550 | }, |
| 551 | }; |
| 552 | |
| 553 | static struct platform_device *cm_bf538_devices[] __initdata = { |
| 554 | |
| 555 | &bfin_dpmc, |
| 556 | |
| 557 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
| 558 | &rtc_device, |
| 559 | #endif |
| 560 | |
| 561 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| 562 | &bfin_uart_device, |
| 563 | #endif |
| 564 | |
| 565 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 566 | &bf538_spi_master0, |
| 567 | &bf538_spi_master1, |
| 568 | &bf538_spi_master2, |
| 569 | #endif |
| 570 | |
| 571 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
| 572 | &i2c_bfin_twi0_device, |
| 573 | &i2c_bfin_twi1_device, |
| 574 | #endif |
| 575 | |
| 576 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 577 | #ifdef CONFIG_BFIN_SIR0 |
| 578 | &bfin_sir0_device, |
| 579 | #endif |
| 580 | #ifdef CONFIG_BFIN_SIR1 |
| 581 | &bfin_sir1_device, |
| 582 | #endif |
| 583 | #ifdef CONFIG_BFIN_SIR2 |
| 584 | &bfin_sir2_device, |
| 585 | #endif |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 586 | #endif |
| 587 | |
| 588 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
| 589 | &smc91x_device, |
| 590 | #endif |
| 591 | |
| 592 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
| 593 | &bfin_lq035q1_device, |
| 594 | #endif |
| 595 | |
| 596 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
| 597 | &bfin_device_gpiokeys, |
| 598 | #endif |
Mike Frysinger | c97618d | 2009-01-07 23:14:38 +0800 | [diff] [blame] | 599 | |
| 600 | &bfin_gpios_device, |
Michael Hennerich | dc26aec | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 601 | }; |
| 602 | |
| 603 | static int __init ezkit_init(void) |
| 604 | { |
| 605 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
| 606 | platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices)); |
| 607 | |
| 608 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 609 | spi_register_board_info(bf538_spi_board_info, |
| 610 | ARRAY_SIZE(bf538_spi_board_info)); |
| 611 | #endif |
| 612 | |
| 613 | return 0; |
| 614 | } |
| 615 | |
| 616 | arch_initcall(ezkit_init); |