blob: 6b24f2544b6b681d8df21de0410294376f7275c0 [file] [log] [blame]
Chris Wilson688e6c72016-07-01 17:23:15 +01001/*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
Chris Wilsonc81d4612016-07-01 17:23:25 +010025#include <linux/kthread.h>
26
Chris Wilson688e6c72016-07-01 17:23:15 +010027#include "i915_drv.h"
28
Chris Wilson83348ba2016-08-09 17:47:51 +010029static void intel_breadcrumbs_hangcheck(unsigned long data)
30{
31 struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
32 struct intel_breadcrumbs *b = &engine->breadcrumbs;
33
34 if (!b->irq_enabled)
35 return;
36
37 if (time_before(jiffies, b->timeout)) {
38 mod_timer(&b->hangcheck, b->timeout);
39 return;
40 }
41
42 DRM_DEBUG("Hangcheck timer elapsed... %s idle\n", engine->name);
43 set_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
44 mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
45
46 /* Ensure that even if the GPU hangs, we get woken up.
47 *
48 * However, note that if no one is waiting, we never notice
49 * a gpu hang. Eventually, we will have to wait for a resource
50 * held by the GPU and so trigger a hangcheck. In the most
51 * pathological case, this will be upon memory starvation! To
52 * prevent this, we also queue the hangcheck from the retire
53 * worker.
54 */
55 i915_queue_hangcheck(engine->i915);
56}
57
58static unsigned long wait_timeout(void)
59{
60 return round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES);
61}
62
Chris Wilson688e6c72016-07-01 17:23:15 +010063static void intel_breadcrumbs_fake_irq(unsigned long data)
64{
65 struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
66
67 /*
68 * The timer persists in case we cannot enable interrupts,
69 * or if we have previously seen seqno/interrupt incoherency
70 * ("missed interrupt" syndrome). Here the worker will wake up
71 * every jiffie in order to kick the oldest waiter to do the
72 * coherent seqno check.
73 */
Chris Wilson688e6c72016-07-01 17:23:15 +010074 if (intel_engine_wakeup(engine))
75 mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
Chris Wilson688e6c72016-07-01 17:23:15 +010076}
77
78static void irq_enable(struct intel_engine_cs *engine)
79{
Chris Wilson3d5564e2016-07-01 17:23:23 +010080 /* Enabling the IRQ may miss the generation of the interrupt, but
81 * we still need to force the barrier before reading the seqno,
82 * just in case.
83 */
Chris Wilson538b2572017-01-24 15:18:05 +000084 set_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
Chris Wilson31bb59c2016-07-01 17:23:27 +010085
Chris Wilsonf6168e32016-10-28 13:58:55 +010086 /* Caller disables interrupts */
87 spin_lock(&engine->i915->irq_lock);
Chris Wilson31bb59c2016-07-01 17:23:27 +010088 engine->irq_enable(engine);
Chris Wilsonf6168e32016-10-28 13:58:55 +010089 spin_unlock(&engine->i915->irq_lock);
Chris Wilson688e6c72016-07-01 17:23:15 +010090}
91
92static void irq_disable(struct intel_engine_cs *engine)
93{
Chris Wilsonf6168e32016-10-28 13:58:55 +010094 /* Caller disables interrupts */
95 spin_lock(&engine->i915->irq_lock);
Chris Wilson31bb59c2016-07-01 17:23:27 +010096 engine->irq_disable(engine);
Chris Wilsonf6168e32016-10-28 13:58:55 +010097 spin_unlock(&engine->i915->irq_lock);
Chris Wilson688e6c72016-07-01 17:23:15 +010098}
99
Chris Wilson04171312016-07-06 12:39:00 +0100100static void __intel_breadcrumbs_enable_irq(struct intel_breadcrumbs *b)
Chris Wilson688e6c72016-07-01 17:23:15 +0100101{
102 struct intel_engine_cs *engine =
103 container_of(b, struct intel_engine_cs, breadcrumbs);
104 struct drm_i915_private *i915 = engine->i915;
Chris Wilson688e6c72016-07-01 17:23:15 +0100105
106 assert_spin_locked(&b->lock);
107 if (b->rpm_wakelock)
Chris Wilson04171312016-07-06 12:39:00 +0100108 return;
Chris Wilson688e6c72016-07-01 17:23:15 +0100109
110 /* Since we are waiting on a request, the GPU should be busy
111 * and should have its own rpm reference. For completeness,
112 * record an rpm reference for ourselves to cover the
113 * interrupt we unmask.
114 */
115 intel_runtime_pm_get_noresume(i915);
116 b->rpm_wakelock = true;
117
118 /* No interrupts? Kick the waiter every jiffie! */
119 if (intel_irqs_enabled(i915)) {
Chris Wilson3d5564e2016-07-01 17:23:23 +0100120 if (!test_bit(engine->id, &i915->gpu_error.test_irq_rings))
Chris Wilson688e6c72016-07-01 17:23:15 +0100121 irq_enable(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100122 b->irq_enabled = true;
123 }
124
125 if (!b->irq_enabled ||
Chris Wilson83348ba2016-08-09 17:47:51 +0100126 test_bit(engine->id, &i915->gpu_error.missed_irq_rings)) {
Chris Wilson688e6c72016-07-01 17:23:15 +0100127 mod_timer(&b->fake_irq, jiffies + 1);
Chris Wilson2f1ac9c2017-01-23 09:37:24 +0000128 i915_queue_hangcheck(i915);
Chris Wilson83348ba2016-08-09 17:47:51 +0100129 } else {
130 /* Ensure we never sleep indefinitely */
131 GEM_BUG_ON(!time_after(b->timeout, jiffies));
132 mod_timer(&b->hangcheck, b->timeout);
133 }
Chris Wilson688e6c72016-07-01 17:23:15 +0100134}
135
136static void __intel_breadcrumbs_disable_irq(struct intel_breadcrumbs *b)
137{
138 struct intel_engine_cs *engine =
139 container_of(b, struct intel_engine_cs, breadcrumbs);
140
141 assert_spin_locked(&b->lock);
142 if (!b->rpm_wakelock)
143 return;
144
145 if (b->irq_enabled) {
146 irq_disable(engine);
147 b->irq_enabled = false;
148 }
149
150 intel_runtime_pm_put(engine->i915);
151 b->rpm_wakelock = false;
152}
153
154static inline struct intel_wait *to_wait(struct rb_node *node)
155{
Chris Wilsond8567862016-12-20 10:40:03 +0000156 return rb_entry(node, struct intel_wait, node);
Chris Wilson688e6c72016-07-01 17:23:15 +0100157}
158
159static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
160 struct intel_wait *wait)
161{
162 assert_spin_locked(&b->lock);
163
164 /* This request is completed, so remove it from the tree, mark it as
165 * complete, and *then* wake up the associated task.
166 */
167 rb_erase(&wait->node, &b->waiters);
168 RB_CLEAR_NODE(&wait->node);
169
170 wake_up_process(wait->tsk); /* implicit smp_wmb() */
171}
172
173static bool __intel_engine_add_wait(struct intel_engine_cs *engine,
174 struct intel_wait *wait)
175{
176 struct intel_breadcrumbs *b = &engine->breadcrumbs;
177 struct rb_node **p, *parent, *completed;
178 bool first;
179 u32 seqno;
180
181 /* Insert the request into the retirement ordered list
182 * of waiters by walking the rbtree. If we are the oldest
183 * seqno in the tree (the first to be retired), then
184 * set ourselves as the bottom-half.
185 *
186 * As we descend the tree, prune completed branches since we hold the
187 * spinlock we know that the first_waiter must be delayed and can
188 * reduce some of the sequential wake up latency if we take action
189 * ourselves and wake up the completed tasks in parallel. Also, by
190 * removing stale elements in the tree, we may be able to reduce the
191 * ping-pong between the old bottom-half and ourselves as first-waiter.
192 */
193 first = true;
194 parent = NULL;
195 completed = NULL;
Chris Wilson1b7744e2016-07-01 17:23:17 +0100196 seqno = intel_engine_get_seqno(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100197
198 /* If the request completed before we managed to grab the spinlock,
199 * return now before adding ourselves to the rbtree. We let the
200 * current bottom-half handle any pending wakeups and instead
201 * try and get out of the way quickly.
202 */
203 if (i915_seqno_passed(seqno, wait->seqno)) {
204 RB_CLEAR_NODE(&wait->node);
205 return first;
206 }
207
208 p = &b->waiters.rb_node;
209 while (*p) {
210 parent = *p;
211 if (wait->seqno == to_wait(parent)->seqno) {
212 /* We have multiple waiters on the same seqno, select
213 * the highest priority task (that with the smallest
214 * task->prio) to serve as the bottom-half for this
215 * group.
216 */
217 if (wait->tsk->prio > to_wait(parent)->tsk->prio) {
218 p = &parent->rb_right;
219 first = false;
220 } else {
221 p = &parent->rb_left;
222 }
223 } else if (i915_seqno_passed(wait->seqno,
224 to_wait(parent)->seqno)) {
225 p = &parent->rb_right;
226 if (i915_seqno_passed(seqno, to_wait(parent)->seqno))
227 completed = parent;
228 else
229 first = false;
230 } else {
231 p = &parent->rb_left;
232 }
233 }
234 rb_link_node(&wait->node, parent, p);
235 rb_insert_color(&wait->node, &b->waiters);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100236 GEM_BUG_ON(!first && !rcu_access_pointer(b->irq_seqno_bh));
Chris Wilson688e6c72016-07-01 17:23:15 +0100237
238 if (completed) {
239 struct rb_node *next = rb_next(completed);
240
241 GEM_BUG_ON(!next && !first);
242 if (next && next != &wait->node) {
243 GEM_BUG_ON(first);
Chris Wilson83348ba2016-08-09 17:47:51 +0100244 b->timeout = wait_timeout();
Chris Wilson688e6c72016-07-01 17:23:15 +0100245 b->first_wait = to_wait(next);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100246 rcu_assign_pointer(b->irq_seqno_bh, b->first_wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100247 /* As there is a delay between reading the current
248 * seqno, processing the completed tasks and selecting
249 * the next waiter, we may have missed the interrupt
250 * and so need for the next bottom-half to wakeup.
251 *
252 * Also as we enable the IRQ, we may miss the
253 * interrupt for that seqno, so we have to wake up
254 * the next bottom-half in order to do a coherent check
255 * in case the seqno passed.
256 */
257 __intel_breadcrumbs_enable_irq(b);
Chris Wilson538b2572017-01-24 15:18:05 +0000258 if (test_bit(ENGINE_IRQ_BREADCRUMB,
259 &engine->irq_posted))
Chris Wilson3d5564e2016-07-01 17:23:23 +0100260 wake_up_process(to_wait(next)->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100261 }
262
263 do {
264 struct intel_wait *crumb = to_wait(completed);
265 completed = rb_prev(completed);
266 __intel_breadcrumbs_finish(b, crumb);
267 } while (completed);
268 }
269
270 if (first) {
271 GEM_BUG_ON(rb_first(&b->waiters) != &wait->node);
Chris Wilson83348ba2016-08-09 17:47:51 +0100272 b->timeout = wait_timeout();
Chris Wilson688e6c72016-07-01 17:23:15 +0100273 b->first_wait = wait;
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100274 rcu_assign_pointer(b->irq_seqno_bh, wait->tsk);
Chris Wilson04171312016-07-06 12:39:00 +0100275 /* After assigning ourselves as the new bottom-half, we must
276 * perform a cursory check to prevent a missed interrupt.
277 * Either we miss the interrupt whilst programming the hardware,
278 * or if there was a previous waiter (for a later seqno) they
279 * may be woken instead of us (due to the inherent race
Chris Wilsonaca34b62016-07-06 12:39:02 +0100280 * in the unlocked read of b->irq_seqno_bh in the irq handler)
281 * and so we miss the wake up.
Chris Wilson04171312016-07-06 12:39:00 +0100282 */
283 __intel_breadcrumbs_enable_irq(b);
Chris Wilson688e6c72016-07-01 17:23:15 +0100284 }
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100285 GEM_BUG_ON(!rcu_access_pointer(b->irq_seqno_bh));
Chris Wilson688e6c72016-07-01 17:23:15 +0100286 GEM_BUG_ON(!b->first_wait);
287 GEM_BUG_ON(rb_first(&b->waiters) != &b->first_wait->node);
288
289 return first;
290}
291
292bool intel_engine_add_wait(struct intel_engine_cs *engine,
293 struct intel_wait *wait)
294{
295 struct intel_breadcrumbs *b = &engine->breadcrumbs;
296 bool first;
297
Chris Wilsonf6168e32016-10-28 13:58:55 +0100298 spin_lock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100299 first = __intel_engine_add_wait(engine, wait);
Chris Wilsonf6168e32016-10-28 13:58:55 +0100300 spin_unlock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100301
302 return first;
303}
304
Chris Wilson688e6c72016-07-01 17:23:15 +0100305static inline bool chain_wakeup(struct rb_node *rb, int priority)
306{
307 return rb && to_wait(rb)->tsk->prio <= priority;
308}
309
Chris Wilsonc81d4612016-07-01 17:23:25 +0100310static inline int wakeup_priority(struct intel_breadcrumbs *b,
311 struct task_struct *tsk)
312{
313 if (tsk == b->signaler)
314 return INT_MIN;
315 else
316 return tsk->prio;
317}
318
Chris Wilson688e6c72016-07-01 17:23:15 +0100319void intel_engine_remove_wait(struct intel_engine_cs *engine,
320 struct intel_wait *wait)
321{
322 struct intel_breadcrumbs *b = &engine->breadcrumbs;
323
324 /* Quick check to see if this waiter was already decoupled from
325 * the tree by the bottom-half to avoid contention on the spinlock
326 * by the herd.
327 */
328 if (RB_EMPTY_NODE(&wait->node))
329 return;
330
Chris Wilsonf6168e32016-10-28 13:58:55 +0100331 spin_lock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100332
333 if (RB_EMPTY_NODE(&wait->node))
334 goto out_unlock;
335
336 if (b->first_wait == wait) {
Chris Wilsonc81d4612016-07-01 17:23:25 +0100337 const int priority = wakeup_priority(b, wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100338 struct rb_node *next;
Chris Wilson688e6c72016-07-01 17:23:15 +0100339
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100340 GEM_BUG_ON(rcu_access_pointer(b->irq_seqno_bh) != wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100341
342 /* We are the current bottom-half. Find the next candidate,
343 * the first waiter in the queue on the remaining oldest
344 * request. As multiple seqnos may complete in the time it
345 * takes us to wake up and find the next waiter, we have to
346 * wake up that waiter for it to perform its own coherent
347 * completion check.
348 */
349 next = rb_next(&wait->node);
350 if (chain_wakeup(next, priority)) {
351 /* If the next waiter is already complete,
352 * wake it up and continue onto the next waiter. So
353 * if have a small herd, they will wake up in parallel
354 * rather than sequentially, which should reduce
355 * the overall latency in waking all the completed
356 * clients.
357 *
358 * However, waking up a chain adds extra latency to
359 * the first_waiter. This is undesirable if that
360 * waiter is a high priority task.
361 */
Chris Wilson1b7744e2016-07-01 17:23:17 +0100362 u32 seqno = intel_engine_get_seqno(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100363
364 while (i915_seqno_passed(seqno, to_wait(next)->seqno)) {
365 struct rb_node *n = rb_next(next);
366
367 __intel_breadcrumbs_finish(b, to_wait(next));
368 next = n;
369 if (!chain_wakeup(next, priority))
370 break;
371 }
372 }
373
374 if (next) {
375 /* In our haste, we may have completed the first waiter
376 * before we enabled the interrupt. Do so now as we
377 * have a second waiter for a future seqno. Afterwards,
378 * we have to wake up that waiter in case we missed
379 * the interrupt, or if we have to handle an
380 * exception rather than a seqno completion.
381 */
Chris Wilson83348ba2016-08-09 17:47:51 +0100382 b->timeout = wait_timeout();
Chris Wilson688e6c72016-07-01 17:23:15 +0100383 b->first_wait = to_wait(next);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100384 rcu_assign_pointer(b->irq_seqno_bh, b->first_wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100385 if (b->first_wait->seqno != wait->seqno)
386 __intel_breadcrumbs_enable_irq(b);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100387 wake_up_process(b->first_wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100388 } else {
389 b->first_wait = NULL;
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100390 rcu_assign_pointer(b->irq_seqno_bh, NULL);
Chris Wilson688e6c72016-07-01 17:23:15 +0100391 __intel_breadcrumbs_disable_irq(b);
392 }
393 } else {
394 GEM_BUG_ON(rb_first(&b->waiters) == &wait->node);
395 }
396
397 GEM_BUG_ON(RB_EMPTY_NODE(&wait->node));
398 rb_erase(&wait->node, &b->waiters);
399
400out_unlock:
401 GEM_BUG_ON(b->first_wait == wait);
402 GEM_BUG_ON(rb_first(&b->waiters) !=
403 (b->first_wait ? &b->first_wait->node : NULL));
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100404 GEM_BUG_ON(!rcu_access_pointer(b->irq_seqno_bh) ^ RB_EMPTY_ROOT(&b->waiters));
Chris Wilsonf6168e32016-10-28 13:58:55 +0100405 spin_unlock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100406}
407
Chris Wilsonb3850852016-07-01 17:23:26 +0100408static bool signal_complete(struct drm_i915_gem_request *request)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100409{
Chris Wilsonb3850852016-07-01 17:23:26 +0100410 if (!request)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100411 return false;
412
413 /* If another process served as the bottom-half it may have already
414 * signalled that this wait is already completed.
415 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100416 if (intel_wait_complete(&request->signaling.wait))
Chris Wilsonc81d4612016-07-01 17:23:25 +0100417 return true;
418
419 /* Carefully check if the request is complete, giving time for the
420 * seqno to be visible or if the GPU hung.
421 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100422 if (__i915_request_irq_complete(request))
Chris Wilsonc81d4612016-07-01 17:23:25 +0100423 return true;
424
425 return false;
426}
427
Chris Wilsonb3850852016-07-01 17:23:26 +0100428static struct drm_i915_gem_request *to_signaler(struct rb_node *rb)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100429{
Chris Wilsond8567862016-12-20 10:40:03 +0000430 return rb_entry(rb, struct drm_i915_gem_request, signaling.node);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100431}
432
433static void signaler_set_rtpriority(void)
434{
435 struct sched_param param = { .sched_priority = 1 };
436
437 sched_setscheduler_nocheck(current, SCHED_FIFO, &param);
438}
439
440static int intel_breadcrumbs_signaler(void *arg)
441{
442 struct intel_engine_cs *engine = arg;
443 struct intel_breadcrumbs *b = &engine->breadcrumbs;
Chris Wilsonb3850852016-07-01 17:23:26 +0100444 struct drm_i915_gem_request *request;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100445
446 /* Install ourselves with high priority to reduce signalling latency */
447 signaler_set_rtpriority();
448
449 do {
450 set_current_state(TASK_INTERRUPTIBLE);
451
452 /* We are either woken up by the interrupt bottom-half,
453 * or by a client adding a new signaller. In both cases,
454 * the GPU seqno may have advanced beyond our oldest signal.
455 * If it has, propagate the signal, remove the waiter and
456 * check again with the next oldest signal. Otherwise we
457 * need to wait for a new interrupt from the GPU or for
458 * a new client.
459 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100460 request = READ_ONCE(b->first_signal);
461 if (signal_complete(request)) {
Chris Wilsonc81d4612016-07-01 17:23:25 +0100462 /* Wake up all other completed waiters and select the
463 * next bottom-half for the next user interrupt.
464 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100465 intel_engine_remove_wait(engine,
466 &request->signaling.wait);
Chris Wilson5590af32016-09-09 14:11:54 +0100467
468 local_bh_disable();
Chris Wilsonf54d1862016-10-25 13:00:45 +0100469 dma_fence_signal(&request->fence);
Chris Wilson5590af32016-09-09 14:11:54 +0100470 local_bh_enable(); /* kick start the tasklets */
Chris Wilsonc81d4612016-07-01 17:23:25 +0100471
472 /* Find the next oldest signal. Note that as we have
473 * not been holding the lock, another client may
474 * have installed an even older signal than the one
475 * we just completed - so double check we are still
476 * the oldest before picking the next one.
477 */
Chris Wilsonf6168e32016-10-28 13:58:55 +0100478 spin_lock_irq(&b->lock);
Chris Wilsonb3850852016-07-01 17:23:26 +0100479 if (request == b->first_signal) {
480 struct rb_node *rb =
481 rb_next(&request->signaling.node);
482 b->first_signal = rb ? to_signaler(rb) : NULL;
483 }
484 rb_erase(&request->signaling.node, &b->signals);
Chris Wilsonf6168e32016-10-28 13:58:55 +0100485 spin_unlock_irq(&b->lock);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100486
Chris Wilsone8a261e2016-07-20 13:31:49 +0100487 i915_gem_request_put(request);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100488 } else {
489 if (kthread_should_stop())
490 break;
491
492 schedule();
493 }
494 } while (1);
495 __set_current_state(TASK_RUNNING);
496
497 return 0;
498}
499
Chris Wilsonb3850852016-07-01 17:23:26 +0100500void intel_engine_enable_signaling(struct drm_i915_gem_request *request)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100501{
502 struct intel_engine_cs *engine = request->engine;
503 struct intel_breadcrumbs *b = &engine->breadcrumbs;
504 struct rb_node *parent, **p;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100505 bool first, wakeup;
506
Chris Wilsonf6168e32016-10-28 13:58:55 +0100507 /* Note that we may be called from an interrupt handler on another
508 * device (e.g. nouveau signaling a fence completion causing us
509 * to submit a request, and so enable signaling). As such,
510 * we need to make sure that all other users of b->lock protect
511 * against interrupts, i.e. use spin_lock_irqsave.
512 */
513
514 /* locked by dma_fence_enable_sw_signaling() (irqsafe fence->lock) */
Chris Wilson4a50d202016-07-26 12:01:50 +0100515 assert_spin_locked(&request->lock);
Chris Wilson65e47602016-10-28 13:58:49 +0100516 if (!request->global_seqno)
517 return;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100518
Chris Wilsonb3850852016-07-01 17:23:26 +0100519 request->signaling.wait.tsk = b->signaler;
Chris Wilson65e47602016-10-28 13:58:49 +0100520 request->signaling.wait.seqno = request->global_seqno;
Chris Wilsone8a261e2016-07-20 13:31:49 +0100521 i915_gem_request_get(request);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100522
Chris Wilson4a50d202016-07-26 12:01:50 +0100523 spin_lock(&b->lock);
524
Chris Wilsonc81d4612016-07-01 17:23:25 +0100525 /* First add ourselves into the list of waiters, but register our
526 * bottom-half as the signaller thread. As per usual, only the oldest
527 * waiter (not just signaller) is tasked as the bottom-half waking
528 * up all completed waiters after the user interrupt.
529 *
530 * If we are the oldest waiter, enable the irq (after which we
531 * must double check that the seqno did not complete).
532 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100533 wakeup = __intel_engine_add_wait(engine, &request->signaling.wait);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100534
535 /* Now insert ourselves into the retirement ordered list of signals
536 * on this engine. We track the oldest seqno as that will be the
537 * first signal to complete.
538 */
Chris Wilsonc81d4612016-07-01 17:23:25 +0100539 parent = NULL;
540 first = true;
541 p = &b->signals.rb_node;
542 while (*p) {
543 parent = *p;
Chris Wilson65e47602016-10-28 13:58:49 +0100544 if (i915_seqno_passed(request->global_seqno,
545 to_signaler(parent)->global_seqno)) {
Chris Wilsonc81d4612016-07-01 17:23:25 +0100546 p = &parent->rb_right;
547 first = false;
548 } else {
549 p = &parent->rb_left;
550 }
551 }
Chris Wilsonb3850852016-07-01 17:23:26 +0100552 rb_link_node(&request->signaling.node, parent, p);
553 rb_insert_color(&request->signaling.node, &b->signals);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100554 if (first)
Chris Wilsonb3850852016-07-01 17:23:26 +0100555 smp_store_mb(b->first_signal, request);
556
Chris Wilsonc81d4612016-07-01 17:23:25 +0100557 spin_unlock(&b->lock);
558
559 if (wakeup)
560 wake_up_process(b->signaler);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100561}
562
Chris Wilson688e6c72016-07-01 17:23:15 +0100563int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
564{
565 struct intel_breadcrumbs *b = &engine->breadcrumbs;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100566 struct task_struct *tsk;
Chris Wilson688e6c72016-07-01 17:23:15 +0100567
568 spin_lock_init(&b->lock);
569 setup_timer(&b->fake_irq,
570 intel_breadcrumbs_fake_irq,
571 (unsigned long)engine);
Chris Wilson83348ba2016-08-09 17:47:51 +0100572 setup_timer(&b->hangcheck,
573 intel_breadcrumbs_hangcheck,
574 (unsigned long)engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100575
Chris Wilsonc81d4612016-07-01 17:23:25 +0100576 /* Spawn a thread to provide a common bottom-half for all signals.
577 * As this is an asynchronous interface we cannot steal the current
578 * task for handling the bottom-half to the user interrupt, therefore
579 * we create a thread to do the coherent seqno dance after the
580 * interrupt and then signal the waitqueue (via the dma-buf/fence).
581 */
582 tsk = kthread_run(intel_breadcrumbs_signaler, engine,
583 "i915/signal:%d", engine->id);
584 if (IS_ERR(tsk))
585 return PTR_ERR(tsk);
586
587 b->signaler = tsk;
588
Chris Wilson688e6c72016-07-01 17:23:15 +0100589 return 0;
590}
591
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100592static void cancel_fake_irq(struct intel_engine_cs *engine)
593{
594 struct intel_breadcrumbs *b = &engine->breadcrumbs;
595
596 del_timer_sync(&b->hangcheck);
597 del_timer_sync(&b->fake_irq);
598 clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
599}
600
601void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
602{
603 struct intel_breadcrumbs *b = &engine->breadcrumbs;
604
605 cancel_fake_irq(engine);
Chris Wilsonf6168e32016-10-28 13:58:55 +0100606 spin_lock_irq(&b->lock);
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100607
608 __intel_breadcrumbs_disable_irq(b);
609 if (intel_engine_has_waiter(engine)) {
610 b->timeout = wait_timeout();
611 __intel_breadcrumbs_enable_irq(b);
Chris Wilson538b2572017-01-24 15:18:05 +0000612 if (test_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted))
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100613 wake_up_process(b->first_wait->tsk);
614 } else {
615 /* sanitize the IMR and unmask any auxiliary interrupts */
616 irq_disable(engine);
617 }
618
Chris Wilsonf6168e32016-10-28 13:58:55 +0100619 spin_unlock_irq(&b->lock);
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100620}
621
Chris Wilson688e6c72016-07-01 17:23:15 +0100622void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
623{
624 struct intel_breadcrumbs *b = &engine->breadcrumbs;
625
Chris Wilson381744f2016-11-21 11:07:59 +0000626 /* The engines should be idle and all requests accounted for! */
627 WARN_ON(READ_ONCE(b->first_wait));
628 WARN_ON(!RB_EMPTY_ROOT(&b->waiters));
629 WARN_ON(READ_ONCE(b->first_signal));
630 WARN_ON(!RB_EMPTY_ROOT(&b->signals));
631
Chris Wilsonc81d4612016-07-01 17:23:25 +0100632 if (!IS_ERR_OR_NULL(b->signaler))
633 kthread_stop(b->signaler);
634
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100635 cancel_fake_irq(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100636}
637
Chris Wilson6a5d1db2016-11-08 14:37:19 +0000638unsigned int intel_breadcrumbs_busy(struct drm_i915_private *i915)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100639{
640 struct intel_engine_cs *engine;
Akash Goel3b3f1652016-10-13 22:44:48 +0530641 enum intel_engine_id id;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100642 unsigned int mask = 0;
643
Akash Goel3b3f1652016-10-13 22:44:48 +0530644 for_each_engine(engine, i915, id) {
Chris Wilson6a5d1db2016-11-08 14:37:19 +0000645 struct intel_breadcrumbs *b = &engine->breadcrumbs;
646
647 spin_lock_irq(&b->lock);
648
649 if (b->first_wait) {
650 wake_up_process(b->first_wait->tsk);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100651 mask |= intel_engine_flag(engine);
652 }
Chris Wilson6a5d1db2016-11-08 14:37:19 +0000653
654 if (b->first_signal) {
655 wake_up_process(b->signaler);
656 mask |= intel_engine_flag(engine);
657 }
658
659 spin_unlock_irq(&b->lock);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100660 }
661
662 return mask;
663}