blob: 2a68fb9d8299e943ed6c832f4df51f86411524c3 [file] [log] [blame]
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001/* QLogic qed NIC Driver
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02002 * Copyright (c) 2015-2017 QLogic Corporation
Yuval Mintz0a7fb112016-10-01 21:59:55 +03003 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
Yuval Mintz0a7fb112016-10-01 21:59:55 +03009 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +020010 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Yuval Mintz0a7fb112016-10-01 21:59:55 +030031 */
32
33#include <linux/types.h>
34#include <asm/byteorder.h>
35#include <linux/dma-mapping.h>
36#include <linux/if_vlan.h>
37#include <linux/kernel.h>
38#include <linux/pci.h>
39#include <linux/slab.h>
40#include <linux/stddef.h>
Yuval Mintz0a7fb112016-10-01 21:59:55 +030041#include <linux/workqueue.h>
42#include <net/ipv6.h>
43#include <linux/bitops.h>
44#include <linux/delay.h>
45#include <linux/errno.h>
46#include <linux/etherdevice.h>
47#include <linux/io.h>
48#include <linux/list.h>
49#include <linux/mutex.h>
50#include <linux/spinlock.h>
51#include <linux/string.h>
52#include <linux/qed/qed_ll2_if.h>
53#include "qed.h"
54#include "qed_cxt.h"
55#include "qed_dev_api.h"
56#include "qed_hsi.h"
57#include "qed_hw.h"
58#include "qed_int.h"
59#include "qed_ll2.h"
60#include "qed_mcp.h"
Yuval Mintz1d6cff42016-12-01 00:21:07 -080061#include "qed_ooo.h"
Yuval Mintz0a7fb112016-10-01 21:59:55 +030062#include "qed_reg_addr.h"
63#include "qed_sp.h"
Yuval Mintz0189efb2016-10-13 22:57:02 +030064#include "qed_roce.h"
Yuval Mintz0a7fb112016-10-01 21:59:55 +030065
66#define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registred)
67#define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registred)
68
69#define QED_LL2_TX_SIZE (256)
70#define QED_LL2_RX_SIZE (4096)
71
72struct qed_cb_ll2_info {
73 int rx_cnt;
74 u32 rx_size;
75 u8 handle;
Yuval Mintz0a7fb112016-10-01 21:59:55 +030076
77 /* Lock protecting LL2 buffer lists in sleepless context */
78 spinlock_t lock;
79 struct list_head list;
80
81 const struct qed_ll2_cb_ops *cbs;
82 void *cb_cookie;
83};
84
85struct qed_ll2_buffer {
86 struct list_head list;
87 void *data;
88 dma_addr_t phys_addr;
89};
90
Michal Kalderon0518c122017-06-09 17:13:22 +030091static void qed_ll2b_complete_tx_packet(void *cxt,
Yuval Mintz0a7fb112016-10-01 21:59:55 +030092 u8 connection_handle,
93 void *cookie,
94 dma_addr_t first_frag_addr,
95 bool b_last_fragment,
96 bool b_last_packet)
97{
Michal Kalderon0518c122017-06-09 17:13:22 +030098 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +030099 struct qed_dev *cdev = p_hwfn->cdev;
100 struct sk_buff *skb = cookie;
101
102 /* All we need to do is release the mapping */
103 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr,
104 skb_headlen(skb), DMA_TO_DEVICE);
105
106 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb)
107 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb,
108 b_last_fragment);
109
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300110 dev_kfree_skb_any(skb);
111}
112
113static int qed_ll2_alloc_buffer(struct qed_dev *cdev,
114 u8 **data, dma_addr_t *phys_addr)
115{
116 *data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC);
117 if (!(*data)) {
118 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n");
119 return -ENOMEM;
120 }
121
122 *phys_addr = dma_map_single(&cdev->pdev->dev,
123 ((*data) + NET_SKB_PAD),
124 cdev->ll2->rx_size, DMA_FROM_DEVICE);
125 if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) {
126 DP_INFO(cdev, "Failed to map LL2 buffer data\n");
127 kfree((*data));
128 return -ENOMEM;
129 }
130
131 return 0;
132}
133
134static int qed_ll2_dealloc_buffer(struct qed_dev *cdev,
135 struct qed_ll2_buffer *buffer)
136{
137 spin_lock_bh(&cdev->ll2->lock);
138
139 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
140 cdev->ll2->rx_size, DMA_FROM_DEVICE);
141 kfree(buffer->data);
142 list_del(&buffer->list);
143
144 cdev->ll2->rx_cnt--;
145 if (!cdev->ll2->rx_cnt)
146 DP_INFO(cdev, "All LL2 entries were removed\n");
147
148 spin_unlock_bh(&cdev->ll2->lock);
149
150 return 0;
151}
152
153static void qed_ll2_kill_buffers(struct qed_dev *cdev)
154{
155 struct qed_ll2_buffer *buffer, *tmp_buffer;
156
157 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list)
158 qed_ll2_dealloc_buffer(cdev, buffer);
159}
160
Michal Kalderon0518c122017-06-09 17:13:22 +0300161void qed_ll2b_complete_rx_packet(void *cxt, struct qed_ll2_comp_rx_data *data)
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300162{
Michal Kalderon0518c122017-06-09 17:13:22 +0300163 struct qed_hwfn *p_hwfn = cxt;
Mintz, Yuval68be9102017-06-09 17:13:19 +0300164 struct qed_ll2_buffer *buffer = data->cookie;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300165 struct qed_dev *cdev = p_hwfn->cdev;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300166 dma_addr_t new_phys_addr;
167 struct sk_buff *skb;
168 bool reuse = false;
169 int rc = -EINVAL;
170 u8 *new_data;
171
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300172 DP_VERBOSE(p_hwfn,
173 (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA),
174 "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n",
Mintz, Yuval68be9102017-06-09 17:13:19 +0300175 (u64)data->rx_buf_addr,
176 data->u.placement_offset,
177 data->length.packet_length,
178 data->parse_flags,
179 data->vlan, data->opaque_data_0, data->opaque_data_1);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300180
181 if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) {
182 print_hex_dump(KERN_INFO, "",
183 DUMP_PREFIX_OFFSET, 16, 1,
Mintz, Yuval68be9102017-06-09 17:13:19 +0300184 buffer->data, data->length.packet_length, false);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300185 }
186
187 /* Determine if data is valid */
Mintz, Yuval68be9102017-06-09 17:13:19 +0300188 if (data->length.packet_length < ETH_HLEN)
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300189 reuse = true;
190
191 /* Allocate a replacement for buffer; Reuse upon failure */
192 if (!reuse)
193 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data,
194 &new_phys_addr);
195
196 /* If need to reuse or there's no replacement buffer, repost this */
197 if (rc)
198 goto out_post;
Mintz, Yuval752ecb22017-03-14 15:26:00 +0200199 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
200 cdev->ll2->rx_size, DMA_FROM_DEVICE);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300201
202 skb = build_skb(buffer->data, 0);
203 if (!skb) {
204 rc = -ENOMEM;
205 goto out_post;
206 }
207
Mintz, Yuval68be9102017-06-09 17:13:19 +0300208 data->u.placement_offset += NET_SKB_PAD;
209 skb_reserve(skb, data->u.placement_offset);
210 skb_put(skb, data->length.packet_length);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300211 skb_checksum_none_assert(skb);
212
213 /* Get parital ethernet information instead of eth_type_trans(),
214 * Since we don't have an associated net_device.
215 */
216 skb_reset_mac_header(skb);
217 skb->protocol = eth_hdr(skb)->h_proto;
218
219 /* Pass SKB onward */
220 if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) {
Mintz, Yuval68be9102017-06-09 17:13:19 +0300221 if (data->vlan)
222 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
223 data->vlan);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300224 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb,
Mintz, Yuval68be9102017-06-09 17:13:19 +0300225 data->opaque_data_0,
226 data->opaque_data_1);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300227 }
228
229 /* Update Buffer information and update FW producer */
230 buffer->data = new_data;
231 buffer->phys_addr = new_phys_addr;
232
233out_post:
234 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), cdev->ll2->handle,
235 buffer->phys_addr, 0, buffer, 1);
236
237 if (rc)
238 qed_ll2_dealloc_buffer(cdev, buffer);
239}
240
241static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
242 u8 connection_handle,
243 bool b_lock,
244 bool b_only_active)
245{
246 struct qed_ll2_info *p_ll2_conn, *p_ret = NULL;
247
248 if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS)
249 return NULL;
250
251 if (!p_hwfn->p_ll2_info)
252 return NULL;
253
254 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
255
256 if (b_only_active) {
257 if (b_lock)
258 mutex_lock(&p_ll2_conn->mutex);
259 if (p_ll2_conn->b_active)
260 p_ret = p_ll2_conn;
261 if (b_lock)
262 mutex_unlock(&p_ll2_conn->mutex);
263 } else {
264 p_ret = p_ll2_conn;
265 }
266
267 return p_ret;
268}
269
270static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
271 u8 connection_handle)
272{
273 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true);
274}
275
276static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn,
277 u8 connection_handle)
278{
279 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true);
280}
281
282static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn
283 *p_hwfn,
284 u8 connection_handle)
285{
286 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false);
287}
288
289static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
290{
291 bool b_last_packet = false, b_last_frag = false;
292 struct qed_ll2_tx_packet *p_pkt = NULL;
293 struct qed_ll2_info *p_ll2_conn;
294 struct qed_ll2_tx_queue *p_tx;
Ram Amraniabd49672016-10-01 22:00:01 +0300295 dma_addr_t tx_frag;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300296
297 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
298 if (!p_ll2_conn)
299 return;
300
301 p_tx = &p_ll2_conn->tx_queue;
302
303 while (!list_empty(&p_tx->active_descq)) {
304 p_pkt = list_first_entry(&p_tx->active_descq,
305 struct qed_ll2_tx_packet, list_entry);
306 if (!p_pkt)
307 break;
308
309 list_del(&p_pkt->list_entry);
310 b_last_packet = list_empty(&p_tx->active_descq);
311 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
Mintz, Yuval13c54772017-06-09 17:13:20 +0300312 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_ISCSI_OOO) {
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800313 struct qed_ooo_buffer *p_buffer;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300314
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800315 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
316 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
317 p_buffer);
318 } else {
319 p_tx->cur_completing_packet = *p_pkt;
320 p_tx->cur_completing_bd_idx = 1;
321 b_last_frag =
322 p_tx->cur_completing_bd_idx == p_pkt->bd_used;
323 tx_frag = p_pkt->bds_set[0].tx_frag;
Michal Kalderon0518c122017-06-09 17:13:22 +0300324 p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie,
325 p_ll2_conn->my_id,
326 p_pkt->cookie,
327 tx_frag,
328 b_last_frag,
329 b_last_packet);
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800330 }
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300331 }
332}
333
334static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
335{
336 struct qed_ll2_info *p_ll2_conn = p_cookie;
337 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
338 u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0;
339 struct qed_ll2_tx_packet *p_pkt;
340 bool b_last_frag = false;
341 unsigned long flags;
342 int rc = -EINVAL;
343
344 spin_lock_irqsave(&p_tx->lock, flags);
345 if (p_tx->b_completing_packet) {
346 rc = -EBUSY;
347 goto out;
348 }
349
350 new_idx = le16_to_cpu(*p_tx->p_fw_cons);
351 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
352 while (num_bds) {
353 if (list_empty(&p_tx->active_descq))
354 goto out;
355
356 p_pkt = list_first_entry(&p_tx->active_descq,
357 struct qed_ll2_tx_packet, list_entry);
358 if (!p_pkt)
359 goto out;
360
361 p_tx->b_completing_packet = true;
362 p_tx->cur_completing_packet = *p_pkt;
363 num_bds_in_packet = p_pkt->bd_used;
364 list_del(&p_pkt->list_entry);
365
366 if (num_bds < num_bds_in_packet) {
367 DP_NOTICE(p_hwfn,
368 "Rest of BDs does not cover whole packet\n");
369 goto out;
370 }
371
372 num_bds -= num_bds_in_packet;
373 p_tx->bds_idx += num_bds_in_packet;
374 while (num_bds_in_packet--)
375 qed_chain_consume(&p_tx->txq_chain);
376
377 p_tx->cur_completing_bd_idx = 1;
378 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used;
379 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
380
381 spin_unlock_irqrestore(&p_tx->lock, flags);
Michal Kalderon0518c122017-06-09 17:13:22 +0300382
383 p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie,
384 p_ll2_conn->my_id,
385 p_pkt->cookie,
386 p_pkt->bds_set[0].tx_frag,
387 b_last_frag, !num_bds);
388
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300389 spin_lock_irqsave(&p_tx->lock, flags);
390 }
391
392 p_tx->b_completing_packet = false;
393 rc = 0;
394out:
395 spin_unlock_irqrestore(&p_tx->lock, flags);
396 return rc;
397}
398
Michal Kalderon0518c122017-06-09 17:13:22 +0300399static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn,
400 union core_rx_cqe_union *p_cqe,
401 struct qed_ll2_comp_rx_data *data)
Ram Amraniabd49672016-10-01 22:00:01 +0300402{
Michal Kalderon0518c122017-06-09 17:13:22 +0300403 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags);
404 data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length);
405 data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan);
406 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi);
407 data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo);
408 data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error;
Ram Amraniabd49672016-10-01 22:00:01 +0300409}
410
Mintz, Yuval68be9102017-06-09 17:13:19 +0300411static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn,
412 union core_rx_cqe_union *p_cqe,
413 struct qed_ll2_comp_rx_data *data)
414{
415 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags);
416 data->length.packet_length =
417 le16_to_cpu(p_cqe->rx_cqe_fp.packet_length);
418 data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan);
419 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]);
420 data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]);
421 data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset;
422}
423
424static int
425qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn,
426 struct qed_ll2_info *p_ll2_conn,
427 union core_rx_cqe_union *p_cqe,
428 unsigned long *p_lock_flags, bool b_last_cqe)
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300429{
430 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
431 struct qed_ll2_rx_packet *p_pkt = NULL;
Mintz, Yuval68be9102017-06-09 17:13:19 +0300432 struct qed_ll2_comp_rx_data data;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300433
434 if (!list_empty(&p_rx->active_descq))
435 p_pkt = list_first_entry(&p_rx->active_descq,
436 struct qed_ll2_rx_packet, list_entry);
437 if (!p_pkt) {
438 DP_NOTICE(p_hwfn,
Mintz, Yuval68be9102017-06-09 17:13:19 +0300439 "[%d] LL2 Rx completion but active_descq is empty\n",
Mintz, Yuval13c54772017-06-09 17:13:20 +0300440 p_ll2_conn->input.conn_type);
Mintz, Yuval68be9102017-06-09 17:13:19 +0300441
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300442 return -EIO;
443 }
444 list_del(&p_pkt->list_entry);
445
Michal Kalderon0518c122017-06-09 17:13:22 +0300446 if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR)
447 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data);
448 else
449 qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300450 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd)
451 DP_NOTICE(p_hwfn,
452 "Mismatch between active_descq and the LL2 Rx chain\n");
Mintz, Yuval68be9102017-06-09 17:13:19 +0300453
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300454 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
455
Mintz, Yuval68be9102017-06-09 17:13:19 +0300456 data.connection_handle = p_ll2_conn->my_id;
457 data.cookie = p_pkt->cookie;
458 data.rx_buf_addr = p_pkt->rx_buf_addr;
459 data.b_last_packet = b_last_cqe;
460
Ram Amrani1df2ade2017-03-14 15:26:02 +0200461 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
Michal Kalderon0518c122017-06-09 17:13:22 +0300462 p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data);
463
Ram Amrani1df2ade2017-03-14 15:26:02 +0200464 spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300465
466 return 0;
467}
468
469static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie)
470{
Mintz, Yuval13c54772017-06-09 17:13:20 +0300471 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300472 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
473 union core_rx_cqe_union *cqe = NULL;
474 u16 cq_new_idx = 0, cq_old_idx = 0;
475 unsigned long flags = 0;
476 int rc = 0;
477
478 spin_lock_irqsave(&p_rx->lock, flags);
479 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
480 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
481
482 while (cq_new_idx != cq_old_idx) {
483 bool b_last_cqe = (cq_new_idx == cq_old_idx);
484
Mintz, Yuval13c54772017-06-09 17:13:20 +0300485 cqe =
486 (union core_rx_cqe_union *)
487 qed_chain_consume(&p_rx->rcq_chain);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300488 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
489
490 DP_VERBOSE(p_hwfn,
491 QED_MSG_LL2,
492 "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n",
493 cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type);
494
495 switch (cqe->rx_cqe_sp.type) {
496 case CORE_RX_CQE_TYPE_SLOW_PATH:
497 DP_NOTICE(p_hwfn, "LL2 - unexpected Rx CQE slowpath\n");
498 rc = -EINVAL;
499 break;
Ram Amraniabd49672016-10-01 22:00:01 +0300500 case CORE_RX_CQE_TYPE_GSI_OFFLOAD:
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300501 case CORE_RX_CQE_TYPE_REGULAR:
Mintz, Yuval68be9102017-06-09 17:13:19 +0300502 rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn,
503 cqe, &flags,
504 b_last_cqe);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300505 break;
506 default:
507 rc = -EIO;
508 }
509 }
510
511 spin_unlock_irqrestore(&p_rx->lock, flags);
512 return rc;
513}
514
Yuval Mintz8c93bea2016-10-13 22:57:03 +0300515static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300516{
517 struct qed_ll2_info *p_ll2_conn = NULL;
518 struct qed_ll2_rx_packet *p_pkt = NULL;
519 struct qed_ll2_rx_queue *p_rx;
520
521 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
522 if (!p_ll2_conn)
523 return;
524
525 p_rx = &p_ll2_conn->rx_queue;
526
527 while (!list_empty(&p_rx->active_descq)) {
528 dma_addr_t rx_buf_addr;
529 void *cookie;
530 bool b_last;
531
532 p_pkt = list_first_entry(&p_rx->active_descq,
533 struct qed_ll2_rx_packet, list_entry);
534 if (!p_pkt)
535 break;
536
Wei Yongjunb4f0fd42016-10-17 15:17:51 +0000537 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300538
Mintz, Yuval13c54772017-06-09 17:13:20 +0300539 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_ISCSI_OOO) {
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800540 struct qed_ooo_buffer *p_buffer;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300541
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800542 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
543 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
544 p_buffer);
545 } else {
546 rx_buf_addr = p_pkt->rx_buf_addr;
547 cookie = p_pkt->cookie;
548
549 b_last = list_empty(&p_rx->active_descq);
550 }
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300551 }
552}
553
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800554static u8 qed_ll2_convert_rx_parse_to_tx_flags(u16 parse_flags)
555{
556 u8 bd_flags = 0;
557
558 if (GET_FIELD(parse_flags, PARSING_AND_ERR_FLAGS_TAG8021QEXIST))
Mintz, Yuvalbe086e72017-03-11 18:39:18 +0200559 SET_FIELD(bd_flags, CORE_TX_BD_DATA_VLAN_INSERTION, 1);
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800560
561 return bd_flags;
562}
563
564static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn,
565 struct qed_ll2_info *p_ll2_conn)
566{
567 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
568 u16 packet_length = 0, parse_flags = 0, vlan = 0;
569 struct qed_ll2_rx_packet *p_pkt = NULL;
570 u32 num_ooo_add_to_peninsula = 0, cid;
571 union core_rx_cqe_union *cqe = NULL;
572 u16 cq_new_idx = 0, cq_old_idx = 0;
573 struct qed_ooo_buffer *p_buffer;
574 struct ooo_opaque *iscsi_ooo;
575 u8 placement_offset = 0;
576 u8 cqe_type;
577
578 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
579 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
580 if (cq_new_idx == cq_old_idx)
581 return 0;
582
583 while (cq_new_idx != cq_old_idx) {
584 struct core_rx_fast_path_cqe *p_cqe_fp;
585
586 cqe = qed_chain_consume(&p_rx->rcq_chain);
587 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
588 cqe_type = cqe->rx_cqe_sp.type;
589
590 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) {
591 DP_NOTICE(p_hwfn,
592 "Got a non-regular LB LL2 completion [type 0x%02x]\n",
593 cqe_type);
594 return -EINVAL;
595 }
596 p_cqe_fp = &cqe->rx_cqe_fp;
597
598 placement_offset = p_cqe_fp->placement_offset;
599 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags);
600 packet_length = le16_to_cpu(p_cqe_fp->packet_length);
601 vlan = le16_to_cpu(p_cqe_fp->vlan);
602 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data;
603 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info,
604 iscsi_ooo);
605 cid = le32_to_cpu(iscsi_ooo->cid);
606
607 /* Process delete isle first */
608 if (iscsi_ooo->drop_size)
609 qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid,
610 iscsi_ooo->drop_isle,
611 iscsi_ooo->drop_size);
612
613 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP)
614 continue;
615
616 /* Now process create/add/join isles */
617 if (list_empty(&p_rx->active_descq)) {
618 DP_NOTICE(p_hwfn,
619 "LL2 OOO RX chain has no submitted buffers\n"
620 );
621 return -EIO;
622 }
623
624 p_pkt = list_first_entry(&p_rx->active_descq,
625 struct qed_ll2_rx_packet, list_entry);
626
627 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) ||
628 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) ||
629 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) ||
630 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) ||
631 (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) {
632 if (!p_pkt) {
633 DP_NOTICE(p_hwfn,
634 "LL2 OOO RX packet is not valid\n");
635 return -EIO;
636 }
637 list_del(&p_pkt->list_entry);
638 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
639 p_buffer->packet_length = packet_length;
640 p_buffer->parse_flags = parse_flags;
641 p_buffer->vlan = vlan;
642 p_buffer->placement_offset = placement_offset;
643 qed_chain_consume(&p_rx->rxq_chain);
644 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
645
646 switch (iscsi_ooo->ooo_opcode) {
647 case TCP_EVENT_ADD_NEW_ISLE:
648 qed_ooo_add_new_isle(p_hwfn,
649 p_hwfn->p_ooo_info,
650 cid,
651 iscsi_ooo->ooo_isle,
652 p_buffer);
653 break;
654 case TCP_EVENT_ADD_ISLE_RIGHT:
655 qed_ooo_add_new_buffer(p_hwfn,
656 p_hwfn->p_ooo_info,
657 cid,
658 iscsi_ooo->ooo_isle,
659 p_buffer,
660 QED_OOO_RIGHT_BUF);
661 break;
662 case TCP_EVENT_ADD_ISLE_LEFT:
663 qed_ooo_add_new_buffer(p_hwfn,
664 p_hwfn->p_ooo_info,
665 cid,
666 iscsi_ooo->ooo_isle,
667 p_buffer,
668 QED_OOO_LEFT_BUF);
669 break;
670 case TCP_EVENT_JOIN:
671 qed_ooo_add_new_buffer(p_hwfn,
672 p_hwfn->p_ooo_info,
673 cid,
674 iscsi_ooo->ooo_isle +
675 1,
676 p_buffer,
677 QED_OOO_LEFT_BUF);
678 qed_ooo_join_isles(p_hwfn,
679 p_hwfn->p_ooo_info,
680 cid, iscsi_ooo->ooo_isle);
681 break;
682 case TCP_EVENT_ADD_PEN:
683 num_ooo_add_to_peninsula++;
684 qed_ooo_put_ready_buffer(p_hwfn,
685 p_hwfn->p_ooo_info,
686 p_buffer, true);
687 break;
688 }
689 } else {
690 DP_NOTICE(p_hwfn,
691 "Unexpected event (%d) TX OOO completion\n",
692 iscsi_ooo->ooo_opcode);
693 }
694 }
695
696 return 0;
697}
698
699static void
700qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn,
701 struct qed_ll2_info *p_ll2_conn)
702{
Mintz, Yuval7c7973b2017-06-09 17:13:18 +0300703 struct qed_ll2_tx_pkt_info tx_pkt;
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800704 struct qed_ooo_buffer *p_buffer;
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800705 u16 l4_hdr_offset_w;
706 dma_addr_t first_frag;
707 u16 parse_flags;
708 u8 bd_flags;
Mintz, Yuval7c7973b2017-06-09 17:13:18 +0300709 int rc;
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800710
711 /* Submit Tx buffers here */
712 while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn,
713 p_hwfn->p_ooo_info))) {
714 l4_hdr_offset_w = 0;
715 bd_flags = 0;
716
717 first_frag = p_buffer->rx_buffer_phys_addr +
718 p_buffer->placement_offset;
719 parse_flags = p_buffer->parse_flags;
720 bd_flags = qed_ll2_convert_rx_parse_to_tx_flags(parse_flags);
Mintz, Yuvalbe086e72017-03-11 18:39:18 +0200721 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1);
722 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1);
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800723
Mintz, Yuval7c7973b2017-06-09 17:13:18 +0300724 memset(&tx_pkt, 0, sizeof(tx_pkt));
725 tx_pkt.num_of_bds = 1;
726 tx_pkt.vlan = p_buffer->vlan;
727 tx_pkt.bd_flags = bd_flags;
728 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w;
Mintz, Yuval13c54772017-06-09 17:13:20 +0300729 tx_pkt.tx_dest = p_ll2_conn->tx_dest;
Mintz, Yuval7c7973b2017-06-09 17:13:18 +0300730 tx_pkt.first_frag = first_frag;
731 tx_pkt.first_frag_len = p_buffer->packet_length;
732 tx_pkt.cookie = p_buffer;
733
734 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id,
735 &tx_pkt, true);
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800736 if (rc) {
737 qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info,
738 p_buffer, false);
739 break;
740 }
741 }
742}
743
744static void
745qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn,
746 struct qed_ll2_info *p_ll2_conn)
747{
748 struct qed_ooo_buffer *p_buffer;
749 int rc;
750
751 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
752 p_hwfn->p_ooo_info))) {
753 rc = qed_ll2_post_rx_buffer(p_hwfn,
754 p_ll2_conn->my_id,
755 p_buffer->rx_buffer_phys_addr,
756 0, p_buffer, true);
757 if (rc) {
758 qed_ooo_put_free_buffer(p_hwfn,
759 p_hwfn->p_ooo_info, p_buffer);
760 break;
761 }
762 }
763}
764
765static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
766{
767 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
768 int rc;
769
770 rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn);
771 if (rc)
772 return rc;
773
774 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
775 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
776
777 return 0;
778}
779
780static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
781{
782 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
783 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
784 struct qed_ll2_tx_packet *p_pkt = NULL;
785 struct qed_ooo_buffer *p_buffer;
786 bool b_dont_submit_rx = false;
787 u16 new_idx = 0, num_bds = 0;
788 int rc;
789
790 new_idx = le16_to_cpu(*p_tx->p_fw_cons);
791 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
792
793 if (!num_bds)
794 return 0;
795
796 while (num_bds) {
797 if (list_empty(&p_tx->active_descq))
798 return -EINVAL;
799
800 p_pkt = list_first_entry(&p_tx->active_descq,
801 struct qed_ll2_tx_packet, list_entry);
802 if (!p_pkt)
803 return -EINVAL;
804
805 if (p_pkt->bd_used != 1) {
806 DP_NOTICE(p_hwfn,
807 "Unexpectedly many BDs(%d) in TX OOO completion\n",
808 p_pkt->bd_used);
809 return -EINVAL;
810 }
811
812 list_del(&p_pkt->list_entry);
813
814 num_bds--;
815 p_tx->bds_idx++;
816 qed_chain_consume(&p_tx->txq_chain);
817
818 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
819 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
820
821 if (b_dont_submit_rx) {
822 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
823 p_buffer);
824 continue;
825 }
826
827 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id,
828 p_buffer->rx_buffer_phys_addr, 0,
829 p_buffer, true);
830 if (rc != 0) {
831 qed_ooo_put_free_buffer(p_hwfn,
832 p_hwfn->p_ooo_info, p_buffer);
833 b_dont_submit_rx = true;
834 }
835 }
836
837 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
838
839 return 0;
840}
841
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800842static void qed_ll2_stop_ooo(struct qed_dev *cdev)
843{
844 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
845 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
846
847 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Stopping LL2 OOO queue [%02x]\n",
848 *handle);
849
850 qed_ll2_terminate_connection(hwfn, *handle);
851 qed_ll2_release_connection(hwfn, *handle);
852 *handle = QED_LL2_UNUSED_HANDLE;
853}
854
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300855static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn,
856 struct qed_ll2_info *p_ll2_conn,
857 u8 action_on_error)
858{
Mintz, Yuval13c54772017-06-09 17:13:20 +0300859 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300860 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
861 struct core_rx_start_ramrod_data *p_ramrod = NULL;
862 struct qed_spq_entry *p_ent = NULL;
863 struct qed_sp_init_data init_data;
864 u16 cqe_pbl_size;
865 int rc = 0;
866
867 /* Get SPQ entry */
868 memset(&init_data, 0, sizeof(init_data));
869 init_data.cid = p_ll2_conn->cid;
870 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
871 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
872
873 rc = qed_sp_init_request(p_hwfn, &p_ent,
874 CORE_RAMROD_RX_QUEUE_START,
875 PROTOCOLID_CORE, &init_data);
876 if (rc)
877 return rc;
878
879 p_ramrod = &p_ent->ramrod.core_rx_queue_start;
880
881 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
882 p_ramrod->sb_index = p_rx->rx_sb_index;
883 p_ramrod->complete_event_flg = 1;
884
Mintz, Yuval13c54772017-06-09 17:13:20 +0300885 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
886 DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300887 cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain);
888 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
889 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr,
890 qed_chain_get_pbl_phys(&p_rx->rcq_chain));
891
Mintz, Yuval13c54772017-06-09 17:13:20 +0300892 p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg;
893 p_ramrod->inner_vlan_removal_en = p_ll2_conn->input.rx_vlan_removal_en;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300894 p_ramrod->queue_id = p_ll2_conn->queue_id;
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800895 p_ramrod->main_func_queue = (conn_type == QED_LL2_TYPE_ISCSI_OOO) ? 0
896 : 1;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300897
898 if ((IS_MF_DEFAULT(p_hwfn) || IS_MF_SI(p_hwfn)) &&
899 p_ramrod->main_func_queue && (conn_type != QED_LL2_TYPE_ROCE)) {
900 p_ramrod->mf_si_bcast_accept_all = 1;
901 p_ramrod->mf_si_mcast_accept_all = 1;
902 } else {
903 p_ramrod->mf_si_bcast_accept_all = 0;
904 p_ramrod->mf_si_mcast_accept_all = 0;
905 }
906
907 p_ramrod->action_on_error.error_type = action_on_error;
Mintz, Yuval13c54772017-06-09 17:13:20 +0300908 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300909 return qed_spq_post(p_hwfn, p_ent, NULL);
910}
911
912static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn,
913 struct qed_ll2_info *p_ll2_conn)
914{
Mintz, Yuval13c54772017-06-09 17:13:20 +0300915 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300916 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
917 struct core_tx_start_ramrod_data *p_ramrod = NULL;
918 struct qed_spq_entry *p_ent = NULL;
919 struct qed_sp_init_data init_data;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300920 u16 pq_id = 0, pbl_size;
921 int rc = -EINVAL;
922
923 if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
924 return 0;
925
Mintz, Yuval13c54772017-06-09 17:13:20 +0300926 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_ISCSI_OOO)
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800927 p_ll2_conn->tx_stats_en = 0;
928 else
929 p_ll2_conn->tx_stats_en = 1;
930
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300931 /* Get SPQ entry */
932 memset(&init_data, 0, sizeof(init_data));
933 init_data.cid = p_ll2_conn->cid;
934 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
935 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
936
937 rc = qed_sp_init_request(p_hwfn, &p_ent,
938 CORE_RAMROD_TX_QUEUE_START,
939 PROTOCOLID_CORE, &init_data);
940 if (rc)
941 return rc;
942
943 p_ramrod = &p_ent->ramrod.core_tx_queue_start;
944
945 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
946 p_ramrod->sb_index = p_tx->tx_sb_index;
Mintz, Yuval13c54772017-06-09 17:13:20 +0300947 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300948 p_ramrod->stats_en = p_ll2_conn->tx_stats_en;
949 p_ramrod->stats_id = p_ll2_conn->tx_stats_id;
950
951 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr,
952 qed_chain_get_pbl_phys(&p_tx->txq_chain));
953 pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain);
954 p_ramrod->pbl_size = cpu_to_le16(pbl_size);
955
Mintz, Yuval13c54772017-06-09 17:13:20 +0300956 switch (p_ll2_conn->input.tx_tc) {
Ariel Eliorb5a9ee72017-04-03 12:21:09 +0300957 case LB_TC:
958 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
959 break;
960 case OOO_LB_TC:
961 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO);
Colin Ian King827d2402017-04-05 13:35:44 +0100962 break;
Ariel Eliorb5a9ee72017-04-03 12:21:09 +0300963 default:
964 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD);
965 break;
966 }
967
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300968 p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
969
970 switch (conn_type) {
Arun Easi1e128c82017-02-15 06:28:22 -0800971 case QED_LL2_TYPE_FCOE:
972 p_ramrod->conn_type = PROTOCOLID_FCOE;
973 break;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300974 case QED_LL2_TYPE_ISCSI:
975 case QED_LL2_TYPE_ISCSI_OOO:
976 p_ramrod->conn_type = PROTOCOLID_ISCSI;
977 break;
978 case QED_LL2_TYPE_ROCE:
979 p_ramrod->conn_type = PROTOCOLID_ROCE;
980 break;
981 default:
982 p_ramrod->conn_type = PROTOCOLID_ETH;
983 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type);
984 }
985
Mintz, Yuval13c54772017-06-09 17:13:20 +0300986 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
987
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300988 return qed_spq_post(p_hwfn, p_ent, NULL);
989}
990
991static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn,
992 struct qed_ll2_info *p_ll2_conn)
993{
994 struct core_rx_stop_ramrod_data *p_ramrod = NULL;
995 struct qed_spq_entry *p_ent = NULL;
996 struct qed_sp_init_data init_data;
997 int rc = -EINVAL;
998
999 /* Get SPQ entry */
1000 memset(&init_data, 0, sizeof(init_data));
1001 init_data.cid = p_ll2_conn->cid;
1002 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1003 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1004
1005 rc = qed_sp_init_request(p_hwfn, &p_ent,
1006 CORE_RAMROD_RX_QUEUE_STOP,
1007 PROTOCOLID_CORE, &init_data);
1008 if (rc)
1009 return rc;
1010
1011 p_ramrod = &p_ent->ramrod.core_rx_queue_stop;
1012
1013 p_ramrod->complete_event_flg = 1;
1014 p_ramrod->queue_id = p_ll2_conn->queue_id;
1015
1016 return qed_spq_post(p_hwfn, p_ent, NULL);
1017}
1018
1019static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn,
1020 struct qed_ll2_info *p_ll2_conn)
1021{
1022 struct qed_spq_entry *p_ent = NULL;
1023 struct qed_sp_init_data init_data;
1024 int rc = -EINVAL;
1025
1026 /* Get SPQ entry */
1027 memset(&init_data, 0, sizeof(init_data));
1028 init_data.cid = p_ll2_conn->cid;
1029 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1030 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1031
1032 rc = qed_sp_init_request(p_hwfn, &p_ent,
1033 CORE_RAMROD_TX_QUEUE_STOP,
1034 PROTOCOLID_CORE, &init_data);
1035 if (rc)
1036 return rc;
1037
1038 return qed_spq_post(p_hwfn, p_ent, NULL);
1039}
1040
1041static int
1042qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001043 struct qed_ll2_info *p_ll2_info)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001044{
1045 struct qed_ll2_rx_packet *p_descq;
1046 u32 capacity;
1047 int rc = 0;
1048
Mintz, Yuval13c54772017-06-09 17:13:20 +03001049 if (!p_ll2_info->input.rx_num_desc)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001050 goto out;
1051
1052 rc = qed_chain_alloc(p_hwfn->cdev,
1053 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1054 QED_CHAIN_MODE_NEXT_PTR,
1055 QED_CHAIN_CNT_TYPE_U16,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001056 p_ll2_info->input.rx_num_desc,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001057 sizeof(struct core_rx_bd),
1058 &p_ll2_info->rx_queue.rxq_chain);
1059 if (rc) {
1060 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n");
1061 goto out;
1062 }
1063
1064 capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain);
1065 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet),
1066 GFP_KERNEL);
1067 if (!p_descq) {
1068 rc = -ENOMEM;
1069 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n");
1070 goto out;
1071 }
1072 p_ll2_info->rx_queue.descq_array = p_descq;
1073
1074 rc = qed_chain_alloc(p_hwfn->cdev,
1075 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1076 QED_CHAIN_MODE_PBL,
1077 QED_CHAIN_CNT_TYPE_U16,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001078 p_ll2_info->input.rx_num_desc,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001079 sizeof(struct core_rx_fast_path_cqe),
1080 &p_ll2_info->rx_queue.rcq_chain);
1081 if (rc) {
1082 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n");
1083 goto out;
1084 }
1085
1086 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1087 "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n",
Mintz, Yuval13c54772017-06-09 17:13:20 +03001088 p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001089
1090out:
1091 return rc;
1092}
1093
1094static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001095 struct qed_ll2_info *p_ll2_info)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001096{
1097 struct qed_ll2_tx_packet *p_descq;
1098 u32 capacity;
1099 int rc = 0;
1100
Mintz, Yuval13c54772017-06-09 17:13:20 +03001101 if (!p_ll2_info->input.tx_num_desc)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001102 goto out;
1103
1104 rc = qed_chain_alloc(p_hwfn->cdev,
1105 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1106 QED_CHAIN_MODE_PBL,
1107 QED_CHAIN_CNT_TYPE_U16,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001108 p_ll2_info->input.tx_num_desc,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001109 sizeof(struct core_tx_bd),
1110 &p_ll2_info->tx_queue.txq_chain);
1111 if (rc)
1112 goto out;
1113
1114 capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain);
1115 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_tx_packet),
1116 GFP_KERNEL);
1117 if (!p_descq) {
1118 rc = -ENOMEM;
1119 goto out;
1120 }
1121 p_ll2_info->tx_queue.descq_array = p_descq;
1122
1123 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1124 "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n",
Mintz, Yuval13c54772017-06-09 17:13:20 +03001125 p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001126
1127out:
1128 if (rc)
1129 DP_NOTICE(p_hwfn,
1130 "Can't allocate memory for Tx LL2 with 0x%08x buffers\n",
Mintz, Yuval13c54772017-06-09 17:13:20 +03001131 p_ll2_info->input.tx_num_desc);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001132 return rc;
1133}
1134
Mintz, Yuval13c54772017-06-09 17:13:20 +03001135static int
1136qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn,
1137 struct qed_ll2_info *p_ll2_info, u16 mtu)
1138{
1139 struct qed_ooo_buffer *p_buf = NULL;
1140 void *p_virt;
1141 u16 buf_idx;
1142 int rc = 0;
1143
1144 if (p_ll2_info->input.conn_type != QED_LL2_TYPE_ISCSI_OOO)
1145 return rc;
1146
1147 /* Correct number of requested OOO buffers if needed */
1148 if (!p_ll2_info->input.rx_num_ooo_buffers) {
1149 u16 num_desc = p_ll2_info->input.rx_num_desc;
1150
1151 if (!num_desc)
1152 return -EINVAL;
1153 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2;
1154 }
1155
1156 for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers;
1157 buf_idx++) {
1158 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL);
1159 if (!p_buf) {
1160 rc = -ENOMEM;
1161 goto out;
1162 }
1163
1164 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE;
1165 p_buf->rx_buffer_size = (p_buf->rx_buffer_size +
1166 ETH_CACHE_LINE_SIZE - 1) &
1167 ~(ETH_CACHE_LINE_SIZE - 1);
1168 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
1169 p_buf->rx_buffer_size,
1170 &p_buf->rx_buffer_phys_addr,
1171 GFP_KERNEL);
1172 if (!p_virt) {
1173 kfree(p_buf);
1174 rc = -ENOMEM;
1175 goto out;
1176 }
1177
1178 p_buf->rx_buffer_virt_addr = p_virt;
1179 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf);
1180 }
1181
1182 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1183 "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n",
1184 p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size);
1185
1186out:
1187 return rc;
1188}
1189
Michal Kalderon0518c122017-06-09 17:13:22 +03001190static int
1191qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs)
1192{
1193 if (!cbs || (!cbs->rx_comp_cb ||
1194 !cbs->rx_release_cb ||
1195 !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie))
1196 return -EINVAL;
1197
1198 p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb;
1199 p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb;
1200 p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb;
1201 p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb;
1202 p_ll2_info->cbs.cookie = cbs->cookie;
1203
1204 return 0;
1205}
1206
Mintz, Yuval13c54772017-06-09 17:13:20 +03001207static enum core_error_handle
1208qed_ll2_get_error_choice(enum qed_ll2_error_handle err)
1209{
1210 switch (err) {
1211 case QED_LL2_DROP_PACKET:
1212 return LL2_DROP_PACKET;
1213 case QED_LL2_DO_NOTHING:
1214 return LL2_DO_NOTHING;
1215 case QED_LL2_ASSERT:
1216 return LL2_ASSERT;
1217 default:
1218 return LL2_DO_NOTHING;
1219 }
1220}
1221
Michal Kalderon0518c122017-06-09 17:13:22 +03001222int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001223{
Michal Kalderon0518c122017-06-09 17:13:22 +03001224 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001225 qed_int_comp_cb_t comp_rx_cb, comp_tx_cb;
1226 struct qed_ll2_info *p_ll2_info = NULL;
Mintz, Yuval13c54772017-06-09 17:13:20 +03001227 u8 i, *p_tx_max;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001228 int rc;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001229
Mintz, Yuval13c54772017-06-09 17:13:20 +03001230 if (!data->p_connection_handle || !p_hwfn->p_ll2_info)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001231 return -EINVAL;
1232
1233 /* Find a free connection to be used */
1234 for (i = 0; (i < QED_MAX_NUM_OF_LL2_CONNECTIONS); i++) {
1235 mutex_lock(&p_hwfn->p_ll2_info[i].mutex);
1236 if (p_hwfn->p_ll2_info[i].b_active) {
1237 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1238 continue;
1239 }
1240
1241 p_hwfn->p_ll2_info[i].b_active = true;
1242 p_ll2_info = &p_hwfn->p_ll2_info[i];
1243 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1244 break;
1245 }
1246 if (!p_ll2_info)
1247 return -EBUSY;
1248
Mintz, Yuval13c54772017-06-09 17:13:20 +03001249 memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input));
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001250
Mintz, Yuval13c54772017-06-09 17:13:20 +03001251 p_ll2_info->tx_dest = (data->input.tx_dest == QED_LL2_TX_DEST_NW) ?
1252 CORE_TX_DEST_NW : CORE_TX_DEST_LB;
1253
1254 /* Correct maximum number of Tx BDs */
1255 p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet;
1256 if (*p_tx_max == 0)
1257 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET;
1258 else
1259 *p_tx_max = min_t(u8, *p_tx_max,
1260 CORE_LL2_TX_MAX_BDS_PER_PACKET);
Michal Kalderon0518c122017-06-09 17:13:22 +03001261
1262 rc = qed_ll2_set_cbs(p_ll2_info, data->cbs);
1263 if (rc) {
1264 DP_NOTICE(p_hwfn, "Invalid callback functions\n");
1265 goto q_allocate_fail;
1266 }
1267
Mintz, Yuval13c54772017-06-09 17:13:20 +03001268 rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001269 if (rc)
1270 goto q_allocate_fail;
1271
Mintz, Yuval13c54772017-06-09 17:13:20 +03001272 rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001273 if (rc)
1274 goto q_allocate_fail;
1275
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001276 rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001277 data->input.mtu);
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001278 if (rc)
1279 goto q_allocate_fail;
1280
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001281 /* Register callbacks for the Rx/Tx queues */
Mintz, Yuval13c54772017-06-09 17:13:20 +03001282 if (data->input.conn_type == QED_LL2_TYPE_ISCSI_OOO) {
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001283 comp_rx_cb = qed_ll2_lb_rxq_completion;
1284 comp_tx_cb = qed_ll2_lb_txq_completion;
1285 } else {
1286 comp_rx_cb = qed_ll2_rxq_completion;
1287 comp_tx_cb = qed_ll2_txq_completion;
1288 }
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001289
Mintz, Yuval13c54772017-06-09 17:13:20 +03001290 if (data->input.rx_num_desc) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001291 qed_int_register_cb(p_hwfn, comp_rx_cb,
1292 &p_hwfn->p_ll2_info[i],
1293 &p_ll2_info->rx_queue.rx_sb_index,
1294 &p_ll2_info->rx_queue.p_fw_cons);
1295 p_ll2_info->rx_queue.b_cb_registred = true;
1296 }
1297
Mintz, Yuval13c54772017-06-09 17:13:20 +03001298 if (data->input.tx_num_desc) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001299 qed_int_register_cb(p_hwfn,
1300 comp_tx_cb,
1301 &p_hwfn->p_ll2_info[i],
1302 &p_ll2_info->tx_queue.tx_sb_index,
1303 &p_ll2_info->tx_queue.p_fw_cons);
1304 p_ll2_info->tx_queue.b_cb_registred = true;
1305 }
1306
Mintz, Yuval13c54772017-06-09 17:13:20 +03001307 *data->p_connection_handle = i;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001308 return rc;
1309
1310q_allocate_fail:
1311 qed_ll2_release_connection(p_hwfn, i);
1312 return -ENOMEM;
1313}
1314
1315static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn,
1316 struct qed_ll2_info *p_ll2_conn)
1317{
Mintz, Yuval13c54772017-06-09 17:13:20 +03001318 enum qed_ll2_error_handle error_input;
1319 enum core_error_handle error_mode;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001320 u8 action_on_error = 0;
1321
1322 if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
1323 return 0;
1324
1325 DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0);
Mintz, Yuval13c54772017-06-09 17:13:20 +03001326 error_input = p_ll2_conn->input.ai_err_packet_too_big;
1327 error_mode = qed_ll2_get_error_choice(error_input);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001328 SET_FIELD(action_on_error,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001329 CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode);
1330 error_input = p_ll2_conn->input.ai_err_no_buf;
1331 error_mode = qed_ll2_get_error_choice(error_input);
1332 SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001333
1334 return qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error);
1335}
1336
Mintz, Yuval58de2892017-06-09 17:13:21 +03001337static void
1338qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn,
1339 struct qed_ll2_info *p_ll2_conn)
1340{
1341 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_ISCSI_OOO)
1342 return;
1343
1344 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1345 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
1346}
Michal Kalderon0518c122017-06-09 17:13:22 +03001347
1348int qed_ll2_establish_connection(void *cxt, u8 connection_handle)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001349{
Michal Kalderon0518c122017-06-09 17:13:22 +03001350 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001351 struct qed_ll2_info *p_ll2_conn;
1352 struct qed_ll2_rx_queue *p_rx;
1353 struct qed_ll2_tx_queue *p_tx;
Rahul Verma15582962017-04-06 15:58:29 +03001354 struct qed_ptt *p_ptt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001355 int rc = -EINVAL;
1356 u32 i, capacity;
1357 u8 qid;
1358
Rahul Verma15582962017-04-06 15:58:29 +03001359 p_ptt = qed_ptt_acquire(p_hwfn);
1360 if (!p_ptt)
1361 return -EAGAIN;
1362
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001363 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
Rahul Verma15582962017-04-06 15:58:29 +03001364 if (!p_ll2_conn) {
1365 rc = -EINVAL;
1366 goto out;
1367 }
1368
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001369 p_rx = &p_ll2_conn->rx_queue;
1370 p_tx = &p_ll2_conn->tx_queue;
1371
1372 qed_chain_reset(&p_rx->rxq_chain);
1373 qed_chain_reset(&p_rx->rcq_chain);
1374 INIT_LIST_HEAD(&p_rx->active_descq);
1375 INIT_LIST_HEAD(&p_rx->free_descq);
1376 INIT_LIST_HEAD(&p_rx->posting_descq);
1377 spin_lock_init(&p_rx->lock);
1378 capacity = qed_chain_get_capacity(&p_rx->rxq_chain);
1379 for (i = 0; i < capacity; i++)
1380 list_add_tail(&p_rx->descq_array[i].list_entry,
1381 &p_rx->free_descq);
1382 *p_rx->p_fw_cons = 0;
1383
1384 qed_chain_reset(&p_tx->txq_chain);
1385 INIT_LIST_HEAD(&p_tx->active_descq);
1386 INIT_LIST_HEAD(&p_tx->free_descq);
1387 INIT_LIST_HEAD(&p_tx->sending_descq);
1388 spin_lock_init(&p_tx->lock);
1389 capacity = qed_chain_get_capacity(&p_tx->txq_chain);
1390 for (i = 0; i < capacity; i++)
1391 list_add_tail(&p_tx->descq_array[i].list_entry,
1392 &p_tx->free_descq);
1393 p_tx->cur_completing_bd_idx = 0;
1394 p_tx->bds_idx = 0;
1395 p_tx->b_completing_packet = false;
1396 p_tx->cur_send_packet = NULL;
1397 p_tx->cur_send_frag_num = 0;
1398 p_tx->cur_completing_frag_num = 0;
1399 *p_tx->p_fw_cons = 0;
1400
Rahul Verma15582962017-04-06 15:58:29 +03001401 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid);
1402 if (rc)
1403 goto out;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001404
1405 qid = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + connection_handle;
1406 p_ll2_conn->queue_id = qid;
1407 p_ll2_conn->tx_stats_id = qid;
1408 p_rx->set_prod_addr = (u8 __iomem *)p_hwfn->regview +
1409 GTT_BAR0_MAP_REG_TSDM_RAM +
1410 TSTORM_LL2_RX_PRODS_OFFSET(qid);
1411 p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells +
1412 qed_db_addr(p_ll2_conn->cid,
1413 DQ_DEMS_LEGACY);
1414
1415 rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn);
1416 if (rc)
Rahul Verma15582962017-04-06 15:58:29 +03001417 goto out;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001418
1419 rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn);
1420 if (rc)
Rahul Verma15582962017-04-06 15:58:29 +03001421 goto out;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001422
1423 if (p_hwfn->hw_info.personality != QED_PCI_ETH_ROCE)
Rahul Verma15582962017-04-06 15:58:29 +03001424 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001425
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001426 qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn);
1427
Mintz, Yuval13c54772017-06-09 17:13:20 +03001428 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
Rahul Verma15582962017-04-06 15:58:29 +03001429 qed_llh_add_protocol_filter(p_hwfn, p_ptt,
Arun Easi1e128c82017-02-15 06:28:22 -08001430 0x8906, 0,
1431 QED_LLH_FILTER_ETHERTYPE);
Rahul Verma15582962017-04-06 15:58:29 +03001432 qed_llh_add_protocol_filter(p_hwfn, p_ptt,
Arun Easi1e128c82017-02-15 06:28:22 -08001433 0x8914, 0,
1434 QED_LLH_FILTER_ETHERTYPE);
1435 }
1436
Rahul Verma15582962017-04-06 15:58:29 +03001437out:
1438 qed_ptt_release(p_hwfn, p_ptt);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001439 return rc;
1440}
1441
1442static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn,
1443 struct qed_ll2_rx_queue *p_rx,
1444 struct qed_ll2_rx_packet *p_curp)
1445{
1446 struct qed_ll2_rx_packet *p_posting_packet = NULL;
1447 struct core_ll2_rx_prod rx_prod = { 0, 0, 0 };
1448 bool b_notify_fw = false;
1449 u16 bd_prod, cq_prod;
1450
1451 /* This handles the flushing of already posted buffers */
1452 while (!list_empty(&p_rx->posting_descq)) {
1453 p_posting_packet = list_first_entry(&p_rx->posting_descq,
1454 struct qed_ll2_rx_packet,
1455 list_entry);
Wei Yongjunb4f0fd42016-10-17 15:17:51 +00001456 list_move_tail(&p_posting_packet->list_entry,
1457 &p_rx->active_descq);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001458 b_notify_fw = true;
1459 }
1460
1461 /* This handles the supplied packet [if there is one] */
1462 if (p_curp) {
1463 list_add_tail(&p_curp->list_entry, &p_rx->active_descq);
1464 b_notify_fw = true;
1465 }
1466
1467 if (!b_notify_fw)
1468 return;
1469
1470 bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain);
1471 cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain);
1472 rx_prod.bd_prod = cpu_to_le16(bd_prod);
1473 rx_prod.cqe_prod = cpu_to_le16(cq_prod);
1474 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod));
1475}
1476
Michal Kalderon0518c122017-06-09 17:13:22 +03001477int qed_ll2_post_rx_buffer(void *cxt,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001478 u8 connection_handle,
1479 dma_addr_t addr,
1480 u16 buf_len, void *cookie, u8 notify_fw)
1481{
Michal Kalderon0518c122017-06-09 17:13:22 +03001482 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001483 struct core_rx_bd_with_buff_len *p_curb = NULL;
1484 struct qed_ll2_rx_packet *p_curp = NULL;
1485 struct qed_ll2_info *p_ll2_conn;
1486 struct qed_ll2_rx_queue *p_rx;
1487 unsigned long flags;
1488 void *p_data;
1489 int rc = 0;
1490
1491 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1492 if (!p_ll2_conn)
1493 return -EINVAL;
1494 p_rx = &p_ll2_conn->rx_queue;
1495
1496 spin_lock_irqsave(&p_rx->lock, flags);
1497 if (!list_empty(&p_rx->free_descq))
1498 p_curp = list_first_entry(&p_rx->free_descq,
1499 struct qed_ll2_rx_packet, list_entry);
1500 if (p_curp) {
1501 if (qed_chain_get_elem_left(&p_rx->rxq_chain) &&
1502 qed_chain_get_elem_left(&p_rx->rcq_chain)) {
1503 p_data = qed_chain_produce(&p_rx->rxq_chain);
1504 p_curb = (struct core_rx_bd_with_buff_len *)p_data;
1505 qed_chain_produce(&p_rx->rcq_chain);
1506 }
1507 }
1508
1509 /* If we're lacking entires, let's try to flush buffers to FW */
1510 if (!p_curp || !p_curb) {
1511 rc = -EBUSY;
1512 p_curp = NULL;
1513 goto out_notify;
1514 }
1515
1516 /* We have an Rx packet we can fill */
1517 DMA_REGPAIR_LE(p_curb->addr, addr);
1518 p_curb->buff_length = cpu_to_le16(buf_len);
1519 p_curp->rx_buf_addr = addr;
1520 p_curp->cookie = cookie;
1521 p_curp->rxq_bd = p_curb;
1522 p_curp->buf_length = buf_len;
1523 list_del(&p_curp->list_entry);
1524
1525 /* Check if we only want to enqueue this packet without informing FW */
1526 if (!notify_fw) {
1527 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq);
1528 goto out;
1529 }
1530
1531out_notify:
1532 qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp);
1533out:
1534 spin_unlock_irqrestore(&p_rx->lock, flags);
1535 return rc;
1536}
1537
1538static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn,
1539 struct qed_ll2_tx_queue *p_tx,
1540 struct qed_ll2_tx_packet *p_curp,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001541 struct qed_ll2_tx_pkt_info *pkt,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001542 u8 notify_fw)
1543{
1544 list_del(&p_curp->list_entry);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001545 p_curp->cookie = pkt->cookie;
1546 p_curp->bd_used = pkt->num_of_bds;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001547 p_curp->notify_fw = notify_fw;
1548 p_tx->cur_send_packet = p_curp;
1549 p_tx->cur_send_frag_num = 0;
1550
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001551 p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag;
1552 p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001553 p_tx->cur_send_frag_num++;
1554}
1555
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001556static void
1557qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn,
1558 struct qed_ll2_info *p_ll2,
1559 struct qed_ll2_tx_packet *p_curp,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001560 struct qed_ll2_tx_pkt_info *pkt)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001561{
1562 struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain;
1563 u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain);
1564 struct core_tx_bd *start_bd = NULL;
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001565 enum core_roce_flavor_type roce_flavor;
1566 enum core_tx_dest tx_dest;
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001567 u16 bd_data = 0, frag_idx;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001568
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001569 roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE
1570 : CORE_RROCE;
1571
1572 tx_dest = (pkt->tx_dest == QED_LL2_TX_DEST_NW) ? CORE_TX_DEST_NW
1573 : CORE_TX_DEST_LB;
1574
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001575 start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001576 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001577 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001578 cpu_to_le16(pkt->l4_hdr_offset_w));
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001579 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001580 bd_data |= pkt->bd_flags;
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001581 SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001582 SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds);
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001583 SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor);
1584 start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001585 DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag);
1586 start_bd->nbytes = cpu_to_le16(pkt->first_frag_len);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001587
1588 DP_VERBOSE(p_hwfn,
1589 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1590 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n",
1591 p_ll2->queue_id,
1592 p_ll2->cid,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001593 p_ll2->input.conn_type,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001594 prod_idx,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001595 pkt->first_frag_len,
1596 pkt->num_of_bds,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001597 le32_to_cpu(start_bd->addr.hi),
1598 le32_to_cpu(start_bd->addr.lo));
1599
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001600 if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001601 return;
1602
1603 /* Need to provide the packet with additional BDs for frags */
1604 for (frag_idx = p_ll2->tx_queue.cur_send_frag_num;
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001605 frag_idx < pkt->num_of_bds; frag_idx++) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001606 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd;
1607
1608 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001609 (*p_bd)->bd_data.as_bitfield = 0;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001610 (*p_bd)->bitfield1 = 0;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001611 p_curp->bds_set[frag_idx].tx_frag = 0;
1612 p_curp->bds_set[frag_idx].frag_len = 0;
1613 }
1614}
1615
1616/* This should be called while the Txq spinlock is being held */
1617static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn,
1618 struct qed_ll2_info *p_ll2_conn)
1619{
1620 bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw;
1621 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1622 struct qed_ll2_tx_packet *p_pkt = NULL;
1623 struct core_db_data db_msg = { 0, 0, 0 };
1624 u16 bd_prod;
1625
1626 /* If there are missing BDs, don't do anything now */
1627 if (p_ll2_conn->tx_queue.cur_send_frag_num !=
1628 p_ll2_conn->tx_queue.cur_send_packet->bd_used)
1629 return;
1630
1631 /* Push the current packet to the list and clean after it */
1632 list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry,
1633 &p_ll2_conn->tx_queue.sending_descq);
1634 p_ll2_conn->tx_queue.cur_send_packet = NULL;
1635 p_ll2_conn->tx_queue.cur_send_frag_num = 0;
1636
1637 /* Notify FW of packet only if requested to */
1638 if (!b_notify)
1639 return;
1640
1641 bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain);
1642
1643 while (!list_empty(&p_tx->sending_descq)) {
1644 p_pkt = list_first_entry(&p_tx->sending_descq,
1645 struct qed_ll2_tx_packet, list_entry);
1646 if (!p_pkt)
1647 break;
1648
Wei Yongjunb4f0fd42016-10-17 15:17:51 +00001649 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001650 }
1651
1652 SET_FIELD(db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
1653 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
1654 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_VAL_SEL,
1655 DQ_XCM_CORE_TX_BD_PROD_CMD);
1656 db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
1657 db_msg.spq_prod = cpu_to_le16(bd_prod);
1658
1659 /* Make sure the BDs data is updated before ringing the doorbell */
1660 wmb();
1661
1662 DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&db_msg));
1663
1664 DP_VERBOSE(p_hwfn,
1665 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1666 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n",
1667 p_ll2_conn->queue_id,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001668 p_ll2_conn->cid,
1669 p_ll2_conn->input.conn_type, db_msg.spq_prod);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001670}
1671
Michal Kalderon0518c122017-06-09 17:13:22 +03001672int qed_ll2_prepare_tx_packet(void *cxt,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001673 u8 connection_handle,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001674 struct qed_ll2_tx_pkt_info *pkt,
1675 bool notify_fw)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001676{
Michal Kalderon0518c122017-06-09 17:13:22 +03001677 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001678 struct qed_ll2_tx_packet *p_curp = NULL;
1679 struct qed_ll2_info *p_ll2_conn = NULL;
1680 struct qed_ll2_tx_queue *p_tx;
1681 struct qed_chain *p_tx_chain;
1682 unsigned long flags;
1683 int rc = 0;
1684
1685 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1686 if (!p_ll2_conn)
1687 return -EINVAL;
1688 p_tx = &p_ll2_conn->tx_queue;
1689 p_tx_chain = &p_tx->txq_chain;
1690
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001691 if (pkt->num_of_bds > CORE_LL2_TX_MAX_BDS_PER_PACKET)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001692 return -EIO;
1693
1694 spin_lock_irqsave(&p_tx->lock, flags);
1695 if (p_tx->cur_send_packet) {
1696 rc = -EEXIST;
1697 goto out;
1698 }
1699
1700 /* Get entry, but only if we have tx elements for it */
1701 if (!list_empty(&p_tx->free_descq))
1702 p_curp = list_first_entry(&p_tx->free_descq,
1703 struct qed_ll2_tx_packet, list_entry);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001704 if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001705 p_curp = NULL;
1706
1707 if (!p_curp) {
1708 rc = -EBUSY;
1709 goto out;
1710 }
1711
1712 /* Prepare packet and BD, and perhaps send a doorbell to FW */
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001713 qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw);
1714
1715 qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001716
1717 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
1718
1719out:
1720 spin_unlock_irqrestore(&p_tx->lock, flags);
1721 return rc;
1722}
1723
Michal Kalderon0518c122017-06-09 17:13:22 +03001724int qed_ll2_set_fragment_of_tx_packet(void *cxt,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001725 u8 connection_handle,
1726 dma_addr_t addr, u16 nbytes)
1727{
1728 struct qed_ll2_tx_packet *p_cur_send_packet = NULL;
Michal Kalderon0518c122017-06-09 17:13:22 +03001729 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001730 struct qed_ll2_info *p_ll2_conn = NULL;
1731 u16 cur_send_frag_num = 0;
1732 struct core_tx_bd *p_bd;
1733 unsigned long flags;
1734
1735 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1736 if (!p_ll2_conn)
1737 return -EINVAL;
1738
1739 if (!p_ll2_conn->tx_queue.cur_send_packet)
1740 return -EINVAL;
1741
1742 p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet;
1743 cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num;
1744
1745 if (cur_send_frag_num >= p_cur_send_packet->bd_used)
1746 return -EINVAL;
1747
1748 /* Fill the BD information, and possibly notify FW */
1749 p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd;
1750 DMA_REGPAIR_LE(p_bd->addr, addr);
1751 p_bd->nbytes = cpu_to_le16(nbytes);
1752 p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr;
1753 p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes;
1754
1755 p_ll2_conn->tx_queue.cur_send_frag_num++;
1756
1757 spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags);
1758 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
1759 spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags);
1760
1761 return 0;
1762}
1763
Michal Kalderon0518c122017-06-09 17:13:22 +03001764int qed_ll2_terminate_connection(void *cxt, u8 connection_handle)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001765{
Michal Kalderon0518c122017-06-09 17:13:22 +03001766 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001767 struct qed_ll2_info *p_ll2_conn = NULL;
1768 int rc = -EINVAL;
Rahul Verma15582962017-04-06 15:58:29 +03001769 struct qed_ptt *p_ptt;
1770
1771 p_ptt = qed_ptt_acquire(p_hwfn);
1772 if (!p_ptt)
1773 return -EAGAIN;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001774
1775 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
Rahul Verma15582962017-04-06 15:58:29 +03001776 if (!p_ll2_conn) {
1777 rc = -EINVAL;
1778 goto out;
1779 }
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001780
1781 /* Stop Tx & Rx of connection, if needed */
1782 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
1783 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn);
1784 if (rc)
Rahul Verma15582962017-04-06 15:58:29 +03001785 goto out;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001786 qed_ll2_txq_flush(p_hwfn, connection_handle);
1787 }
1788
1789 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
1790 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn);
1791 if (rc)
Rahul Verma15582962017-04-06 15:58:29 +03001792 goto out;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001793 qed_ll2_rxq_flush(p_hwfn, connection_handle);
1794 }
1795
Mintz, Yuval13c54772017-06-09 17:13:20 +03001796 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_ISCSI_OOO)
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001797 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1798
Mintz, Yuval13c54772017-06-09 17:13:20 +03001799 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
Rahul Verma15582962017-04-06 15:58:29 +03001800 qed_llh_remove_protocol_filter(p_hwfn, p_ptt,
Arun Easi1e128c82017-02-15 06:28:22 -08001801 0x8906, 0,
1802 QED_LLH_FILTER_ETHERTYPE);
Rahul Verma15582962017-04-06 15:58:29 +03001803 qed_llh_remove_protocol_filter(p_hwfn, p_ptt,
Arun Easi1e128c82017-02-15 06:28:22 -08001804 0x8914, 0,
1805 QED_LLH_FILTER_ETHERTYPE);
1806 }
1807
Rahul Verma15582962017-04-06 15:58:29 +03001808out:
1809 qed_ptt_release(p_hwfn, p_ptt);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001810 return rc;
1811}
1812
Mintz, Yuval58de2892017-06-09 17:13:21 +03001813static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn,
1814 struct qed_ll2_info *p_ll2_conn)
1815{
1816 struct qed_ooo_buffer *p_buffer;
1817
1818 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_ISCSI_OOO)
1819 return;
1820
1821 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1822 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
1823 p_hwfn->p_ooo_info))) {
1824 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
1825 p_buffer->rx_buffer_size,
1826 p_buffer->rx_buffer_virt_addr,
1827 p_buffer->rx_buffer_phys_addr);
1828 kfree(p_buffer);
1829 }
1830}
Michal Kalderon0518c122017-06-09 17:13:22 +03001831
1832void qed_ll2_release_connection(void *cxt, u8 connection_handle)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001833{
Michal Kalderon0518c122017-06-09 17:13:22 +03001834 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001835 struct qed_ll2_info *p_ll2_conn = NULL;
1836
1837 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1838 if (!p_ll2_conn)
1839 return;
1840
1841 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
1842 p_ll2_conn->rx_queue.b_cb_registred = false;
1843 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index);
1844 }
1845
1846 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
1847 p_ll2_conn->tx_queue.b_cb_registred = false;
1848 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index);
1849 }
1850
1851 kfree(p_ll2_conn->tx_queue.descq_array);
1852 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain);
1853
1854 kfree(p_ll2_conn->rx_queue.descq_array);
1855 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain);
1856 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain);
1857
1858 qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid);
1859
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001860 qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn);
1861
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001862 mutex_lock(&p_ll2_conn->mutex);
1863 p_ll2_conn->b_active = false;
1864 mutex_unlock(&p_ll2_conn->mutex);
1865}
1866
Tomer Tayar3587cb82017-05-21 12:10:56 +03001867int qed_ll2_alloc(struct qed_hwfn *p_hwfn)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001868{
1869 struct qed_ll2_info *p_ll2_connections;
1870 u8 i;
1871
1872 /* Allocate LL2's set struct */
1873 p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS,
1874 sizeof(struct qed_ll2_info), GFP_KERNEL);
1875 if (!p_ll2_connections) {
1876 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n");
Tomer Tayar3587cb82017-05-21 12:10:56 +03001877 return -ENOMEM;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001878 }
1879
1880 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
1881 p_ll2_connections[i].my_id = i;
1882
Tomer Tayar3587cb82017-05-21 12:10:56 +03001883 p_hwfn->p_ll2_info = p_ll2_connections;
1884 return 0;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001885}
1886
Tomer Tayar3587cb82017-05-21 12:10:56 +03001887void qed_ll2_setup(struct qed_hwfn *p_hwfn)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001888{
1889 int i;
1890
1891 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
Tomer Tayar3587cb82017-05-21 12:10:56 +03001892 mutex_init(&p_hwfn->p_ll2_info[i].mutex);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001893}
1894
Tomer Tayar3587cb82017-05-21 12:10:56 +03001895void qed_ll2_free(struct qed_hwfn *p_hwfn)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001896{
Tomer Tayar3587cb82017-05-21 12:10:56 +03001897 if (!p_hwfn->p_ll2_info)
1898 return;
1899
1900 kfree(p_hwfn->p_ll2_info);
1901 p_hwfn->p_ll2_info = NULL;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001902}
1903
1904static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn,
1905 struct qed_ptt *p_ptt,
1906 struct qed_ll2_info *p_ll2_conn,
1907 struct qed_ll2_stats *p_stats)
1908{
1909 struct core_ll2_tstorm_per_queue_stat tstats;
1910 u8 qid = p_ll2_conn->queue_id;
1911 u32 tstats_addr;
1912
1913 memset(&tstats, 0, sizeof(tstats));
1914 tstats_addr = BAR0_MAP_REG_TSDM_RAM +
1915 CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid);
1916 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
1917
1918 p_stats->packet_too_big_discard =
1919 HILO_64_REGPAIR(tstats.packet_too_big_discard);
1920 p_stats->no_buff_discard = HILO_64_REGPAIR(tstats.no_buff_discard);
1921}
1922
1923static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn,
1924 struct qed_ptt *p_ptt,
1925 struct qed_ll2_info *p_ll2_conn,
1926 struct qed_ll2_stats *p_stats)
1927{
1928 struct core_ll2_ustorm_per_queue_stat ustats;
1929 u8 qid = p_ll2_conn->queue_id;
1930 u32 ustats_addr;
1931
1932 memset(&ustats, 0, sizeof(ustats));
1933 ustats_addr = BAR0_MAP_REG_USDM_RAM +
1934 CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid);
1935 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats));
1936
1937 p_stats->rcv_ucast_bytes = HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
1938 p_stats->rcv_mcast_bytes = HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
1939 p_stats->rcv_bcast_bytes = HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
1940 p_stats->rcv_ucast_pkts = HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
1941 p_stats->rcv_mcast_pkts = HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
1942 p_stats->rcv_bcast_pkts = HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
1943}
1944
1945static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn,
1946 struct qed_ptt *p_ptt,
1947 struct qed_ll2_info *p_ll2_conn,
1948 struct qed_ll2_stats *p_stats)
1949{
1950 struct core_ll2_pstorm_per_queue_stat pstats;
1951 u8 stats_id = p_ll2_conn->tx_stats_id;
1952 u32 pstats_addr;
1953
1954 memset(&pstats, 0, sizeof(pstats));
1955 pstats_addr = BAR0_MAP_REG_PSDM_RAM +
1956 CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id);
1957 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
1958
1959 p_stats->sent_ucast_bytes = HILO_64_REGPAIR(pstats.sent_ucast_bytes);
1960 p_stats->sent_mcast_bytes = HILO_64_REGPAIR(pstats.sent_mcast_bytes);
1961 p_stats->sent_bcast_bytes = HILO_64_REGPAIR(pstats.sent_bcast_bytes);
1962 p_stats->sent_ucast_pkts = HILO_64_REGPAIR(pstats.sent_ucast_pkts);
1963 p_stats->sent_mcast_pkts = HILO_64_REGPAIR(pstats.sent_mcast_pkts);
1964 p_stats->sent_bcast_pkts = HILO_64_REGPAIR(pstats.sent_bcast_pkts);
1965}
1966
Michal Kalderon0518c122017-06-09 17:13:22 +03001967int qed_ll2_get_stats(void *cxt,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001968 u8 connection_handle, struct qed_ll2_stats *p_stats)
1969{
Michal Kalderon0518c122017-06-09 17:13:22 +03001970 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001971 struct qed_ll2_info *p_ll2_conn = NULL;
1972 struct qed_ptt *p_ptt;
1973
1974 memset(p_stats, 0, sizeof(*p_stats));
1975
1976 if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) ||
1977 !p_hwfn->p_ll2_info)
1978 return -EINVAL;
1979
1980 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
1981
1982 p_ptt = qed_ptt_acquire(p_hwfn);
1983 if (!p_ptt) {
1984 DP_ERR(p_hwfn, "Failed to acquire ptt\n");
1985 return -EINVAL;
1986 }
1987
1988 _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
1989 _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
1990 if (p_ll2_conn->tx_stats_en)
1991 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
1992
1993 qed_ptt_release(p_hwfn, p_ptt);
1994 return 0;
1995}
1996
Michal Kalderon0518c122017-06-09 17:13:22 +03001997static void qed_ll2b_release_rx_packet(void *cxt,
1998 u8 connection_handle,
1999 void *cookie,
2000 dma_addr_t rx_buf_addr,
2001 bool b_last_packet)
2002{
2003 struct qed_hwfn *p_hwfn = cxt;
2004
2005 qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie);
2006}
2007
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002008static void qed_ll2_register_cb_ops(struct qed_dev *cdev,
2009 const struct qed_ll2_cb_ops *ops,
2010 void *cookie)
2011{
2012 cdev->ll2->cbs = ops;
2013 cdev->ll2->cb_cookie = cookie;
2014}
2015
Michal Kalderon0518c122017-06-09 17:13:22 +03002016struct qed_ll2_cbs ll2_cbs = {
2017 .rx_comp_cb = &qed_ll2b_complete_rx_packet,
2018 .rx_release_cb = &qed_ll2b_release_rx_packet,
2019 .tx_comp_cb = &qed_ll2b_complete_tx_packet,
2020 .tx_release_cb = &qed_ll2b_complete_tx_packet,
2021};
2022
Mintz, Yuval13c54772017-06-09 17:13:20 +03002023static void qed_ll2_set_conn_data(struct qed_dev *cdev,
2024 struct qed_ll2_acquire_data *data,
2025 struct qed_ll2_params *params,
2026 enum qed_ll2_conn_type conn_type,
Michal Kalderon0518c122017-06-09 17:13:22 +03002027 u8 *handle, bool lb)
Mintz, Yuval13c54772017-06-09 17:13:20 +03002028{
2029 memset(data, 0, sizeof(*data));
2030
2031 data->input.conn_type = conn_type;
2032 data->input.mtu = params->mtu;
2033 data->input.rx_num_desc = QED_LL2_RX_SIZE;
2034 data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets;
2035 data->input.rx_vlan_removal_en = params->rx_vlan_stripping;
2036 data->input.tx_num_desc = QED_LL2_TX_SIZE;
Mintz, Yuval13c54772017-06-09 17:13:20 +03002037 data->p_connection_handle = handle;
Michal Kalderon0518c122017-06-09 17:13:22 +03002038 data->cbs = &ll2_cbs;
2039 ll2_cbs.cookie = QED_LEADING_HWFN(cdev);
2040
Mintz, Yuval13c54772017-06-09 17:13:20 +03002041 if (lb) {
2042 data->input.tx_tc = OOO_LB_TC;
2043 data->input.tx_dest = QED_LL2_TX_DEST_LB;
2044 } else {
2045 data->input.tx_tc = 0;
2046 data->input.tx_dest = QED_LL2_TX_DEST_NW;
2047 }
2048}
2049
2050static int qed_ll2_start_ooo(struct qed_dev *cdev,
2051 struct qed_ll2_params *params)
2052{
2053 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2054 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
2055 struct qed_ll2_acquire_data data;
2056 int rc;
2057
2058 qed_ll2_set_conn_data(cdev, &data, params,
Michal Kalderon0518c122017-06-09 17:13:22 +03002059 QED_LL2_TYPE_ISCSI_OOO, handle, true);
Mintz, Yuval13c54772017-06-09 17:13:20 +03002060
2061 rc = qed_ll2_acquire_connection(hwfn, &data);
2062 if (rc) {
2063 DP_INFO(cdev, "Failed to acquire LL2 OOO connection\n");
2064 goto out;
2065 }
2066
2067 rc = qed_ll2_establish_connection(hwfn, *handle);
2068 if (rc) {
2069 DP_INFO(cdev, "Failed to establist LL2 OOO connection\n");
2070 goto fail;
2071 }
2072
2073 return 0;
2074
2075fail:
2076 qed_ll2_release_connection(hwfn, *handle);
2077out:
2078 *handle = QED_LL2_UNUSED_HANDLE;
2079 return rc;
2080}
2081
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002082static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params)
2083{
Wei Yongjun88a24282016-10-10 14:08:28 +00002084 struct qed_ll2_buffer *buffer, *tmp_buffer;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002085 enum qed_ll2_conn_type conn_type;
Mintz, Yuval13c54772017-06-09 17:13:20 +03002086 struct qed_ll2_acquire_data data;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002087 struct qed_ptt *p_ptt;
2088 int rc, i;
Michal Kalderon0518c122017-06-09 17:13:22 +03002089
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002090
2091 /* Initialize LL2 locks & lists */
2092 INIT_LIST_HEAD(&cdev->ll2->list);
2093 spin_lock_init(&cdev->ll2->lock);
2094 cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN +
2095 L1_CACHE_BYTES + params->mtu;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002096
2097 /*Allocate memory for LL2 */
2098 DP_INFO(cdev, "Allocating LL2 buffers of size %08x bytes\n",
2099 cdev->ll2->rx_size);
2100 for (i = 0; i < QED_LL2_RX_SIZE; i++) {
2101 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
2102 if (!buffer) {
2103 DP_INFO(cdev, "Failed to allocate LL2 buffers\n");
2104 goto fail;
2105 }
2106
2107 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data,
2108 &buffer->phys_addr);
2109 if (rc) {
2110 kfree(buffer);
2111 goto fail;
2112 }
2113
2114 list_add_tail(&buffer->list, &cdev->ll2->list);
2115 }
2116
2117 switch (QED_LEADING_HWFN(cdev)->hw_info.personality) {
Arun Easi1e128c82017-02-15 06:28:22 -08002118 case QED_PCI_FCOE:
2119 conn_type = QED_LL2_TYPE_FCOE;
Arun Easi1e128c82017-02-15 06:28:22 -08002120 break;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002121 case QED_PCI_ISCSI:
2122 conn_type = QED_LL2_TYPE_ISCSI;
2123 break;
2124 case QED_PCI_ETH_ROCE:
2125 conn_type = QED_LL2_TYPE_ROCE;
2126 break;
2127 default:
2128 conn_type = QED_LL2_TYPE_TEST;
2129 }
2130
Mintz, Yuval13c54772017-06-09 17:13:20 +03002131 qed_ll2_set_conn_data(cdev, &data, params, conn_type,
Michal Kalderon0518c122017-06-09 17:13:22 +03002132 &cdev->ll2->handle, false);
Arnd Bergmann0629a332017-01-18 15:52:52 +01002133
Mintz, Yuval13c54772017-06-09 17:13:20 +03002134 rc = qed_ll2_acquire_connection(QED_LEADING_HWFN(cdev), &data);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002135 if (rc) {
2136 DP_INFO(cdev, "Failed to acquire LL2 connection\n");
2137 goto fail;
2138 }
2139
2140 rc = qed_ll2_establish_connection(QED_LEADING_HWFN(cdev),
2141 cdev->ll2->handle);
2142 if (rc) {
2143 DP_INFO(cdev, "Failed to establish LL2 connection\n");
2144 goto release_fail;
2145 }
2146
2147 /* Post all Rx buffers to FW */
2148 spin_lock_bh(&cdev->ll2->lock);
Wei Yongjun88a24282016-10-10 14:08:28 +00002149 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002150 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev),
2151 cdev->ll2->handle,
2152 buffer->phys_addr, 0, buffer, 1);
2153 if (rc) {
2154 DP_INFO(cdev,
2155 "Failed to post an Rx buffer; Deleting it\n");
2156 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
2157 cdev->ll2->rx_size, DMA_FROM_DEVICE);
2158 kfree(buffer->data);
2159 list_del(&buffer->list);
2160 kfree(buffer);
2161 } else {
2162 cdev->ll2->rx_cnt++;
2163 }
2164 }
2165 spin_unlock_bh(&cdev->ll2->lock);
2166
2167 if (!cdev->ll2->rx_cnt) {
2168 DP_INFO(cdev, "Failed passing even a single Rx buffer\n");
2169 goto release_terminate;
2170 }
2171
2172 if (!is_valid_ether_addr(params->ll2_mac_address)) {
2173 DP_INFO(cdev, "Invalid Ethernet address\n");
2174 goto release_terminate;
2175 }
2176
Yuval Mintz1d6cff42016-12-01 00:21:07 -08002177 if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI &&
2178 cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable) {
2179 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n");
2180 rc = qed_ll2_start_ooo(cdev, params);
2181 if (rc) {
2182 DP_INFO(cdev,
2183 "Failed to initialize the OOO LL2 queue\n");
2184 goto release_terminate;
2185 }
2186 }
2187
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002188 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
2189 if (!p_ptt) {
2190 DP_INFO(cdev, "Failed to acquire PTT\n");
2191 goto release_terminate;
2192 }
2193
2194 rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
2195 params->ll2_mac_address);
2196 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
2197 if (rc) {
2198 DP_ERR(cdev, "Failed to allocate LLH filter\n");
2199 goto release_terminate_all;
2200 }
2201
2202 ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002203 return 0;
2204
2205release_terminate_all:
2206
2207release_terminate:
2208 qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2209release_fail:
2210 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2211fail:
2212 qed_ll2_kill_buffers(cdev);
2213 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2214 return -EINVAL;
2215}
2216
2217static int qed_ll2_stop(struct qed_dev *cdev)
2218{
2219 struct qed_ptt *p_ptt;
2220 int rc;
2221
2222 if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE)
2223 return 0;
2224
2225 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
2226 if (!p_ptt) {
2227 DP_INFO(cdev, "Failed to acquire PTT\n");
2228 goto fail;
2229 }
2230
2231 qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
2232 cdev->ll2_mac_address);
2233 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
2234 eth_zero_addr(cdev->ll2_mac_address);
2235
Yuval Mintz1d6cff42016-12-01 00:21:07 -08002236 if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI &&
2237 cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable)
2238 qed_ll2_stop_ooo(cdev);
2239
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002240 rc = qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev),
2241 cdev->ll2->handle);
2242 if (rc)
2243 DP_INFO(cdev, "Failed to terminate LL2 connection\n");
2244
2245 qed_ll2_kill_buffers(cdev);
2246
2247 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2248 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2249
2250 return rc;
2251fail:
2252 return -EINVAL;
2253}
2254
2255static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb)
2256{
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03002257 struct qed_ll2_tx_pkt_info pkt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002258 const skb_frag_t *frag;
2259 int rc = -EINVAL, i;
2260 dma_addr_t mapping;
2261 u16 vlan = 0;
2262 u8 flags = 0;
2263
2264 if (unlikely(skb->ip_summed != CHECKSUM_NONE)) {
2265 DP_INFO(cdev, "Cannot transmit a checksumed packet\n");
2266 return -EINVAL;
2267 }
2268
2269 if (1 + skb_shinfo(skb)->nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) {
2270 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n",
2271 1 + skb_shinfo(skb)->nr_frags);
2272 return -EINVAL;
2273 }
2274
2275 mapping = dma_map_single(&cdev->pdev->dev, skb->data,
2276 skb->len, DMA_TO_DEVICE);
2277 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2278 DP_NOTICE(cdev, "SKB mapping failed\n");
2279 return -EINVAL;
2280 }
2281
2282 /* Request HW to calculate IP csum */
2283 if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) &&
2284 ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02002285 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002286
2287 if (skb_vlan_tag_present(skb)) {
2288 vlan = skb_vlan_tag_get(skb);
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02002289 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002290 }
2291
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03002292 memset(&pkt, 0, sizeof(pkt));
2293 pkt.num_of_bds = 1 + skb_shinfo(skb)->nr_frags;
2294 pkt.vlan = vlan;
2295 pkt.bd_flags = flags;
2296 pkt.tx_dest = QED_LL2_TX_DEST_NW;
2297 pkt.first_frag = mapping;
2298 pkt.first_frag_len = skb->len;
2299 pkt.cookie = skb;
2300
2301 rc = qed_ll2_prepare_tx_packet(&cdev->hwfns[0], cdev->ll2->handle,
2302 &pkt, 1);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002303 if (rc)
2304 goto err;
2305
2306 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2307 frag = &skb_shinfo(skb)->frags[i];
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002308
Mintz, Yuvald2201a22017-06-09 17:13:23 +03002309 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0,
2310 skb_frag_size(frag), DMA_TO_DEVICE);
2311
2312 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2313 DP_NOTICE(cdev,
2314 "Unable to map frag - dropping packet\n");
2315 goto err;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002316 }
2317
2318 rc = qed_ll2_set_fragment_of_tx_packet(QED_LEADING_HWFN(cdev),
2319 cdev->ll2->handle,
2320 mapping,
2321 skb_frag_size(frag));
2322
2323 /* if failed not much to do here, partial packet has been posted
2324 * we can't free memory, will need to wait for completion.
2325 */
2326 if (rc)
2327 goto err2;
2328 }
2329
2330 return 0;
2331
2332err:
2333 dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE);
2334
2335err2:
2336 return rc;
2337}
2338
2339static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats)
2340{
2341 if (!cdev->ll2)
2342 return -EINVAL;
2343
2344 return qed_ll2_get_stats(QED_LEADING_HWFN(cdev),
2345 cdev->ll2->handle, stats);
2346}
2347
2348const struct qed_ll2_ops qed_ll2_ops_pass = {
2349 .start = &qed_ll2_start,
2350 .stop = &qed_ll2_stop,
2351 .start_xmit = &qed_ll2_start_xmit,
2352 .register_cb_ops = &qed_ll2_register_cb_ops,
2353 .get_stats = &qed_ll2_stats,
2354};
2355
2356int qed_ll2_alloc_if(struct qed_dev *cdev)
2357{
2358 cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL);
2359 return cdev->ll2 ? 0 : -ENOMEM;
2360}
2361
2362void qed_ll2_dealloc_if(struct qed_dev *cdev)
2363{
2364 kfree(cdev->ll2);
2365 cdev->ll2 = NULL;
2366}