Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 1 | /* |
Kevin Hilman | 5526b3f | 2009-04-14 09:50:37 -0500 | [diff] [blame^] | 2 | * Utility to set the DAVINCI MUX register from a table in mux.h |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 3 | * |
| 4 | * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> |
| 5 | * |
Kevin Hilman | 5526b3f | 2009-04-14 09:50:37 -0500 | [diff] [blame^] | 6 | * Based on linux/arch/arm/plat-omap/mux.c: |
| 7 | * Copyright (C) 2003 - 2005 Nokia Corporation |
| 8 | * |
| 9 | * Written by Tony Lindgren |
| 10 | * |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 11 | * 2007 (c) MontaVista Software, Inc. This file is licensed under |
| 12 | * the terms of the GNU General Public License version 2. This program |
| 13 | * is licensed "as is" without any warranty of any kind, whether express |
| 14 | * or implied. |
Kevin Hilman | 5526b3f | 2009-04-14 09:50:37 -0500 | [diff] [blame^] | 15 | * |
| 16 | * Copyright (C) 2008 Texas Instruments. |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 17 | */ |
| 18 | #include <linux/io.h> |
Kevin Hilman | 5526b3f | 2009-04-14 09:50:37 -0500 | [diff] [blame^] | 19 | #include <linux/module.h> |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 20 | #include <linux/spinlock.h> |
| 21 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 22 | #include <mach/hardware.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 23 | #include <mach/mux.h> |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 24 | |
Kevin Hilman | 5526b3f | 2009-04-14 09:50:37 -0500 | [diff] [blame^] | 25 | static const struct mux_config *mux_table; |
| 26 | static unsigned long pin_table_sz; |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 27 | |
Kevin Hilman | 5526b3f | 2009-04-14 09:50:37 -0500 | [diff] [blame^] | 28 | int __init davinci_mux_register(const struct mux_config *pins, |
| 29 | unsigned long size) |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 30 | { |
Kevin Hilman | 5526b3f | 2009-04-14 09:50:37 -0500 | [diff] [blame^] | 31 | mux_table = pins; |
| 32 | pin_table_sz = size; |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 33 | |
Kevin Hilman | 5526b3f | 2009-04-14 09:50:37 -0500 | [diff] [blame^] | 34 | return 0; |
| 35 | } |
| 36 | |
| 37 | /* |
| 38 | * Sets the DAVINCI MUX register based on the table |
| 39 | */ |
| 40 | int __init_or_module davinci_cfg_reg(const unsigned long index) |
| 41 | { |
| 42 | static DEFINE_SPINLOCK(mux_spin_lock); |
| 43 | void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE); |
| 44 | unsigned long flags; |
| 45 | const struct mux_config *cfg; |
| 46 | unsigned int reg_orig = 0, reg = 0; |
| 47 | unsigned int mask, warn = 0; |
| 48 | |
| 49 | if (!mux_table) |
| 50 | BUG(); |
| 51 | |
| 52 | if (index >= pin_table_sz) { |
| 53 | printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n", |
| 54 | index, pin_table_sz); |
| 55 | dump_stack(); |
| 56 | return -ENODEV; |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 57 | } |
| 58 | |
Kevin Hilman | 5526b3f | 2009-04-14 09:50:37 -0500 | [diff] [blame^] | 59 | cfg = &mux_table[index]; |
| 60 | |
| 61 | if (cfg->name == NULL) { |
| 62 | printk(KERN_ERR "No entry for the specified index\n"); |
| 63 | return -ENODEV; |
| 64 | } |
| 65 | |
| 66 | /* Update the mux register in question */ |
| 67 | if (cfg->mask) { |
| 68 | unsigned tmp1, tmp2; |
| 69 | |
| 70 | spin_lock_irqsave(&mux_spin_lock, flags); |
| 71 | reg_orig = __raw_readl(base + cfg->mux_reg); |
| 72 | |
| 73 | mask = (cfg->mask << cfg->mask_offset); |
| 74 | tmp1 = reg_orig & mask; |
| 75 | reg = reg_orig & ~mask; |
| 76 | |
| 77 | tmp2 = (cfg->mode << cfg->mask_offset); |
| 78 | reg |= tmp2; |
| 79 | |
| 80 | if (tmp1 != tmp2) |
| 81 | warn = 1; |
| 82 | |
| 83 | __raw_writel(reg, base + cfg->mux_reg); |
| 84 | spin_unlock_irqrestore(&mux_spin_lock, flags); |
| 85 | } |
| 86 | |
| 87 | if (warn) { |
| 88 | #ifdef CONFIG_DAVINCI_MUX_WARNINGS |
| 89 | printk(KERN_WARNING "MUX: initialized %s\n", cfg->name); |
| 90 | #endif |
| 91 | } |
| 92 | |
| 93 | #ifdef CONFIG_DAVINCI_MUX_DEBUG |
| 94 | if (cfg->debug || warn) { |
| 95 | printk(KERN_WARNING "MUX: Setting register %s\n", cfg->name); |
| 96 | printk(KERN_WARNING " %s (0x%08x) = 0x%08x -> 0x%08x\n", |
| 97 | cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); |
| 98 | } |
| 99 | #endif |
| 100 | |
| 101 | return 0; |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 102 | } |
Kevin Hilman | 5526b3f | 2009-04-14 09:50:37 -0500 | [diff] [blame^] | 103 | EXPORT_SYMBOL(davinci_cfg_reg); |