blob: 0dd72f85791ec274e9c2dbc980fb5bd0fb77c096 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Jiri Pirkoc4745502016-02-26 17:32:26 +010052#include <net/devlink.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020053#include <net/switchdev.h>
54#include <generated/utsrelease.h>
55
56#include "spectrum.h"
57#include "core.h"
58#include "reg.h"
59#include "port.h"
60#include "trap.h"
61#include "txheader.h"
62
63static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
64static const char mlxsw_sp_driver_version[] = "1.0";
65
66/* tx_hdr_version
67 * Tx header version.
68 * Must be set to 1.
69 */
70MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
71
72/* tx_hdr_ctl
73 * Packet control type.
74 * 0 - Ethernet control (e.g. EMADs, LACP)
75 * 1 - Ethernet data
76 */
77MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
78
79/* tx_hdr_proto
80 * Packet protocol type. Must be set to 1 (Ethernet).
81 */
82MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
83
84/* tx_hdr_rx_is_router
85 * Packet is sent from the router. Valid for data packets only.
86 */
87MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
88
89/* tx_hdr_fid_valid
90 * Indicates if the 'fid' field is valid and should be used for
91 * forwarding lookup. Valid for data packets only.
92 */
93MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
94
95/* tx_hdr_swid
96 * Switch partition ID. Must be set to 0.
97 */
98MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
99
100/* tx_hdr_control_tclass
101 * Indicates if the packet should use the control TClass and not one
102 * of the data TClasses.
103 */
104MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
105
106/* tx_hdr_etclass
107 * Egress TClass to be used on the egress device on the egress port.
108 */
109MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
110
111/* tx_hdr_port_mid
112 * Destination local port for unicast packets.
113 * Destination multicast ID for multicast packets.
114 *
115 * Control packets are directed to a specific egress port, while data
116 * packets are transmitted through the CPU port (0) into the switch partition,
117 * where forwarding rules are applied.
118 */
119MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
120
121/* tx_hdr_fid
122 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
123 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
124 * Valid for data packets only.
125 */
126MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
127
128/* tx_hdr_type
129 * 0 - Data packets
130 * 6 - Control packets
131 */
132MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
133
134static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
135 const struct mlxsw_tx_info *tx_info)
136{
137 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
138
139 memset(txhdr, 0, MLXSW_TXHDR_LEN);
140
141 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
142 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
143 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
144 mlxsw_tx_hdr_swid_set(txhdr, 0);
145 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
146 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
147 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
148}
149
150static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
151{
152 char spad_pl[MLXSW_REG_SPAD_LEN];
153 int err;
154
155 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
156 if (err)
157 return err;
158 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
159 return 0;
160}
161
162static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
163 bool is_up)
164{
165 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
166 char paos_pl[MLXSW_REG_PAOS_LEN];
167
168 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
169 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
170 MLXSW_PORT_ADMIN_STATUS_DOWN);
171 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
172}
173
174static int mlxsw_sp_port_oper_status_get(struct mlxsw_sp_port *mlxsw_sp_port,
175 bool *p_is_up)
176{
177 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
178 char paos_pl[MLXSW_REG_PAOS_LEN];
179 u8 oper_status;
180 int err;
181
182 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port, 0);
183 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
184 if (err)
185 return err;
186 oper_status = mlxsw_reg_paos_oper_status_get(paos_pl);
187 *p_is_up = oper_status == MLXSW_PORT_ADMIN_STATUS_UP ? true : false;
188 return 0;
189}
190
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200191static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
192 unsigned char *addr)
193{
194 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
195 char ppad_pl[MLXSW_REG_PPAD_LEN];
196
197 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
198 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
199 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
200}
201
202static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
203{
204 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
205 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
206
207 ether_addr_copy(addr, mlxsw_sp->base_mac);
208 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
209 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
210}
211
212static int mlxsw_sp_port_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
213 u16 vid, enum mlxsw_reg_spms_state state)
214{
215 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
216 char *spms_pl;
217 int err;
218
219 spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
220 if (!spms_pl)
221 return -ENOMEM;
222 mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
223 mlxsw_reg_spms_vid_pack(spms_pl, vid, state);
224 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
225 kfree(spms_pl);
226 return err;
227}
228
229static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
230{
231 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
232 char pmtu_pl[MLXSW_REG_PMTU_LEN];
233 int max_mtu;
234 int err;
235
236 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
237 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
238 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
239 if (err)
240 return err;
241 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
242
243 if (mtu > max_mtu)
244 return -EINVAL;
245
246 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
247 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
248}
249
250static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
251{
252 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
253 char pspa_pl[MLXSW_REG_PSPA_LEN];
254
255 mlxsw_reg_pspa_pack(pspa_pl, swid, mlxsw_sp_port->local_port);
256 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
257}
258
259static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
260 bool enable)
261{
262 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
263 char svpe_pl[MLXSW_REG_SVPE_LEN];
264
265 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
266 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
267}
268
269int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
270 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
271 u16 vid)
272{
273 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
274 char svfa_pl[MLXSW_REG_SVFA_LEN];
275
276 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
277 fid, vid);
278 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
279}
280
281static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
282 u16 vid, bool learn_enable)
283{
284 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
285 char *spvmlr_pl;
286 int err;
287
288 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
289 if (!spvmlr_pl)
290 return -ENOMEM;
291 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
292 learn_enable);
293 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
294 kfree(spvmlr_pl);
295 return err;
296}
297
298static int
299mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
300{
301 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
302 char sspr_pl[MLXSW_REG_SSPR_LEN];
303
304 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
305 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
306}
307
308static int mlxsw_sp_port_module_check(struct mlxsw_sp_port *mlxsw_sp_port,
309 bool *p_usable)
310{
311 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
312 char pmlp_pl[MLXSW_REG_PMLP_LEN];
313 int err;
314
315 mlxsw_reg_pmlp_pack(pmlp_pl, mlxsw_sp_port->local_port);
316 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
317 if (err)
318 return err;
319 *p_usable = mlxsw_reg_pmlp_width_get(pmlp_pl) ? true : false;
320 return 0;
321}
322
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100323static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
324{
325 char pmlp_pl[MLXSW_REG_PMLP_LEN];
326
327 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
328 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
329 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
330}
331
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200332static int mlxsw_sp_port_open(struct net_device *dev)
333{
334 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
335 int err;
336
337 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
338 if (err)
339 return err;
340 netif_start_queue(dev);
341 return 0;
342}
343
344static int mlxsw_sp_port_stop(struct net_device *dev)
345{
346 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
347
348 netif_stop_queue(dev);
349 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
350}
351
352static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
353 struct net_device *dev)
354{
355 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
356 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
357 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
358 const struct mlxsw_tx_info tx_info = {
359 .local_port = mlxsw_sp_port->local_port,
360 .is_emad = false,
361 };
362 u64 len;
363 int err;
364
365 if (mlxsw_core_skb_transmit_busy(mlxsw_sp, &tx_info))
366 return NETDEV_TX_BUSY;
367
368 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
369 struct sk_buff *skb_orig = skb;
370
371 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
372 if (!skb) {
373 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
374 dev_kfree_skb_any(skb_orig);
375 return NETDEV_TX_OK;
376 }
377 }
378
379 if (eth_skb_pad(skb)) {
380 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
381 return NETDEV_TX_OK;
382 }
383
384 mlxsw_sp_txhdr_construct(skb, &tx_info);
385 len = skb->len;
386 /* Due to a race we might fail here because of a full queue. In that
387 * unlikely case we simply drop the packet.
388 */
389 err = mlxsw_core_skb_transmit(mlxsw_sp, skb, &tx_info);
390
391 if (!err) {
392 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
393 u64_stats_update_begin(&pcpu_stats->syncp);
394 pcpu_stats->tx_packets++;
395 pcpu_stats->tx_bytes += len;
396 u64_stats_update_end(&pcpu_stats->syncp);
397 } else {
398 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
399 dev_kfree_skb_any(skb);
400 }
401 return NETDEV_TX_OK;
402}
403
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100404static void mlxsw_sp_set_rx_mode(struct net_device *dev)
405{
406}
407
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200408static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
409{
410 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
411 struct sockaddr *addr = p;
412 int err;
413
414 if (!is_valid_ether_addr(addr->sa_data))
415 return -EADDRNOTAVAIL;
416
417 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
418 if (err)
419 return err;
420 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
421 return 0;
422}
423
424static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
425{
426 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
427 int err;
428
429 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
430 if (err)
431 return err;
432 dev->mtu = mtu;
433 return 0;
434}
435
436static struct rtnl_link_stats64 *
437mlxsw_sp_port_get_stats64(struct net_device *dev,
438 struct rtnl_link_stats64 *stats)
439{
440 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
441 struct mlxsw_sp_port_pcpu_stats *p;
442 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
443 u32 tx_dropped = 0;
444 unsigned int start;
445 int i;
446
447 for_each_possible_cpu(i) {
448 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
449 do {
450 start = u64_stats_fetch_begin_irq(&p->syncp);
451 rx_packets = p->rx_packets;
452 rx_bytes = p->rx_bytes;
453 tx_packets = p->tx_packets;
454 tx_bytes = p->tx_bytes;
455 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
456
457 stats->rx_packets += rx_packets;
458 stats->rx_bytes += rx_bytes;
459 stats->tx_packets += tx_packets;
460 stats->tx_bytes += tx_bytes;
461 /* tx_dropped is u32, updated without syncp protection. */
462 tx_dropped += p->tx_dropped;
463 }
464 stats->tx_dropped = tx_dropped;
465 return stats;
466}
467
468int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
469 u16 vid_end, bool is_member, bool untagged)
470{
471 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
472 char *spvm_pl;
473 int err;
474
475 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
476 if (!spvm_pl)
477 return -ENOMEM;
478
479 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
480 vid_end, is_member, untagged);
481 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
482 kfree(spvm_pl);
483 return err;
484}
485
486static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
487{
488 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
489 u16 vid, last_visited_vid;
490 int err;
491
492 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
493 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
494 vid);
495 if (err) {
496 last_visited_vid = vid;
497 goto err_port_vid_to_fid_set;
498 }
499 }
500
501 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
502 if (err) {
503 last_visited_vid = VLAN_N_VID;
504 goto err_port_vid_to_fid_set;
505 }
506
507 return 0;
508
509err_port_vid_to_fid_set:
510 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
511 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
512 vid);
513 return err;
514}
515
516static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
517{
518 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
519 u16 vid;
520 int err;
521
522 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
523 if (err)
524 return err;
525
526 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
527 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
528 vid, vid);
529 if (err)
530 return err;
531 }
532
533 return 0;
534}
535
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100536static struct mlxsw_sp_vfid *
537mlxsw_sp_vfid_find(const struct mlxsw_sp *mlxsw_sp, u16 vid)
538{
539 struct mlxsw_sp_vfid *vfid;
540
541 list_for_each_entry(vfid, &mlxsw_sp->port_vfids.list, list) {
542 if (vfid->vid == vid)
543 return vfid;
544 }
545
546 return NULL;
547}
548
549static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
550{
551 return find_first_zero_bit(mlxsw_sp->port_vfids.mapped,
552 MLXSW_SP_VFID_PORT_MAX);
553}
554
555static int __mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp, u16 vfid)
556{
557 u16 fid = mlxsw_sp_vfid_to_fid(vfid);
558 char sfmr_pl[MLXSW_REG_SFMR_LEN];
559
560 mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_CREATE_FID, fid, 0);
561 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
562}
563
564static void __mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp, u16 vfid)
565{
566 u16 fid = mlxsw_sp_vfid_to_fid(vfid);
567 char sfmr_pl[MLXSW_REG_SFMR_LEN];
568
569 mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_DESTROY_FID, fid, 0);
570 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
571}
572
573static struct mlxsw_sp_vfid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
574 u16 vid)
575{
576 struct device *dev = mlxsw_sp->bus_info->dev;
577 struct mlxsw_sp_vfid *vfid;
578 u16 n_vfid;
579 int err;
580
581 n_vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
582 if (n_vfid == MLXSW_SP_VFID_PORT_MAX) {
583 dev_err(dev, "No available vFIDs\n");
584 return ERR_PTR(-ERANGE);
585 }
586
587 err = __mlxsw_sp_vfid_create(mlxsw_sp, n_vfid);
588 if (err) {
589 dev_err(dev, "Failed to create vFID=%d\n", n_vfid);
590 return ERR_PTR(err);
591 }
592
593 vfid = kzalloc(sizeof(*vfid), GFP_KERNEL);
594 if (!vfid)
595 goto err_allocate_vfid;
596
597 vfid->vfid = n_vfid;
598 vfid->vid = vid;
599
600 list_add(&vfid->list, &mlxsw_sp->port_vfids.list);
601 set_bit(n_vfid, mlxsw_sp->port_vfids.mapped);
602
603 return vfid;
604
605err_allocate_vfid:
606 __mlxsw_sp_vfid_destroy(mlxsw_sp, n_vfid);
607 return ERR_PTR(-ENOMEM);
608}
609
610static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
611 struct mlxsw_sp_vfid *vfid)
612{
613 clear_bit(vfid->vfid, mlxsw_sp->port_vfids.mapped);
614 list_del(&vfid->list);
615
616 __mlxsw_sp_vfid_destroy(mlxsw_sp, vfid->vfid);
617
618 kfree(vfid);
619}
620
621static struct mlxsw_sp_port *
622mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port,
623 struct mlxsw_sp_vfid *vfid)
624{
625 struct mlxsw_sp_port *mlxsw_sp_vport;
626
627 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
628 if (!mlxsw_sp_vport)
629 return NULL;
630
631 /* dev will be set correctly after the VLAN device is linked
632 * with the real device. In case of bridge SELF invocation, dev
633 * will remain as is.
634 */
635 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
636 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
637 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
638 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +0100639 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
640 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100641 mlxsw_sp_vport->vport.vfid = vfid;
642 mlxsw_sp_vport->vport.vid = vfid->vid;
643
644 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
645
646 return mlxsw_sp_vport;
647}
648
649static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
650{
651 list_del(&mlxsw_sp_vport->vport.list);
652 kfree(mlxsw_sp_vport);
653}
654
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200655int mlxsw_sp_port_add_vid(struct net_device *dev, __be16 __always_unused proto,
656 u16 vid)
657{
658 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
659 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100660 struct mlxsw_sp_port *mlxsw_sp_vport;
661 struct mlxsw_sp_vfid *vfid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200662 int err;
663
664 /* VLAN 0 is added to HW filter when device goes up, but it is
665 * reserved in our case, so simply return.
666 */
667 if (!vid)
668 return 0;
669
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100670 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200671 netdev_warn(dev, "VID=%d already configured\n", vid);
672 return 0;
673 }
674
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100675 vfid = mlxsw_sp_vfid_find(mlxsw_sp, vid);
676 if (!vfid) {
677 vfid = mlxsw_sp_vfid_create(mlxsw_sp, vid);
678 if (IS_ERR(vfid)) {
679 netdev_err(dev, "Failed to create vFID for VID=%d\n",
680 vid);
681 return PTR_ERR(vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200682 }
683 }
684
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100685 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vfid);
686 if (!mlxsw_sp_vport) {
687 netdev_err(dev, "Failed to create vPort for VID=%d\n", vid);
688 err = -ENOMEM;
689 goto err_port_vport_create;
690 }
691
692 if (!vfid->nr_vports) {
693 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid,
Ido Schimmel19ae6122015-12-15 16:03:39 +0100694 true, false);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100695 if (err) {
696 netdev_err(dev, "Failed to setup flooding for vFID=%d\n",
697 vfid->vfid);
698 goto err_vport_flood_set;
699 }
700 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200701
702 /* When adding the first VLAN interface on a bridged port we need to
703 * transition all the active 802.1Q bridge VLANs to use explicit
704 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
705 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100706 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200707 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
708 if (err) {
709 netdev_err(dev, "Failed to set to Virtual mode\n");
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100710 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200711 }
712 }
713
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100714 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200715 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100716 true,
717 mlxsw_sp_vfid_to_fid(vfid->vfid),
718 vid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200719 if (err) {
720 netdev_err(dev, "Failed to map {Port, VID=%d} to vFID=%d\n",
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100721 vid, vfid->vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200722 goto err_port_vid_to_fid_set;
723 }
724
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100725 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200726 if (err) {
727 netdev_err(dev, "Failed to disable learning for VID=%d\n", vid);
728 goto err_port_vid_learning_set;
729 }
730
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100731 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200732 if (err) {
733 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
734 vid);
735 goto err_port_add_vid;
736 }
737
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100738 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_vport, vid,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200739 MLXSW_REG_SPMS_STATE_FORWARDING);
740 if (err) {
741 netdev_err(dev, "Failed to set STP state for VID=%d\n", vid);
742 goto err_port_stp_state_set;
743 }
744
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100745 vfid->nr_vports++;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200746
747 return 0;
748
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200749err_port_stp_state_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100750 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200751err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100752 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200753err_port_vid_learning_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100754 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200755 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID, false,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100756 mlxsw_sp_vfid_to_fid(vfid->vfid), vid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200757err_port_vid_to_fid_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100758 if (list_is_singular(&mlxsw_sp_port->vports_list))
759 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
760err_port_vp_mode_trans:
761 if (!vfid->nr_vports)
Ido Schimmel19ae6122015-12-15 16:03:39 +0100762 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid, false,
763 false);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100764err_vport_flood_set:
765 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
766err_port_vport_create:
767 if (!vfid->nr_vports)
768 mlxsw_sp_vfid_destroy(mlxsw_sp, vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200769 return err;
770}
771
772int mlxsw_sp_port_kill_vid(struct net_device *dev,
773 __be16 __always_unused proto, u16 vid)
774{
775 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100776 struct mlxsw_sp_port *mlxsw_sp_vport;
777 struct mlxsw_sp_vfid *vfid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200778 int err;
779
780 /* VLAN 0 is removed from HW filter when device goes down, but
781 * it is reserved in our case, so simply return.
782 */
783 if (!vid)
784 return 0;
785
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100786 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
787 if (!mlxsw_sp_vport) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200788 netdev_warn(dev, "VID=%d does not exist\n", vid);
789 return 0;
790 }
791
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100792 vfid = mlxsw_sp_vport->vport.vfid;
793
794 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_vport, vid,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200795 MLXSW_REG_SPMS_STATE_DISCARDING);
796 if (err) {
797 netdev_err(dev, "Failed to set STP state for VID=%d\n", vid);
798 return err;
799 }
800
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100801 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200802 if (err) {
803 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
804 vid);
805 return err;
806 }
807
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100808 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200809 if (err) {
810 netdev_err(dev, "Failed to enable learning for VID=%d\n", vid);
811 return err;
812 }
813
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100814 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200815 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100816 false,
817 mlxsw_sp_vfid_to_fid(vfid->vfid),
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200818 vid);
819 if (err) {
820 netdev_err(dev, "Failed to invalidate {Port, VID=%d} to vFID=%d mapping\n",
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100821 vid, vfid->vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200822 return err;
823 }
824
825 /* When removing the last VLAN interface on a bridged port we need to
826 * transition all active 802.1Q bridge VLANs to use VID to FID
827 * mappings and set port's mode to VLAN mode.
828 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100829 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200830 err = mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
831 if (err) {
832 netdev_err(dev, "Failed to set to VLAN mode\n");
833 return err;
834 }
835 }
836
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100837 vfid->nr_vports--;
838 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
839
840 /* Destroy the vFID if no vPorts are assigned to it anymore. */
841 if (!vfid->nr_vports)
842 mlxsw_sp_vfid_destroy(mlxsw_sp_port->mlxsw_sp, vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200843
844 return 0;
845}
846
847static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
848 .ndo_open = mlxsw_sp_port_open,
849 .ndo_stop = mlxsw_sp_port_stop,
850 .ndo_start_xmit = mlxsw_sp_port_xmit,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100851 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200852 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
853 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
854 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
855 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
856 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
857 .ndo_fdb_add = switchdev_port_fdb_add,
858 .ndo_fdb_del = switchdev_port_fdb_del,
859 .ndo_fdb_dump = switchdev_port_fdb_dump,
860 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
861 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
862 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
863};
864
865static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
866 struct ethtool_drvinfo *drvinfo)
867{
868 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
869 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
870
871 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
872 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
873 sizeof(drvinfo->version));
874 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
875 "%d.%d.%d",
876 mlxsw_sp->bus_info->fw_rev.major,
877 mlxsw_sp->bus_info->fw_rev.minor,
878 mlxsw_sp->bus_info->fw_rev.subminor);
879 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
880 sizeof(drvinfo->bus_info));
881}
882
883struct mlxsw_sp_port_hw_stats {
884 char str[ETH_GSTRING_LEN];
885 u64 (*getter)(char *payload);
886};
887
888static const struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
889 {
890 .str = "a_frames_transmitted_ok",
891 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
892 },
893 {
894 .str = "a_frames_received_ok",
895 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
896 },
897 {
898 .str = "a_frame_check_sequence_errors",
899 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
900 },
901 {
902 .str = "a_alignment_errors",
903 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
904 },
905 {
906 .str = "a_octets_transmitted_ok",
907 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
908 },
909 {
910 .str = "a_octets_received_ok",
911 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
912 },
913 {
914 .str = "a_multicast_frames_xmitted_ok",
915 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
916 },
917 {
918 .str = "a_broadcast_frames_xmitted_ok",
919 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
920 },
921 {
922 .str = "a_multicast_frames_received_ok",
923 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
924 },
925 {
926 .str = "a_broadcast_frames_received_ok",
927 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
928 },
929 {
930 .str = "a_in_range_length_errors",
931 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
932 },
933 {
934 .str = "a_out_of_range_length_field",
935 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
936 },
937 {
938 .str = "a_frame_too_long_errors",
939 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
940 },
941 {
942 .str = "a_symbol_error_during_carrier",
943 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
944 },
945 {
946 .str = "a_mac_control_frames_transmitted",
947 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
948 },
949 {
950 .str = "a_mac_control_frames_received",
951 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
952 },
953 {
954 .str = "a_unsupported_opcodes_received",
955 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
956 },
957 {
958 .str = "a_pause_mac_ctrl_frames_received",
959 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
960 },
961 {
962 .str = "a_pause_mac_ctrl_frames_xmitted",
963 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
964 },
965};
966
967#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
968
969static void mlxsw_sp_port_get_strings(struct net_device *dev,
970 u32 stringset, u8 *data)
971{
972 u8 *p = data;
973 int i;
974
975 switch (stringset) {
976 case ETH_SS_STATS:
977 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
978 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
979 ETH_GSTRING_LEN);
980 p += ETH_GSTRING_LEN;
981 }
982 break;
983 }
984}
985
Ido Schimmel3a66ee32015-11-27 13:45:55 +0100986static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
987 enum ethtool_phys_id_state state)
988{
989 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
990 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
991 char mlcr_pl[MLXSW_REG_MLCR_LEN];
992 bool active;
993
994 switch (state) {
995 case ETHTOOL_ID_ACTIVE:
996 active = true;
997 break;
998 case ETHTOOL_ID_INACTIVE:
999 active = false;
1000 break;
1001 default:
1002 return -EOPNOTSUPP;
1003 }
1004
1005 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1006 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1007}
1008
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001009static void mlxsw_sp_port_get_stats(struct net_device *dev,
1010 struct ethtool_stats *stats, u64 *data)
1011{
1012 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1013 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1014 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
1015 int i;
1016 int err;
1017
1018 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port);
1019 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
1020 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++)
1021 data[i] = !err ? mlxsw_sp_port_hw_stats[i].getter(ppcnt_pl) : 0;
1022}
1023
1024static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1025{
1026 switch (sset) {
1027 case ETH_SS_STATS:
1028 return MLXSW_SP_PORT_HW_STATS_LEN;
1029 default:
1030 return -EOPNOTSUPP;
1031 }
1032}
1033
1034struct mlxsw_sp_port_link_mode {
1035 u32 mask;
1036 u32 supported;
1037 u32 advertised;
1038 u32 speed;
1039};
1040
1041static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1042 {
1043 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1044 .supported = SUPPORTED_100baseT_Full,
1045 .advertised = ADVERTISED_100baseT_Full,
1046 .speed = 100,
1047 },
1048 {
1049 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1050 .speed = 100,
1051 },
1052 {
1053 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1054 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1055 .supported = SUPPORTED_1000baseKX_Full,
1056 .advertised = ADVERTISED_1000baseKX_Full,
1057 .speed = 1000,
1058 },
1059 {
1060 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1061 .supported = SUPPORTED_10000baseT_Full,
1062 .advertised = ADVERTISED_10000baseT_Full,
1063 .speed = 10000,
1064 },
1065 {
1066 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1067 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1068 .supported = SUPPORTED_10000baseKX4_Full,
1069 .advertised = ADVERTISED_10000baseKX4_Full,
1070 .speed = 10000,
1071 },
1072 {
1073 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1074 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1075 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1076 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1077 .supported = SUPPORTED_10000baseKR_Full,
1078 .advertised = ADVERTISED_10000baseKR_Full,
1079 .speed = 10000,
1080 },
1081 {
1082 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1083 .supported = SUPPORTED_20000baseKR2_Full,
1084 .advertised = ADVERTISED_20000baseKR2_Full,
1085 .speed = 20000,
1086 },
1087 {
1088 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1089 .supported = SUPPORTED_40000baseCR4_Full,
1090 .advertised = ADVERTISED_40000baseCR4_Full,
1091 .speed = 40000,
1092 },
1093 {
1094 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1095 .supported = SUPPORTED_40000baseKR4_Full,
1096 .advertised = ADVERTISED_40000baseKR4_Full,
1097 .speed = 40000,
1098 },
1099 {
1100 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1101 .supported = SUPPORTED_40000baseSR4_Full,
1102 .advertised = ADVERTISED_40000baseSR4_Full,
1103 .speed = 40000,
1104 },
1105 {
1106 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1107 .supported = SUPPORTED_40000baseLR4_Full,
1108 .advertised = ADVERTISED_40000baseLR4_Full,
1109 .speed = 40000,
1110 },
1111 {
1112 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1113 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1114 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1115 .speed = 25000,
1116 },
1117 {
1118 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1119 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1120 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1121 .speed = 50000,
1122 },
1123 {
1124 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1125 .supported = SUPPORTED_56000baseKR4_Full,
1126 .advertised = ADVERTISED_56000baseKR4_Full,
1127 .speed = 56000,
1128 },
1129 {
1130 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1131 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1132 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1133 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1134 .speed = 100000,
1135 },
1136};
1137
1138#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1139
1140static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1141{
1142 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1143 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1144 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1145 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1146 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1147 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1148 return SUPPORTED_FIBRE;
1149
1150 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1151 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1152 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1153 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1154 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1155 return SUPPORTED_Backplane;
1156 return 0;
1157}
1158
1159static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1160{
1161 u32 modes = 0;
1162 int i;
1163
1164 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1165 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1166 modes |= mlxsw_sp_port_link_mode[i].supported;
1167 }
1168 return modes;
1169}
1170
1171static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1172{
1173 u32 modes = 0;
1174 int i;
1175
1176 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1177 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1178 modes |= mlxsw_sp_port_link_mode[i].advertised;
1179 }
1180 return modes;
1181}
1182
1183static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1184 struct ethtool_cmd *cmd)
1185{
1186 u32 speed = SPEED_UNKNOWN;
1187 u8 duplex = DUPLEX_UNKNOWN;
1188 int i;
1189
1190 if (!carrier_ok)
1191 goto out;
1192
1193 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1194 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1195 speed = mlxsw_sp_port_link_mode[i].speed;
1196 duplex = DUPLEX_FULL;
1197 break;
1198 }
1199 }
1200out:
1201 ethtool_cmd_speed_set(cmd, speed);
1202 cmd->duplex = duplex;
1203}
1204
1205static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1206{
1207 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1208 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1209 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1210 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1211 return PORT_FIBRE;
1212
1213 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1214 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1215 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1216 return PORT_DA;
1217
1218 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1219 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1220 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1221 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1222 return PORT_NONE;
1223
1224 return PORT_OTHER;
1225}
1226
1227static int mlxsw_sp_port_get_settings(struct net_device *dev,
1228 struct ethtool_cmd *cmd)
1229{
1230 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1231 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1232 char ptys_pl[MLXSW_REG_PTYS_LEN];
1233 u32 eth_proto_cap;
1234 u32 eth_proto_admin;
1235 u32 eth_proto_oper;
1236 int err;
1237
1238 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1239 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1240 if (err) {
1241 netdev_err(dev, "Failed to get proto");
1242 return err;
1243 }
1244 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1245 &eth_proto_admin, &eth_proto_oper);
1246
1247 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1248 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
1249 SUPPORTED_Pause | SUPPORTED_Asym_Pause;
1250 cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1251 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1252 eth_proto_oper, cmd);
1253
1254 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1255 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1256 cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1257
1258 cmd->transceiver = XCVR_INTERNAL;
1259 return 0;
1260}
1261
1262static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1263{
1264 u32 ptys_proto = 0;
1265 int i;
1266
1267 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1268 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1269 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1270 }
1271 return ptys_proto;
1272}
1273
1274static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1275{
1276 u32 ptys_proto = 0;
1277 int i;
1278
1279 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1280 if (speed == mlxsw_sp_port_link_mode[i].speed)
1281 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1282 }
1283 return ptys_proto;
1284}
1285
1286static int mlxsw_sp_port_set_settings(struct net_device *dev,
1287 struct ethtool_cmd *cmd)
1288{
1289 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1290 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1291 char ptys_pl[MLXSW_REG_PTYS_LEN];
1292 u32 speed;
1293 u32 eth_proto_new;
1294 u32 eth_proto_cap;
1295 u32 eth_proto_admin;
1296 bool is_up;
1297 int err;
1298
1299 speed = ethtool_cmd_speed(cmd);
1300
1301 eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ?
1302 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1303 mlxsw_sp_to_ptys_speed(speed);
1304
1305 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1306 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1307 if (err) {
1308 netdev_err(dev, "Failed to get proto");
1309 return err;
1310 }
1311 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1312
1313 eth_proto_new = eth_proto_new & eth_proto_cap;
1314 if (!eth_proto_new) {
1315 netdev_err(dev, "Not supported proto admin requested");
1316 return -EINVAL;
1317 }
1318 if (eth_proto_new == eth_proto_admin)
1319 return 0;
1320
1321 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1322 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1323 if (err) {
1324 netdev_err(dev, "Failed to set proto admin");
1325 return err;
1326 }
1327
1328 err = mlxsw_sp_port_oper_status_get(mlxsw_sp_port, &is_up);
1329 if (err) {
1330 netdev_err(dev, "Failed to get oper status");
1331 return err;
1332 }
1333 if (!is_up)
1334 return 0;
1335
1336 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1337 if (err) {
1338 netdev_err(dev, "Failed to set admin status");
1339 return err;
1340 }
1341
1342 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1343 if (err) {
1344 netdev_err(dev, "Failed to set admin status");
1345 return err;
1346 }
1347
1348 return 0;
1349}
1350
1351static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1352 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1353 .get_link = ethtool_op_get_link,
1354 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001355 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001356 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1357 .get_sset_count = mlxsw_sp_port_get_sset_count,
1358 .get_settings = mlxsw_sp_port_get_settings,
1359 .set_settings = mlxsw_sp_port_set_settings,
1360};
1361
1362static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port)
1363{
Jiri Pirkoc4745502016-02-26 17:32:26 +01001364 struct devlink *devlink = priv_to_devlink(mlxsw_sp->core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001365 struct mlxsw_sp_port *mlxsw_sp_port;
Jiri Pirkoc4745502016-02-26 17:32:26 +01001366 struct devlink_port *devlink_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001367 struct net_device *dev;
1368 bool usable;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001369 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001370 int err;
1371
1372 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
1373 if (!dev)
1374 return -ENOMEM;
1375 mlxsw_sp_port = netdev_priv(dev);
1376 mlxsw_sp_port->dev = dev;
1377 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
1378 mlxsw_sp_port->local_port = local_port;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001379 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
1380 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
1381 if (!mlxsw_sp_port->active_vlans) {
1382 err = -ENOMEM;
1383 goto err_port_active_vlans_alloc;
1384 }
Elad Razfc1273a2016-01-06 13:01:11 +01001385 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
1386 if (!mlxsw_sp_port->untagged_vlans) {
1387 err = -ENOMEM;
1388 goto err_port_untagged_vlans_alloc;
1389 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001390 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001391
1392 mlxsw_sp_port->pcpu_stats =
1393 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
1394 if (!mlxsw_sp_port->pcpu_stats) {
1395 err = -ENOMEM;
1396 goto err_alloc_stats;
1397 }
1398
1399 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
1400 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
1401
1402 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
1403 if (err) {
1404 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
1405 mlxsw_sp_port->local_port);
1406 goto err_dev_addr_init;
1407 }
1408
1409 netif_carrier_off(dev);
1410
1411 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
1412 NETIF_F_HW_VLAN_CTAG_FILTER;
1413
1414 /* Each packet needs to have a Tx header (metadata) on top all other
1415 * headers.
1416 */
1417 dev->hard_header_len += MLXSW_TXHDR_LEN;
1418
1419 err = mlxsw_sp_port_module_check(mlxsw_sp_port, &usable);
1420 if (err) {
1421 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to check module\n",
1422 mlxsw_sp_port->local_port);
1423 goto err_port_module_check;
1424 }
1425
1426 if (!usable) {
1427 dev_dbg(mlxsw_sp->bus_info->dev, "Port %d: Not usable, skipping initialization\n",
1428 mlxsw_sp_port->local_port);
1429 goto port_not_usable;
1430 }
1431
Jiri Pirkoc4745502016-02-26 17:32:26 +01001432 devlink_port = &mlxsw_sp_port->devlink_port;
1433 err = devlink_port_register(devlink, devlink_port, local_port);
1434 if (err) {
1435 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register devlink port\n",
1436 mlxsw_sp_port->local_port);
1437 goto err_devlink_port_register;
1438 }
1439
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001440 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
1441 if (err) {
1442 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
1443 mlxsw_sp_port->local_port);
1444 goto err_port_system_port_mapping_set;
1445 }
1446
1447 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
1448 if (err) {
1449 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
1450 mlxsw_sp_port->local_port);
1451 goto err_port_swid_set;
1452 }
1453
1454 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
1455 if (err) {
1456 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
1457 mlxsw_sp_port->local_port);
1458 goto err_port_mtu_set;
1459 }
1460
1461 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1462 if (err)
1463 goto err_port_admin_status_set;
1464
1465 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
1466 if (err) {
1467 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
1468 mlxsw_sp_port->local_port);
1469 goto err_port_buffers_init;
1470 }
1471
1472 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
1473 err = register_netdev(dev);
1474 if (err) {
1475 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
1476 mlxsw_sp_port->local_port);
1477 goto err_register_netdev;
1478 }
1479
Jiri Pirkoc4745502016-02-26 17:32:26 +01001480 devlink_port_type_eth_set(devlink_port, dev);
1481
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001482 err = mlxsw_sp_port_vlan_init(mlxsw_sp_port);
1483 if (err)
1484 goto err_port_vlan_init;
1485
1486 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
1487 return 0;
1488
1489err_port_vlan_init:
1490 unregister_netdev(dev);
1491err_register_netdev:
1492err_port_buffers_init:
1493err_port_admin_status_set:
1494err_port_mtu_set:
1495err_port_swid_set:
1496err_port_system_port_mapping_set:
Jiri Pirkoc4745502016-02-26 17:32:26 +01001497 devlink_port_unregister(&mlxsw_sp_port->devlink_port);
1498err_devlink_port_register:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001499port_not_usable:
1500err_port_module_check:
1501err_dev_addr_init:
1502 free_percpu(mlxsw_sp_port->pcpu_stats);
1503err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01001504 kfree(mlxsw_sp_port->untagged_vlans);
1505err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001506 kfree(mlxsw_sp_port->active_vlans);
1507err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001508 free_netdev(dev);
1509 return err;
1510}
1511
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001512static void mlxsw_sp_port_vports_fini(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001513{
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001514 struct net_device *dev = mlxsw_sp_port->dev;
1515 struct mlxsw_sp_port *mlxsw_sp_vport, *tmp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001516
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001517 list_for_each_entry_safe(mlxsw_sp_vport, tmp,
1518 &mlxsw_sp_port->vports_list, vport.list) {
1519 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
1520
1521 /* vPorts created for VLAN devices should already be gone
1522 * by now, since we unregistered the port netdev.
1523 */
1524 WARN_ON(is_vlan_dev(mlxsw_sp_vport->dev));
1525 mlxsw_sp_port_kill_vid(dev, 0, vid);
1526 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001527}
1528
1529static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
1530{
1531 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
Jiri Pirkoc4745502016-02-26 17:32:26 +01001532 struct devlink_port *devlink_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001533
1534 if (!mlxsw_sp_port)
1535 return;
Jiri Pirkoc4745502016-02-26 17:32:26 +01001536 devlink_port = &mlxsw_sp_port->devlink_port;
1537 devlink_port_type_clear(devlink_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001538 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Jiri Pirkoc4745502016-02-26 17:32:26 +01001539 devlink_port_unregister(devlink_port);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001540 mlxsw_sp_port_vports_fini(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001541 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01001542 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
1543 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001544 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01001545 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001546 kfree(mlxsw_sp_port->active_vlans);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001547 free_netdev(mlxsw_sp_port->dev);
1548}
1549
1550static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
1551{
1552 int i;
1553
1554 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
1555 mlxsw_sp_port_remove(mlxsw_sp, i);
1556 kfree(mlxsw_sp->ports);
1557}
1558
1559static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
1560{
1561 size_t alloc_size;
1562 int i;
1563 int err;
1564
1565 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
1566 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
1567 if (!mlxsw_sp->ports)
1568 return -ENOMEM;
1569
1570 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
1571 err = mlxsw_sp_port_create(mlxsw_sp, i);
1572 if (err)
1573 goto err_port_create;
1574 }
1575 return 0;
1576
1577err_port_create:
1578 for (i--; i >= 1; i--)
1579 mlxsw_sp_port_remove(mlxsw_sp, i);
1580 kfree(mlxsw_sp->ports);
1581 return err;
1582}
1583
1584static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
1585 char *pude_pl, void *priv)
1586{
1587 struct mlxsw_sp *mlxsw_sp = priv;
1588 struct mlxsw_sp_port *mlxsw_sp_port;
1589 enum mlxsw_reg_pude_oper_status status;
1590 u8 local_port;
1591
1592 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
1593 mlxsw_sp_port = mlxsw_sp->ports[local_port];
1594 if (!mlxsw_sp_port) {
1595 dev_warn(mlxsw_sp->bus_info->dev, "Port %d: Link event received for non-existent port\n",
1596 local_port);
1597 return;
1598 }
1599
1600 status = mlxsw_reg_pude_oper_status_get(pude_pl);
1601 if (status == MLXSW_PORT_OPER_STATUS_UP) {
1602 netdev_info(mlxsw_sp_port->dev, "link up\n");
1603 netif_carrier_on(mlxsw_sp_port->dev);
1604 } else {
1605 netdev_info(mlxsw_sp_port->dev, "link down\n");
1606 netif_carrier_off(mlxsw_sp_port->dev);
1607 }
1608}
1609
1610static struct mlxsw_event_listener mlxsw_sp_pude_event = {
1611 .func = mlxsw_sp_pude_event_func,
1612 .trap_id = MLXSW_TRAP_ID_PUDE,
1613};
1614
1615static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
1616 enum mlxsw_event_trap_id trap_id)
1617{
1618 struct mlxsw_event_listener *el;
1619 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1620 int err;
1621
1622 switch (trap_id) {
1623 case MLXSW_TRAP_ID_PUDE:
1624 el = &mlxsw_sp_pude_event;
1625 break;
1626 }
1627 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
1628 if (err)
1629 return err;
1630
1631 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
1632 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1633 if (err)
1634 goto err_event_trap_set;
1635
1636 return 0;
1637
1638err_event_trap_set:
1639 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
1640 return err;
1641}
1642
1643static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
1644 enum mlxsw_event_trap_id trap_id)
1645{
1646 struct mlxsw_event_listener *el;
1647
1648 switch (trap_id) {
1649 case MLXSW_TRAP_ID_PUDE:
1650 el = &mlxsw_sp_pude_event;
1651 break;
1652 }
1653 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
1654}
1655
1656static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
1657 void *priv)
1658{
1659 struct mlxsw_sp *mlxsw_sp = priv;
1660 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
1661 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
1662
1663 if (unlikely(!mlxsw_sp_port)) {
1664 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
1665 local_port);
1666 return;
1667 }
1668
1669 skb->dev = mlxsw_sp_port->dev;
1670
1671 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
1672 u64_stats_update_begin(&pcpu_stats->syncp);
1673 pcpu_stats->rx_packets++;
1674 pcpu_stats->rx_bytes += skb->len;
1675 u64_stats_update_end(&pcpu_stats->syncp);
1676
1677 skb->protocol = eth_type_trans(skb, skb->dev);
1678 netif_receive_skb(skb);
1679}
1680
1681static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
1682 {
1683 .func = mlxsw_sp_rx_listener_func,
1684 .local_port = MLXSW_PORT_DONT_CARE,
1685 .trap_id = MLXSW_TRAP_ID_FDB_MC,
1686 },
1687 /* Traps for specific L2 packet types, not trapped as FDB MC */
1688 {
1689 .func = mlxsw_sp_rx_listener_func,
1690 .local_port = MLXSW_PORT_DONT_CARE,
1691 .trap_id = MLXSW_TRAP_ID_STP,
1692 },
1693 {
1694 .func = mlxsw_sp_rx_listener_func,
1695 .local_port = MLXSW_PORT_DONT_CARE,
1696 .trap_id = MLXSW_TRAP_ID_LACP,
1697 },
1698 {
1699 .func = mlxsw_sp_rx_listener_func,
1700 .local_port = MLXSW_PORT_DONT_CARE,
1701 .trap_id = MLXSW_TRAP_ID_EAPOL,
1702 },
1703 {
1704 .func = mlxsw_sp_rx_listener_func,
1705 .local_port = MLXSW_PORT_DONT_CARE,
1706 .trap_id = MLXSW_TRAP_ID_LLDP,
1707 },
1708 {
1709 .func = mlxsw_sp_rx_listener_func,
1710 .local_port = MLXSW_PORT_DONT_CARE,
1711 .trap_id = MLXSW_TRAP_ID_MMRP,
1712 },
1713 {
1714 .func = mlxsw_sp_rx_listener_func,
1715 .local_port = MLXSW_PORT_DONT_CARE,
1716 .trap_id = MLXSW_TRAP_ID_MVRP,
1717 },
1718 {
1719 .func = mlxsw_sp_rx_listener_func,
1720 .local_port = MLXSW_PORT_DONT_CARE,
1721 .trap_id = MLXSW_TRAP_ID_RPVST,
1722 },
1723 {
1724 .func = mlxsw_sp_rx_listener_func,
1725 .local_port = MLXSW_PORT_DONT_CARE,
1726 .trap_id = MLXSW_TRAP_ID_DHCP,
1727 },
1728 {
1729 .func = mlxsw_sp_rx_listener_func,
1730 .local_port = MLXSW_PORT_DONT_CARE,
1731 .trap_id = MLXSW_TRAP_ID_IGMP_QUERY,
1732 },
1733 {
1734 .func = mlxsw_sp_rx_listener_func,
1735 .local_port = MLXSW_PORT_DONT_CARE,
1736 .trap_id = MLXSW_TRAP_ID_IGMP_V1_REPORT,
1737 },
1738 {
1739 .func = mlxsw_sp_rx_listener_func,
1740 .local_port = MLXSW_PORT_DONT_CARE,
1741 .trap_id = MLXSW_TRAP_ID_IGMP_V2_REPORT,
1742 },
1743 {
1744 .func = mlxsw_sp_rx_listener_func,
1745 .local_port = MLXSW_PORT_DONT_CARE,
1746 .trap_id = MLXSW_TRAP_ID_IGMP_V2_LEAVE,
1747 },
1748 {
1749 .func = mlxsw_sp_rx_listener_func,
1750 .local_port = MLXSW_PORT_DONT_CARE,
1751 .trap_id = MLXSW_TRAP_ID_IGMP_V3_REPORT,
1752 },
1753};
1754
1755static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
1756{
1757 char htgt_pl[MLXSW_REG_HTGT_LEN];
1758 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1759 int i;
1760 int err;
1761
1762 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
1763 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
1764 if (err)
1765 return err;
1766
1767 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
1768 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
1769 if (err)
1770 return err;
1771
1772 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
1773 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
1774 &mlxsw_sp_rx_listener[i],
1775 mlxsw_sp);
1776 if (err)
1777 goto err_rx_listener_register;
1778
1779 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
1780 mlxsw_sp_rx_listener[i].trap_id);
1781 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1782 if (err)
1783 goto err_rx_trap_set;
1784 }
1785 return 0;
1786
1787err_rx_trap_set:
1788 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
1789 &mlxsw_sp_rx_listener[i],
1790 mlxsw_sp);
1791err_rx_listener_register:
1792 for (i--; i >= 0; i--) {
1793 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD,
1794 mlxsw_sp_rx_listener[i].trap_id);
1795 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1796
1797 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
1798 &mlxsw_sp_rx_listener[i],
1799 mlxsw_sp);
1800 }
1801 return err;
1802}
1803
1804static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
1805{
1806 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1807 int i;
1808
1809 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
1810 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD,
1811 mlxsw_sp_rx_listener[i].trap_id);
1812 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1813
1814 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
1815 &mlxsw_sp_rx_listener[i],
1816 mlxsw_sp);
1817 }
1818}
1819
1820static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
1821 enum mlxsw_reg_sfgc_type type,
1822 enum mlxsw_reg_sfgc_bridge_type bridge_type)
1823{
1824 enum mlxsw_flood_table_type table_type;
1825 enum mlxsw_sp_flood_table flood_table;
1826 char sfgc_pl[MLXSW_REG_SFGC_LEN];
1827
Ido Schimmel19ae6122015-12-15 16:03:39 +01001828 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001829 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01001830 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001831 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01001832
1833 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
1834 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
1835 else
1836 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001837
1838 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
1839 flood_table);
1840 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
1841}
1842
1843static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
1844{
1845 int type, err;
1846
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001847 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
1848 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
1849 continue;
1850
1851 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
1852 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
1853 if (err)
1854 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001855
1856 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
1857 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
1858 if (err)
1859 return err;
1860 }
1861
1862 return 0;
1863}
1864
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001865static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
1866{
1867 char slcr_pl[MLXSW_REG_SLCR_LEN];
1868
1869 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
1870 MLXSW_REG_SLCR_LAG_HASH_DMAC |
1871 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
1872 MLXSW_REG_SLCR_LAG_HASH_VLANID |
1873 MLXSW_REG_SLCR_LAG_HASH_SIP |
1874 MLXSW_REG_SLCR_LAG_HASH_DIP |
1875 MLXSW_REG_SLCR_LAG_HASH_SPORT |
1876 MLXSW_REG_SLCR_LAG_HASH_DPORT |
1877 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
1878 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
1879}
1880
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001881static int mlxsw_sp_init(void *priv, struct mlxsw_core *mlxsw_core,
1882 const struct mlxsw_bus_info *mlxsw_bus_info)
1883{
1884 struct mlxsw_sp *mlxsw_sp = priv;
1885 int err;
1886
1887 mlxsw_sp->core = mlxsw_core;
1888 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001889 INIT_LIST_HEAD(&mlxsw_sp->port_vfids.list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01001890 INIT_LIST_HEAD(&mlxsw_sp->br_vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01001891 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001892
1893 err = mlxsw_sp_base_mac_get(mlxsw_sp);
1894 if (err) {
1895 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
1896 return err;
1897 }
1898
1899 err = mlxsw_sp_ports_create(mlxsw_sp);
1900 if (err) {
1901 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001902 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001903 }
1904
1905 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
1906 if (err) {
1907 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
1908 goto err_event_register;
1909 }
1910
1911 err = mlxsw_sp_traps_init(mlxsw_sp);
1912 if (err) {
1913 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
1914 goto err_rx_listener_register;
1915 }
1916
1917 err = mlxsw_sp_flood_init(mlxsw_sp);
1918 if (err) {
1919 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
1920 goto err_flood_init;
1921 }
1922
1923 err = mlxsw_sp_buffers_init(mlxsw_sp);
1924 if (err) {
1925 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
1926 goto err_buffers_init;
1927 }
1928
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001929 err = mlxsw_sp_lag_init(mlxsw_sp);
1930 if (err) {
1931 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
1932 goto err_lag_init;
1933 }
1934
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001935 err = mlxsw_sp_switchdev_init(mlxsw_sp);
1936 if (err) {
1937 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
1938 goto err_switchdev_init;
1939 }
1940
1941 return 0;
1942
1943err_switchdev_init:
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001944err_lag_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001945err_buffers_init:
1946err_flood_init:
1947 mlxsw_sp_traps_fini(mlxsw_sp);
1948err_rx_listener_register:
1949 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
1950err_event_register:
1951 mlxsw_sp_ports_remove(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001952 return err;
1953}
1954
1955static void mlxsw_sp_fini(void *priv)
1956{
1957 struct mlxsw_sp *mlxsw_sp = priv;
1958
1959 mlxsw_sp_switchdev_fini(mlxsw_sp);
1960 mlxsw_sp_traps_fini(mlxsw_sp);
1961 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
1962 mlxsw_sp_ports_remove(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001963}
1964
1965static struct mlxsw_config_profile mlxsw_sp_config_profile = {
1966 .used_max_vepa_channels = 1,
1967 .max_vepa_channels = 0,
1968 .used_max_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001969 .max_lag = MLXSW_SP_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001970 .used_max_port_per_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001971 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001972 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01001973 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001974 .used_max_pgt = 1,
1975 .max_pgt = 0,
1976 .used_max_system_port = 1,
1977 .max_system_port = 64,
1978 .used_max_vlan_groups = 1,
1979 .max_vlan_groups = 127,
1980 .used_max_regions = 1,
1981 .max_regions = 400,
1982 .used_flood_tables = 1,
1983 .used_flood_mode = 1,
1984 .flood_mode = 3,
1985 .max_fid_offset_flood_tables = 2,
1986 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01001987 .max_fid_flood_tables = 2,
1988 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001989 .used_max_ib_mc = 1,
1990 .max_ib_mc = 0,
1991 .used_max_pkey = 1,
1992 .max_pkey = 0,
1993 .swid_config = {
1994 {
1995 .used_type = 1,
1996 .type = MLXSW_PORT_SWID_TYPE_ETH,
1997 }
1998 },
1999};
2000
2001static struct mlxsw_driver mlxsw_sp_driver = {
2002 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
2003 .owner = THIS_MODULE,
2004 .priv_size = sizeof(struct mlxsw_sp),
2005 .init = mlxsw_sp_init,
2006 .fini = mlxsw_sp_fini,
2007 .txhdr_construct = mlxsw_sp_txhdr_construct,
2008 .txhdr_len = MLXSW_TXHDR_LEN,
2009 .profile = &mlxsw_sp_config_profile,
2010};
2011
Ido Schimmel039c49a2016-01-27 15:20:18 +01002012static int
2013mlxsw_sp_port_fdb_flush_by_port(const struct mlxsw_sp_port *mlxsw_sp_port)
2014{
2015 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2016 char sfdf_pl[MLXSW_REG_SFDF_LEN];
2017
2018 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT);
2019 mlxsw_reg_sfdf_system_port_set(sfdf_pl, mlxsw_sp_port->local_port);
2020
2021 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
2022}
2023
2024static int
2025mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
2026 u16 fid)
2027{
2028 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2029 char sfdf_pl[MLXSW_REG_SFDF_LEN];
2030
2031 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
2032 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
2033 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
2034 mlxsw_sp_port->local_port);
2035
2036 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
2037}
2038
2039static int
2040mlxsw_sp_port_fdb_flush_by_lag_id(const struct mlxsw_sp_port *mlxsw_sp_port)
2041{
2042 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2043 char sfdf_pl[MLXSW_REG_SFDF_LEN];
2044
2045 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG);
2046 mlxsw_reg_sfdf_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
2047
2048 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
2049}
2050
2051static int
2052mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
2053 u16 fid)
2054{
2055 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2056 char sfdf_pl[MLXSW_REG_SFDF_LEN];
2057
2058 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
2059 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
2060 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
2061
2062 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
2063}
2064
2065static int
2066__mlxsw_sp_port_fdb_flush(const struct mlxsw_sp_port *mlxsw_sp_port)
2067{
2068 int err, last_err = 0;
2069 u16 vid;
2070
2071 for (vid = 1; vid < VLAN_N_VID - 1; vid++) {
2072 err = mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, vid);
2073 if (err)
2074 last_err = err;
2075 }
2076
2077 return last_err;
2078}
2079
2080static int
2081__mlxsw_sp_port_fdb_flush_lagged(const struct mlxsw_sp_port *mlxsw_sp_port)
2082{
2083 int err, last_err = 0;
2084 u16 vid;
2085
2086 for (vid = 1; vid < VLAN_N_VID - 1; vid++) {
2087 err = mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port, vid);
2088 if (err)
2089 last_err = err;
2090 }
2091
2092 return last_err;
2093}
2094
2095static int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port)
2096{
2097 if (!list_empty(&mlxsw_sp_port->vports_list))
2098 if (mlxsw_sp_port->lagged)
2099 return __mlxsw_sp_port_fdb_flush_lagged(mlxsw_sp_port);
2100 else
2101 return __mlxsw_sp_port_fdb_flush(mlxsw_sp_port);
2102 else
2103 if (mlxsw_sp_port->lagged)
2104 return mlxsw_sp_port_fdb_flush_by_lag_id(mlxsw_sp_port);
2105 else
2106 return mlxsw_sp_port_fdb_flush_by_port(mlxsw_sp_port);
2107}
2108
2109static int mlxsw_sp_vport_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_vport)
2110{
2111 u16 vfid = mlxsw_sp_vport_vfid_get(mlxsw_sp_vport);
2112 u16 fid = mlxsw_sp_vfid_to_fid(vfid);
2113
2114 if (mlxsw_sp_vport->lagged)
2115 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_vport,
2116 fid);
2117 else
2118 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_vport, fid);
2119}
2120
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002121static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
2122{
2123 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
2124}
2125
2126static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port)
2127{
2128 struct net_device *dev = mlxsw_sp_port->dev;
2129 int err;
2130
2131 /* When port is not bridged untagged packets are tagged with
2132 * PVID=VID=1, thereby creating an implicit VLAN interface in
2133 * the device. Remove it and let bridge code take care of its
2134 * own VLANs.
2135 */
2136 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01002137 if (err)
2138 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002139
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01002140 mlxsw_sp_port->learning = 1;
2141 mlxsw_sp_port->learning_sync = 1;
2142 mlxsw_sp_port->uc_flood = 1;
2143 mlxsw_sp_port->bridged = 1;
2144
2145 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002146}
2147
Ido Schimmel039c49a2016-01-27 15:20:18 +01002148static int mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port,
2149 bool flush_fdb)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002150{
2151 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01002152
Ido Schimmel039c49a2016-01-27 15:20:18 +01002153 if (flush_fdb && mlxsw_sp_port_fdb_flush(mlxsw_sp_port))
2154 netdev_err(mlxsw_sp_port->dev, "Failed to flush FDB\n");
2155
Ido Schimmel28a01d22016-02-18 11:30:02 +01002156 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
2157
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01002158 mlxsw_sp_port->learning = 0;
2159 mlxsw_sp_port->learning_sync = 0;
2160 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01002161 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002162
2163 /* Add implicit VLAN interface in the device, so that untagged
2164 * packets will be classified to the default vFID.
2165 */
Ido Schimmel5a8f4522016-01-04 10:42:25 +01002166 return mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002167}
2168
2169static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
2170 struct net_device *br_dev)
2171{
2172 return !mlxsw_sp->master_bridge.dev ||
2173 mlxsw_sp->master_bridge.dev == br_dev;
2174}
2175
2176static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
2177 struct net_device *br_dev)
2178{
2179 mlxsw_sp->master_bridge.dev = br_dev;
2180 mlxsw_sp->master_bridge.ref_count++;
2181}
2182
2183static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp,
2184 struct net_device *br_dev)
2185{
2186 if (--mlxsw_sp->master_bridge.ref_count == 0)
2187 mlxsw_sp->master_bridge.dev = NULL;
2188}
2189
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002190static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002191{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002192 char sldr_pl[MLXSW_REG_SLDR_LEN];
2193
2194 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
2195 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2196}
2197
2198static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
2199{
2200 char sldr_pl[MLXSW_REG_SLDR_LEN];
2201
2202 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
2203 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2204}
2205
2206static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
2207 u16 lag_id, u8 port_index)
2208{
2209 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2210 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2211
2212 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
2213 lag_id, port_index);
2214 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2215}
2216
2217static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
2218 u16 lag_id)
2219{
2220 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2221 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2222
2223 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
2224 lag_id);
2225 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2226}
2227
2228static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
2229 u16 lag_id)
2230{
2231 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2232 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2233
2234 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
2235 lag_id);
2236 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2237}
2238
2239static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
2240 u16 lag_id)
2241{
2242 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2243 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2244
2245 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
2246 lag_id);
2247 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2248}
2249
2250static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
2251 struct net_device *lag_dev,
2252 u16 *p_lag_id)
2253{
2254 struct mlxsw_sp_upper *lag;
2255 int free_lag_id = -1;
2256 int i;
2257
2258 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
2259 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
2260 if (lag->ref_count) {
2261 if (lag->dev == lag_dev) {
2262 *p_lag_id = i;
2263 return 0;
2264 }
2265 } else if (free_lag_id < 0) {
2266 free_lag_id = i;
2267 }
2268 }
2269 if (free_lag_id < 0)
2270 return -EBUSY;
2271 *p_lag_id = free_lag_id;
2272 return 0;
2273}
2274
2275static bool
2276mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
2277 struct net_device *lag_dev,
2278 struct netdev_lag_upper_info *lag_upper_info)
2279{
2280 u16 lag_id;
2281
2282 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
2283 return false;
2284 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
2285 return false;
2286 return true;
2287}
2288
2289static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
2290 u16 lag_id, u8 *p_port_index)
2291{
2292 int i;
2293
2294 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
2295 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
2296 *p_port_index = i;
2297 return 0;
2298 }
2299 }
2300 return -EBUSY;
2301}
2302
2303static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
2304 struct net_device *lag_dev)
2305{
2306 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2307 struct mlxsw_sp_upper *lag;
2308 u16 lag_id;
2309 u8 port_index;
2310 int err;
2311
2312 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
2313 if (err)
2314 return err;
2315 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
2316 if (!lag->ref_count) {
2317 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
2318 if (err)
2319 return err;
2320 lag->dev = lag_dev;
2321 }
2322
2323 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
2324 if (err)
2325 return err;
2326 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
2327 if (err)
2328 goto err_col_port_add;
2329 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
2330 if (err)
2331 goto err_col_port_enable;
2332
2333 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
2334 mlxsw_sp_port->local_port);
2335 mlxsw_sp_port->lag_id = lag_id;
2336 mlxsw_sp_port->lagged = 1;
2337 lag->ref_count++;
2338 return 0;
2339
2340err_col_port_add:
2341 if (!lag->ref_count)
2342 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
2343err_col_port_enable:
2344 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
2345 return err;
2346}
2347
Ido Schimmel4dc236c2016-01-27 15:20:16 +01002348static int mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport,
Ido Schimmel039c49a2016-01-27 15:20:18 +01002349 struct net_device *br_dev,
2350 bool flush_fdb);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01002351
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002352static int mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
2353 struct net_device *lag_dev)
2354{
2355 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel4dc236c2016-01-27 15:20:16 +01002356 struct mlxsw_sp_port *mlxsw_sp_vport;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002357 struct mlxsw_sp_upper *lag;
2358 u16 lag_id = mlxsw_sp_port->lag_id;
2359 int err;
2360
2361 if (!mlxsw_sp_port->lagged)
2362 return 0;
2363 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
2364 WARN_ON(lag->ref_count == 0);
2365
2366 err = mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
2367 if (err)
2368 return err;
Dan Carpenter82a06422015-12-09 13:33:51 +03002369 err = mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002370 if (err)
2371 return err;
2372
Ido Schimmel4dc236c2016-01-27 15:20:16 +01002373 /* In case we leave a LAG device that has bridges built on top,
2374 * then their teardown sequence is never issued and we need to
2375 * invoke the necessary cleanup routines ourselves.
2376 */
2377 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
2378 vport.list) {
2379 struct net_device *br_dev;
2380
2381 if (!mlxsw_sp_vport->bridged)
2382 continue;
2383
2384 br_dev = mlxsw_sp_vport_br_get(mlxsw_sp_vport);
Ido Schimmel039c49a2016-01-27 15:20:18 +01002385 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport, br_dev, false);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01002386 }
2387
2388 if (mlxsw_sp_port->bridged) {
2389 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmel039c49a2016-01-27 15:20:18 +01002390 mlxsw_sp_port_bridge_leave(mlxsw_sp_port, false);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01002391
2392 if (lag->ref_count == 1)
2393 mlxsw_sp_master_bridge_dec(mlxsw_sp, NULL);
2394 }
2395
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002396 if (lag->ref_count == 1) {
Ido Schimmel039c49a2016-01-27 15:20:18 +01002397 if (mlxsw_sp_port_fdb_flush_by_lag_id(mlxsw_sp_port))
2398 netdev_err(mlxsw_sp_port->dev, "Failed to flush FDB\n");
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002399 err = mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
2400 if (err)
2401 return err;
2402 }
2403
2404 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
2405 mlxsw_sp_port->local_port);
2406 mlxsw_sp_port->lagged = 0;
2407 lag->ref_count--;
2408 return 0;
2409}
2410
Jiri Pirko74581202015-12-03 12:12:30 +01002411static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
2412 u16 lag_id)
2413{
2414 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2415 char sldr_pl[MLXSW_REG_SLDR_LEN];
2416
2417 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
2418 mlxsw_sp_port->local_port);
2419 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2420}
2421
2422static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
2423 u16 lag_id)
2424{
2425 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2426 char sldr_pl[MLXSW_REG_SLDR_LEN];
2427
2428 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
2429 mlxsw_sp_port->local_port);
2430 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2431}
2432
2433static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
2434 bool lag_tx_enabled)
2435{
2436 if (lag_tx_enabled)
2437 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
2438 mlxsw_sp_port->lag_id);
2439 else
2440 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
2441 mlxsw_sp_port->lag_id);
2442}
2443
2444static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
2445 struct netdev_lag_lower_state_info *info)
2446{
2447 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
2448}
2449
Ido Schimmel9589a7b52015-12-15 16:03:43 +01002450static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
2451 struct net_device *vlan_dev)
2452{
2453 struct mlxsw_sp_port *mlxsw_sp_vport;
2454 u16 vid = vlan_dev_vlan_id(vlan_dev);
2455
2456 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
2457 if (!mlxsw_sp_vport) {
2458 WARN_ON(!mlxsw_sp_vport);
2459 return -EINVAL;
2460 }
2461
2462 mlxsw_sp_vport->dev = vlan_dev;
2463
2464 return 0;
2465}
2466
2467static int mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
2468 struct net_device *vlan_dev)
2469{
2470 struct mlxsw_sp_port *mlxsw_sp_vport;
2471 u16 vid = vlan_dev_vlan_id(vlan_dev);
2472
2473 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
2474 if (!mlxsw_sp_vport) {
2475 WARN_ON(!mlxsw_sp_vport);
2476 return -EINVAL;
2477 }
2478
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01002479 /* When removing a VLAN device while still bridged we should first
2480 * remove it from the bridge, as we receive the bridge's notification
2481 * when the vPort is already gone.
2482 */
2483 if (mlxsw_sp_vport->bridged) {
2484 struct net_device *br_dev;
2485
2486 br_dev = mlxsw_sp_vport_br_get(mlxsw_sp_vport);
Ido Schimmel039c49a2016-01-27 15:20:18 +01002487 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport, br_dev, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01002488 }
2489
Ido Schimmel9589a7b52015-12-15 16:03:43 +01002490 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
2491
2492 return 0;
2493}
2494
Jiri Pirko74581202015-12-03 12:12:30 +01002495static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
2496 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002497{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002498 struct netdev_notifier_changeupper_info *info;
2499 struct mlxsw_sp_port *mlxsw_sp_port;
2500 struct net_device *upper_dev;
2501 struct mlxsw_sp *mlxsw_sp;
2502 int err;
2503
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002504 mlxsw_sp_port = netdev_priv(dev);
2505 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2506 info = ptr;
2507
2508 switch (event) {
2509 case NETDEV_PRECHANGEUPPER:
2510 upper_dev = info->upper_dev;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002511 if (!info->master || !info->linking)
2512 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002513 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002514 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002515 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
2516 return NOTIFY_BAD;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002517 if (netif_is_lag_master(upper_dev) &&
2518 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
2519 info->upper_info))
2520 return NOTIFY_BAD;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002521 break;
2522 case NETDEV_CHANGEUPPER:
2523 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01002524 if (is_vlan_dev(upper_dev)) {
2525 if (info->linking) {
2526 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
2527 upper_dev);
2528 if (err) {
2529 netdev_err(dev, "Failed to link VLAN device\n");
2530 return NOTIFY_BAD;
2531 }
2532 } else {
2533 err = mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
2534 upper_dev);
2535 if (err) {
2536 netdev_err(dev, "Failed to unlink VLAN device\n");
2537 return NOTIFY_BAD;
2538 }
2539 }
2540 } else if (netif_is_bridge_master(upper_dev)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002541 if (info->linking) {
2542 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port);
Ido Schimmel78124072016-01-04 10:42:24 +01002543 if (err) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002544 netdev_err(dev, "Failed to join bridge\n");
Ido Schimmel78124072016-01-04 10:42:24 +01002545 return NOTIFY_BAD;
2546 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002547 mlxsw_sp_master_bridge_inc(mlxsw_sp, upper_dev);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002548 } else {
Ido Schimmel039c49a2016-01-27 15:20:18 +01002549 err = mlxsw_sp_port_bridge_leave(mlxsw_sp_port,
2550 true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002551 mlxsw_sp_master_bridge_dec(mlxsw_sp, upper_dev);
Ido Schimmel78124072016-01-04 10:42:24 +01002552 if (err) {
2553 netdev_err(dev, "Failed to leave bridge\n");
2554 return NOTIFY_BAD;
2555 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002556 }
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002557 } else if (netif_is_lag_master(upper_dev)) {
2558 if (info->linking) {
2559 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
2560 upper_dev);
2561 if (err) {
2562 netdev_err(dev, "Failed to join link aggregation\n");
2563 return NOTIFY_BAD;
2564 }
2565 } else {
2566 err = mlxsw_sp_port_lag_leave(mlxsw_sp_port,
2567 upper_dev);
2568 if (err) {
2569 netdev_err(dev, "Failed to leave link aggregation\n");
2570 return NOTIFY_BAD;
2571 }
2572 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002573 }
2574 break;
2575 }
2576
2577 return NOTIFY_DONE;
2578}
2579
Jiri Pirko74581202015-12-03 12:12:30 +01002580static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
2581 unsigned long event, void *ptr)
2582{
2583 struct netdev_notifier_changelowerstate_info *info;
2584 struct mlxsw_sp_port *mlxsw_sp_port;
2585 int err;
2586
2587 mlxsw_sp_port = netdev_priv(dev);
2588 info = ptr;
2589
2590 switch (event) {
2591 case NETDEV_CHANGELOWERSTATE:
2592 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
2593 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
2594 info->lower_state_info);
2595 if (err)
2596 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
2597 }
2598 break;
2599 }
2600
2601 return NOTIFY_DONE;
2602}
2603
2604static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
2605 unsigned long event, void *ptr)
2606{
2607 switch (event) {
2608 case NETDEV_PRECHANGEUPPER:
2609 case NETDEV_CHANGEUPPER:
2610 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
2611 case NETDEV_CHANGELOWERSTATE:
2612 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
2613 }
2614
2615 return NOTIFY_DONE;
2616}
2617
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002618static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
2619 unsigned long event, void *ptr)
2620{
2621 struct net_device *dev;
2622 struct list_head *iter;
2623 int ret;
2624
2625 netdev_for_each_lower_dev(lag_dev, dev, iter) {
2626 if (mlxsw_sp_port_dev_check(dev)) {
2627 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
2628 if (ret == NOTIFY_BAD)
2629 return ret;
2630 }
2631 }
2632
2633 return NOTIFY_DONE;
2634}
2635
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01002636static struct mlxsw_sp_vfid *
2637mlxsw_sp_br_vfid_find(const struct mlxsw_sp *mlxsw_sp,
2638 const struct net_device *br_dev)
2639{
2640 struct mlxsw_sp_vfid *vfid;
2641
2642 list_for_each_entry(vfid, &mlxsw_sp->br_vfids.list, list) {
2643 if (vfid->br_dev == br_dev)
2644 return vfid;
2645 }
2646
2647 return NULL;
2648}
2649
2650static u16 mlxsw_sp_vfid_to_br_vfid(u16 vfid)
2651{
2652 return vfid - MLXSW_SP_VFID_PORT_MAX;
2653}
2654
2655static u16 mlxsw_sp_br_vfid_to_vfid(u16 br_vfid)
2656{
2657 return MLXSW_SP_VFID_PORT_MAX + br_vfid;
2658}
2659
2660static u16 mlxsw_sp_avail_br_vfid_get(const struct mlxsw_sp *mlxsw_sp)
2661{
2662 return find_first_zero_bit(mlxsw_sp->br_vfids.mapped,
2663 MLXSW_SP_VFID_BR_MAX);
2664}
2665
2666static struct mlxsw_sp_vfid *mlxsw_sp_br_vfid_create(struct mlxsw_sp *mlxsw_sp,
2667 struct net_device *br_dev)
2668{
2669 struct device *dev = mlxsw_sp->bus_info->dev;
2670 struct mlxsw_sp_vfid *vfid;
2671 u16 n_vfid;
2672 int err;
2673
2674 n_vfid = mlxsw_sp_br_vfid_to_vfid(mlxsw_sp_avail_br_vfid_get(mlxsw_sp));
2675 if (n_vfid == MLXSW_SP_VFID_MAX) {
2676 dev_err(dev, "No available vFIDs\n");
2677 return ERR_PTR(-ERANGE);
2678 }
2679
2680 err = __mlxsw_sp_vfid_create(mlxsw_sp, n_vfid);
2681 if (err) {
2682 dev_err(dev, "Failed to create vFID=%d\n", n_vfid);
2683 return ERR_PTR(err);
2684 }
2685
2686 vfid = kzalloc(sizeof(*vfid), GFP_KERNEL);
2687 if (!vfid)
2688 goto err_allocate_vfid;
2689
2690 vfid->vfid = n_vfid;
2691 vfid->br_dev = br_dev;
2692
2693 list_add(&vfid->list, &mlxsw_sp->br_vfids.list);
2694 set_bit(mlxsw_sp_vfid_to_br_vfid(n_vfid), mlxsw_sp->br_vfids.mapped);
2695
2696 return vfid;
2697
2698err_allocate_vfid:
2699 __mlxsw_sp_vfid_destroy(mlxsw_sp, n_vfid);
2700 return ERR_PTR(-ENOMEM);
2701}
2702
2703static void mlxsw_sp_br_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
2704 struct mlxsw_sp_vfid *vfid)
2705{
2706 u16 br_vfid = mlxsw_sp_vfid_to_br_vfid(vfid->vfid);
2707
2708 clear_bit(br_vfid, mlxsw_sp->br_vfids.mapped);
2709 list_del(&vfid->list);
2710
2711 __mlxsw_sp_vfid_destroy(mlxsw_sp, vfid->vfid);
2712
2713 kfree(vfid);
2714}
2715
2716static int mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport,
Ido Schimmel039c49a2016-01-27 15:20:18 +01002717 struct net_device *br_dev,
2718 bool flush_fdb)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01002719{
2720 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
2721 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
2722 struct net_device *dev = mlxsw_sp_vport->dev;
2723 struct mlxsw_sp_vfid *vfid, *new_vfid;
2724 int err;
2725
2726 vfid = mlxsw_sp_br_vfid_find(mlxsw_sp, br_dev);
2727 if (!vfid) {
2728 WARN_ON(!vfid);
2729 return -EINVAL;
2730 }
2731
2732 /* We need a vFID to go back to after leaving the bridge's vFID. */
2733 new_vfid = mlxsw_sp_vfid_find(mlxsw_sp, vid);
2734 if (!new_vfid) {
2735 new_vfid = mlxsw_sp_vfid_create(mlxsw_sp, vid);
2736 if (IS_ERR(new_vfid)) {
2737 netdev_err(dev, "Failed to create vFID for VID=%d\n",
2738 vid);
2739 return PTR_ERR(new_vfid);
2740 }
2741 }
2742
2743 /* Invalidate existing {Port, VID} to vFID mapping and create a new
2744 * one for the new vFID.
2745 */
2746 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
2747 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
2748 false,
2749 mlxsw_sp_vfid_to_fid(vfid->vfid),
2750 vid);
2751 if (err) {
2752 netdev_err(dev, "Failed to invalidate {Port, VID} to vFID=%d mapping\n",
2753 vfid->vfid);
2754 goto err_port_vid_to_fid_invalidate;
2755 }
2756
2757 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
2758 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
2759 true,
2760 mlxsw_sp_vfid_to_fid(new_vfid->vfid),
2761 vid);
2762 if (err) {
2763 netdev_err(dev, "Failed to map {Port, VID} to vFID=%d\n",
2764 new_vfid->vfid);
2765 goto err_port_vid_to_fid_validate;
2766 }
2767
2768 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
2769 if (err) {
2770 netdev_err(dev, "Failed to disable learning\n");
2771 goto err_port_vid_learning_set;
2772 }
2773
2774 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid, false,
2775 false);
2776 if (err) {
2777 netdev_err(dev, "Failed clear to clear flooding\n");
2778 goto err_vport_flood_set;
2779 }
2780
Ido Schimmel6a9863a2016-02-15 13:19:54 +01002781 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_vport, vid,
2782 MLXSW_REG_SPMS_STATE_FORWARDING);
2783 if (err) {
2784 netdev_err(dev, "Failed to set STP state\n");
2785 goto err_port_stp_state_set;
2786 }
2787
Ido Schimmel039c49a2016-01-27 15:20:18 +01002788 if (flush_fdb && mlxsw_sp_vport_fdb_flush(mlxsw_sp_vport))
2789 netdev_err(dev, "Failed to flush FDB\n");
2790
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01002791 /* Switch between the vFIDs and destroy the old one if needed. */
2792 new_vfid->nr_vports++;
2793 mlxsw_sp_vport->vport.vfid = new_vfid;
2794 vfid->nr_vports--;
2795 if (!vfid->nr_vports)
2796 mlxsw_sp_br_vfid_destroy(mlxsw_sp, vfid);
2797
2798 mlxsw_sp_vport->learning = 0;
2799 mlxsw_sp_vport->learning_sync = 0;
2800 mlxsw_sp_vport->uc_flood = 0;
2801 mlxsw_sp_vport->bridged = 0;
2802
2803 return 0;
2804
Ido Schimmel6a9863a2016-02-15 13:19:54 +01002805err_port_stp_state_set:
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01002806err_vport_flood_set:
2807err_port_vid_learning_set:
2808err_port_vid_to_fid_validate:
2809err_port_vid_to_fid_invalidate:
2810 /* Rollback vFID only if new. */
2811 if (!new_vfid->nr_vports)
2812 mlxsw_sp_vfid_destroy(mlxsw_sp, new_vfid);
2813 return err;
2814}
2815
2816static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
2817 struct net_device *br_dev)
2818{
2819 struct mlxsw_sp_vfid *old_vfid = mlxsw_sp_vport->vport.vfid;
2820 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
2821 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
2822 struct net_device *dev = mlxsw_sp_vport->dev;
2823 struct mlxsw_sp_vfid *vfid;
2824 int err;
2825
2826 vfid = mlxsw_sp_br_vfid_find(mlxsw_sp, br_dev);
2827 if (!vfid) {
2828 vfid = mlxsw_sp_br_vfid_create(mlxsw_sp, br_dev);
2829 if (IS_ERR(vfid)) {
2830 netdev_err(dev, "Failed to create bridge vFID\n");
2831 return PTR_ERR(vfid);
2832 }
2833 }
2834
2835 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid, true, false);
2836 if (err) {
2837 netdev_err(dev, "Failed to setup flooding for vFID=%d\n",
2838 vfid->vfid);
2839 goto err_port_flood_set;
2840 }
2841
2842 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
2843 if (err) {
2844 netdev_err(dev, "Failed to enable learning\n");
2845 goto err_port_vid_learning_set;
2846 }
2847
2848 /* We need to invalidate existing {Port, VID} to vFID mapping and
2849 * create a new one for the bridge's vFID.
2850 */
2851 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
2852 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
2853 false,
2854 mlxsw_sp_vfid_to_fid(old_vfid->vfid),
2855 vid);
2856 if (err) {
2857 netdev_err(dev, "Failed to invalidate {Port, VID} to vFID=%d mapping\n",
2858 old_vfid->vfid);
2859 goto err_port_vid_to_fid_invalidate;
2860 }
2861
2862 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
2863 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
2864 true,
2865 mlxsw_sp_vfid_to_fid(vfid->vfid),
2866 vid);
2867 if (err) {
2868 netdev_err(dev, "Failed to map {Port, VID} to vFID=%d\n",
2869 vfid->vfid);
2870 goto err_port_vid_to_fid_validate;
2871 }
2872
2873 /* Switch between the vFIDs and destroy the old one if needed. */
2874 vfid->nr_vports++;
2875 mlxsw_sp_vport->vport.vfid = vfid;
2876 old_vfid->nr_vports--;
2877 if (!old_vfid->nr_vports)
2878 mlxsw_sp_vfid_destroy(mlxsw_sp, old_vfid);
2879
2880 mlxsw_sp_vport->learning = 1;
2881 mlxsw_sp_vport->learning_sync = 1;
2882 mlxsw_sp_vport->uc_flood = 1;
2883 mlxsw_sp_vport->bridged = 1;
2884
2885 return 0;
2886
2887err_port_vid_to_fid_validate:
2888 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
2889 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID, false,
2890 mlxsw_sp_vfid_to_fid(old_vfid->vfid), vid);
2891err_port_vid_to_fid_invalidate:
2892 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
2893err_port_vid_learning_set:
2894 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid, false, false);
2895err_port_flood_set:
2896 if (!vfid->nr_vports)
2897 mlxsw_sp_br_vfid_destroy(mlxsw_sp, vfid);
2898 return err;
2899}
2900
2901static bool
2902mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
2903 const struct net_device *br_dev)
2904{
2905 struct mlxsw_sp_port *mlxsw_sp_vport;
2906
2907 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
2908 vport.list) {
2909 if (mlxsw_sp_vport_br_get(mlxsw_sp_vport) == br_dev)
2910 return false;
2911 }
2912
2913 return true;
2914}
2915
2916static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
2917 unsigned long event, void *ptr,
2918 u16 vid)
2919{
2920 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2921 struct netdev_notifier_changeupper_info *info = ptr;
2922 struct mlxsw_sp_port *mlxsw_sp_vport;
2923 struct net_device *upper_dev;
2924 int err;
2925
2926 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
2927
2928 switch (event) {
2929 case NETDEV_PRECHANGEUPPER:
2930 upper_dev = info->upper_dev;
2931 if (!info->master || !info->linking)
2932 break;
2933 if (!netif_is_bridge_master(upper_dev))
2934 return NOTIFY_BAD;
2935 /* We can't have multiple VLAN interfaces configured on
2936 * the same port and being members in the same bridge.
2937 */
2938 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
2939 upper_dev))
2940 return NOTIFY_BAD;
2941 break;
2942 case NETDEV_CHANGEUPPER:
2943 upper_dev = info->upper_dev;
2944 if (!info->master)
2945 break;
2946 if (info->linking) {
2947 if (!mlxsw_sp_vport) {
2948 WARN_ON(!mlxsw_sp_vport);
2949 return NOTIFY_BAD;
2950 }
2951 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
2952 upper_dev);
2953 if (err) {
2954 netdev_err(dev, "Failed to join bridge\n");
2955 return NOTIFY_BAD;
2956 }
2957 } else {
2958 /* We ignore bridge's unlinking notifications if vPort
2959 * is gone, since we already left the bridge when the
2960 * VLAN device was unlinked from the real device.
2961 */
2962 if (!mlxsw_sp_vport)
2963 return NOTIFY_DONE;
2964 err = mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport,
Ido Schimmel039c49a2016-01-27 15:20:18 +01002965 upper_dev, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01002966 if (err) {
2967 netdev_err(dev, "Failed to leave bridge\n");
2968 return NOTIFY_BAD;
2969 }
2970 }
2971 }
2972
2973 return NOTIFY_DONE;
2974}
2975
Ido Schimmel272c4472015-12-15 16:03:47 +01002976static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
2977 unsigned long event, void *ptr,
2978 u16 vid)
2979{
2980 struct net_device *dev;
2981 struct list_head *iter;
2982 int ret;
2983
2984 netdev_for_each_lower_dev(lag_dev, dev, iter) {
2985 if (mlxsw_sp_port_dev_check(dev)) {
2986 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
2987 vid);
2988 if (ret == NOTIFY_BAD)
2989 return ret;
2990 }
2991 }
2992
2993 return NOTIFY_DONE;
2994}
2995
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01002996static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
2997 unsigned long event, void *ptr)
2998{
2999 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
3000 u16 vid = vlan_dev_vlan_id(vlan_dev);
3001
Ido Schimmel272c4472015-12-15 16:03:47 +01003002 if (mlxsw_sp_port_dev_check(real_dev))
3003 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
3004 vid);
3005 else if (netif_is_lag_master(real_dev))
3006 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
3007 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003008
Ido Schimmel272c4472015-12-15 16:03:47 +01003009 return NOTIFY_DONE;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003010}
3011
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003012static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
3013 unsigned long event, void *ptr)
3014{
3015 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
3016
3017 if (mlxsw_sp_port_dev_check(dev))
3018 return mlxsw_sp_netdevice_port_event(dev, event, ptr);
3019
3020 if (netif_is_lag_master(dev))
3021 return mlxsw_sp_netdevice_lag_event(dev, event, ptr);
3022
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003023 if (is_vlan_dev(dev))
3024 return mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
3025
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003026 return NOTIFY_DONE;
3027}
3028
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003029static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
3030 .notifier_call = mlxsw_sp_netdevice_event,
3031};
3032
3033static int __init mlxsw_sp_module_init(void)
3034{
3035 int err;
3036
3037 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
3038 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
3039 if (err)
3040 goto err_core_driver_register;
3041 return 0;
3042
3043err_core_driver_register:
3044 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
3045 return err;
3046}
3047
3048static void __exit mlxsw_sp_module_exit(void)
3049{
3050 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
3051 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
3052}
3053
3054module_init(mlxsw_sp_module_init);
3055module_exit(mlxsw_sp_module_exit);
3056
3057MODULE_LICENSE("Dual BSD/GPL");
3058MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
3059MODULE_DESCRIPTION("Mellanox Spectrum driver");
3060MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);