blob: 00ffff91e73beaf6780918dcf6fb61c8bbffd3a1 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020052#include <net/switchdev.h>
53#include <generated/utsrelease.h>
54
55#include "spectrum.h"
56#include "core.h"
57#include "reg.h"
58#include "port.h"
59#include "trap.h"
60#include "txheader.h"
61
62static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
63static const char mlxsw_sp_driver_version[] = "1.0";
64
65/* tx_hdr_version
66 * Tx header version.
67 * Must be set to 1.
68 */
69MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
70
71/* tx_hdr_ctl
72 * Packet control type.
73 * 0 - Ethernet control (e.g. EMADs, LACP)
74 * 1 - Ethernet data
75 */
76MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
77
78/* tx_hdr_proto
79 * Packet protocol type. Must be set to 1 (Ethernet).
80 */
81MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
82
83/* tx_hdr_rx_is_router
84 * Packet is sent from the router. Valid for data packets only.
85 */
86MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
87
88/* tx_hdr_fid_valid
89 * Indicates if the 'fid' field is valid and should be used for
90 * forwarding lookup. Valid for data packets only.
91 */
92MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
93
94/* tx_hdr_swid
95 * Switch partition ID. Must be set to 0.
96 */
97MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
98
99/* tx_hdr_control_tclass
100 * Indicates if the packet should use the control TClass and not one
101 * of the data TClasses.
102 */
103MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
104
105/* tx_hdr_etclass
106 * Egress TClass to be used on the egress device on the egress port.
107 */
108MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
109
110/* tx_hdr_port_mid
111 * Destination local port for unicast packets.
112 * Destination multicast ID for multicast packets.
113 *
114 * Control packets are directed to a specific egress port, while data
115 * packets are transmitted through the CPU port (0) into the switch partition,
116 * where forwarding rules are applied.
117 */
118MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
119
120/* tx_hdr_fid
121 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
122 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
123 * Valid for data packets only.
124 */
125MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
126
127/* tx_hdr_type
128 * 0 - Data packets
129 * 6 - Control packets
130 */
131MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
132
133static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
134 const struct mlxsw_tx_info *tx_info)
135{
136 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
137
138 memset(txhdr, 0, MLXSW_TXHDR_LEN);
139
140 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
141 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
142 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
143 mlxsw_tx_hdr_swid_set(txhdr, 0);
144 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
145 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
146 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
147}
148
149static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
150{
151 char spad_pl[MLXSW_REG_SPAD_LEN];
152 int err;
153
154 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
155 if (err)
156 return err;
157 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
158 return 0;
159}
160
161static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
162 bool is_up)
163{
164 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
165 char paos_pl[MLXSW_REG_PAOS_LEN];
166
167 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
168 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
169 MLXSW_PORT_ADMIN_STATUS_DOWN);
170 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
171}
172
173static int mlxsw_sp_port_oper_status_get(struct mlxsw_sp_port *mlxsw_sp_port,
174 bool *p_is_up)
175{
176 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
177 char paos_pl[MLXSW_REG_PAOS_LEN];
178 u8 oper_status;
179 int err;
180
181 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port, 0);
182 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
183 if (err)
184 return err;
185 oper_status = mlxsw_reg_paos_oper_status_get(paos_pl);
186 *p_is_up = oper_status == MLXSW_PORT_ADMIN_STATUS_UP ? true : false;
187 return 0;
188}
189
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200190static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
191 unsigned char *addr)
192{
193 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
194 char ppad_pl[MLXSW_REG_PPAD_LEN];
195
196 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
197 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
198 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
199}
200
201static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
202{
203 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
204 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
205
206 ether_addr_copy(addr, mlxsw_sp->base_mac);
207 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
208 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
209}
210
211static int mlxsw_sp_port_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
212 u16 vid, enum mlxsw_reg_spms_state state)
213{
214 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
215 char *spms_pl;
216 int err;
217
218 spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
219 if (!spms_pl)
220 return -ENOMEM;
221 mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
222 mlxsw_reg_spms_vid_pack(spms_pl, vid, state);
223 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
224 kfree(spms_pl);
225 return err;
226}
227
228static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
229{
230 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
231 char pmtu_pl[MLXSW_REG_PMTU_LEN];
232 int max_mtu;
233 int err;
234
235 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
236 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
237 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
238 if (err)
239 return err;
240 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
241
242 if (mtu > max_mtu)
243 return -EINVAL;
244
245 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
246 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
247}
248
249static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
250{
251 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
252 char pspa_pl[MLXSW_REG_PSPA_LEN];
253
254 mlxsw_reg_pspa_pack(pspa_pl, swid, mlxsw_sp_port->local_port);
255 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
256}
257
258static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
259 bool enable)
260{
261 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
262 char svpe_pl[MLXSW_REG_SVPE_LEN];
263
264 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
265 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
266}
267
268int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
269 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
270 u16 vid)
271{
272 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
273 char svfa_pl[MLXSW_REG_SVFA_LEN];
274
275 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
276 fid, vid);
277 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
278}
279
280static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
281 u16 vid, bool learn_enable)
282{
283 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
284 char *spvmlr_pl;
285 int err;
286
287 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
288 if (!spvmlr_pl)
289 return -ENOMEM;
290 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
291 learn_enable);
292 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
293 kfree(spvmlr_pl);
294 return err;
295}
296
297static int
298mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
299{
300 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
301 char sspr_pl[MLXSW_REG_SSPR_LEN];
302
303 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
304 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
305}
306
307static int mlxsw_sp_port_module_check(struct mlxsw_sp_port *mlxsw_sp_port,
308 bool *p_usable)
309{
310 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
311 char pmlp_pl[MLXSW_REG_PMLP_LEN];
312 int err;
313
314 mlxsw_reg_pmlp_pack(pmlp_pl, mlxsw_sp_port->local_port);
315 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
316 if (err)
317 return err;
318 *p_usable = mlxsw_reg_pmlp_width_get(pmlp_pl) ? true : false;
319 return 0;
320}
321
322static int mlxsw_sp_port_open(struct net_device *dev)
323{
324 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
325 int err;
326
327 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
328 if (err)
329 return err;
330 netif_start_queue(dev);
331 return 0;
332}
333
334static int mlxsw_sp_port_stop(struct net_device *dev)
335{
336 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
337
338 netif_stop_queue(dev);
339 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
340}
341
342static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
343 struct net_device *dev)
344{
345 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
346 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
347 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
348 const struct mlxsw_tx_info tx_info = {
349 .local_port = mlxsw_sp_port->local_port,
350 .is_emad = false,
351 };
352 u64 len;
353 int err;
354
355 if (mlxsw_core_skb_transmit_busy(mlxsw_sp, &tx_info))
356 return NETDEV_TX_BUSY;
357
358 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
359 struct sk_buff *skb_orig = skb;
360
361 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
362 if (!skb) {
363 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
364 dev_kfree_skb_any(skb_orig);
365 return NETDEV_TX_OK;
366 }
367 }
368
369 if (eth_skb_pad(skb)) {
370 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
371 return NETDEV_TX_OK;
372 }
373
374 mlxsw_sp_txhdr_construct(skb, &tx_info);
375 len = skb->len;
376 /* Due to a race we might fail here because of a full queue. In that
377 * unlikely case we simply drop the packet.
378 */
379 err = mlxsw_core_skb_transmit(mlxsw_sp, skb, &tx_info);
380
381 if (!err) {
382 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
383 u64_stats_update_begin(&pcpu_stats->syncp);
384 pcpu_stats->tx_packets++;
385 pcpu_stats->tx_bytes += len;
386 u64_stats_update_end(&pcpu_stats->syncp);
387 } else {
388 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
389 dev_kfree_skb_any(skb);
390 }
391 return NETDEV_TX_OK;
392}
393
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100394static void mlxsw_sp_set_rx_mode(struct net_device *dev)
395{
396}
397
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200398static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
399{
400 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
401 struct sockaddr *addr = p;
402 int err;
403
404 if (!is_valid_ether_addr(addr->sa_data))
405 return -EADDRNOTAVAIL;
406
407 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
408 if (err)
409 return err;
410 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
411 return 0;
412}
413
414static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
415{
416 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
417 int err;
418
419 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
420 if (err)
421 return err;
422 dev->mtu = mtu;
423 return 0;
424}
425
426static struct rtnl_link_stats64 *
427mlxsw_sp_port_get_stats64(struct net_device *dev,
428 struct rtnl_link_stats64 *stats)
429{
430 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
431 struct mlxsw_sp_port_pcpu_stats *p;
432 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
433 u32 tx_dropped = 0;
434 unsigned int start;
435 int i;
436
437 for_each_possible_cpu(i) {
438 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
439 do {
440 start = u64_stats_fetch_begin_irq(&p->syncp);
441 rx_packets = p->rx_packets;
442 rx_bytes = p->rx_bytes;
443 tx_packets = p->tx_packets;
444 tx_bytes = p->tx_bytes;
445 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
446
447 stats->rx_packets += rx_packets;
448 stats->rx_bytes += rx_bytes;
449 stats->tx_packets += tx_packets;
450 stats->tx_bytes += tx_bytes;
451 /* tx_dropped is u32, updated without syncp protection. */
452 tx_dropped += p->tx_dropped;
453 }
454 stats->tx_dropped = tx_dropped;
455 return stats;
456}
457
458int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
459 u16 vid_end, bool is_member, bool untagged)
460{
461 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
462 char *spvm_pl;
463 int err;
464
465 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
466 if (!spvm_pl)
467 return -ENOMEM;
468
469 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
470 vid_end, is_member, untagged);
471 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
472 kfree(spvm_pl);
473 return err;
474}
475
476static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
477{
478 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
479 u16 vid, last_visited_vid;
480 int err;
481
482 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
483 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
484 vid);
485 if (err) {
486 last_visited_vid = vid;
487 goto err_port_vid_to_fid_set;
488 }
489 }
490
491 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
492 if (err) {
493 last_visited_vid = VLAN_N_VID;
494 goto err_port_vid_to_fid_set;
495 }
496
497 return 0;
498
499err_port_vid_to_fid_set:
500 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
501 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
502 vid);
503 return err;
504}
505
506static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
507{
508 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
509 u16 vid;
510 int err;
511
512 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
513 if (err)
514 return err;
515
516 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
517 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
518 vid, vid);
519 if (err)
520 return err;
521 }
522
523 return 0;
524}
525
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100526static struct mlxsw_sp_vfid *
527mlxsw_sp_vfid_find(const struct mlxsw_sp *mlxsw_sp, u16 vid)
528{
529 struct mlxsw_sp_vfid *vfid;
530
531 list_for_each_entry(vfid, &mlxsw_sp->port_vfids.list, list) {
532 if (vfid->vid == vid)
533 return vfid;
534 }
535
536 return NULL;
537}
538
539static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
540{
541 return find_first_zero_bit(mlxsw_sp->port_vfids.mapped,
542 MLXSW_SP_VFID_PORT_MAX);
543}
544
545static int __mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp, u16 vfid)
546{
547 u16 fid = mlxsw_sp_vfid_to_fid(vfid);
548 char sfmr_pl[MLXSW_REG_SFMR_LEN];
549
550 mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_CREATE_FID, fid, 0);
551 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
552}
553
554static void __mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp, u16 vfid)
555{
556 u16 fid = mlxsw_sp_vfid_to_fid(vfid);
557 char sfmr_pl[MLXSW_REG_SFMR_LEN];
558
559 mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_DESTROY_FID, fid, 0);
560 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
561}
562
563static struct mlxsw_sp_vfid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
564 u16 vid)
565{
566 struct device *dev = mlxsw_sp->bus_info->dev;
567 struct mlxsw_sp_vfid *vfid;
568 u16 n_vfid;
569 int err;
570
571 n_vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
572 if (n_vfid == MLXSW_SP_VFID_PORT_MAX) {
573 dev_err(dev, "No available vFIDs\n");
574 return ERR_PTR(-ERANGE);
575 }
576
577 err = __mlxsw_sp_vfid_create(mlxsw_sp, n_vfid);
578 if (err) {
579 dev_err(dev, "Failed to create vFID=%d\n", n_vfid);
580 return ERR_PTR(err);
581 }
582
583 vfid = kzalloc(sizeof(*vfid), GFP_KERNEL);
584 if (!vfid)
585 goto err_allocate_vfid;
586
587 vfid->vfid = n_vfid;
588 vfid->vid = vid;
589
590 list_add(&vfid->list, &mlxsw_sp->port_vfids.list);
591 set_bit(n_vfid, mlxsw_sp->port_vfids.mapped);
592
593 return vfid;
594
595err_allocate_vfid:
596 __mlxsw_sp_vfid_destroy(mlxsw_sp, n_vfid);
597 return ERR_PTR(-ENOMEM);
598}
599
600static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
601 struct mlxsw_sp_vfid *vfid)
602{
603 clear_bit(vfid->vfid, mlxsw_sp->port_vfids.mapped);
604 list_del(&vfid->list);
605
606 __mlxsw_sp_vfid_destroy(mlxsw_sp, vfid->vfid);
607
608 kfree(vfid);
609}
610
611static struct mlxsw_sp_port *
612mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port,
613 struct mlxsw_sp_vfid *vfid)
614{
615 struct mlxsw_sp_port *mlxsw_sp_vport;
616
617 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
618 if (!mlxsw_sp_vport)
619 return NULL;
620
621 /* dev will be set correctly after the VLAN device is linked
622 * with the real device. In case of bridge SELF invocation, dev
623 * will remain as is.
624 */
625 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
626 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
627 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
628 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
629 mlxsw_sp_vport->vport.vfid = vfid;
630 mlxsw_sp_vport->vport.vid = vfid->vid;
631
632 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
633
634 return mlxsw_sp_vport;
635}
636
637static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
638{
639 list_del(&mlxsw_sp_vport->vport.list);
640 kfree(mlxsw_sp_vport);
641}
642
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200643int mlxsw_sp_port_add_vid(struct net_device *dev, __be16 __always_unused proto,
644 u16 vid)
645{
646 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
647 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100648 struct mlxsw_sp_port *mlxsw_sp_vport;
649 struct mlxsw_sp_vfid *vfid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200650 int err;
651
652 /* VLAN 0 is added to HW filter when device goes up, but it is
653 * reserved in our case, so simply return.
654 */
655 if (!vid)
656 return 0;
657
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100658 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200659 netdev_warn(dev, "VID=%d already configured\n", vid);
660 return 0;
661 }
662
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100663 vfid = mlxsw_sp_vfid_find(mlxsw_sp, vid);
664 if (!vfid) {
665 vfid = mlxsw_sp_vfid_create(mlxsw_sp, vid);
666 if (IS_ERR(vfid)) {
667 netdev_err(dev, "Failed to create vFID for VID=%d\n",
668 vid);
669 return PTR_ERR(vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200670 }
671 }
672
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100673 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vfid);
674 if (!mlxsw_sp_vport) {
675 netdev_err(dev, "Failed to create vPort for VID=%d\n", vid);
676 err = -ENOMEM;
677 goto err_port_vport_create;
678 }
679
680 if (!vfid->nr_vports) {
681 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid,
682 true);
683 if (err) {
684 netdev_err(dev, "Failed to setup flooding for vFID=%d\n",
685 vfid->vfid);
686 goto err_vport_flood_set;
687 }
688 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200689
690 /* When adding the first VLAN interface on a bridged port we need to
691 * transition all the active 802.1Q bridge VLANs to use explicit
692 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
693 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100694 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200695 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
696 if (err) {
697 netdev_err(dev, "Failed to set to Virtual mode\n");
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100698 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200699 }
700 }
701
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100702 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200703 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100704 true,
705 mlxsw_sp_vfid_to_fid(vfid->vfid),
706 vid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200707 if (err) {
708 netdev_err(dev, "Failed to map {Port, VID=%d} to vFID=%d\n",
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100709 vid, vfid->vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200710 goto err_port_vid_to_fid_set;
711 }
712
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100713 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200714 if (err) {
715 netdev_err(dev, "Failed to disable learning for VID=%d\n", vid);
716 goto err_port_vid_learning_set;
717 }
718
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100719 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200720 if (err) {
721 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
722 vid);
723 goto err_port_add_vid;
724 }
725
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100726 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_vport, vid,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200727 MLXSW_REG_SPMS_STATE_FORWARDING);
728 if (err) {
729 netdev_err(dev, "Failed to set STP state for VID=%d\n", vid);
730 goto err_port_stp_state_set;
731 }
732
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100733 vfid->nr_vports++;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200734
735 return 0;
736
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200737err_port_stp_state_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100738 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200739err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100740 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200741err_port_vid_learning_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100742 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200743 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID, false,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100744 mlxsw_sp_vfid_to_fid(vfid->vfid), vid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200745err_port_vid_to_fid_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100746 if (list_is_singular(&mlxsw_sp_port->vports_list))
747 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
748err_port_vp_mode_trans:
749 if (!vfid->nr_vports)
750 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid, false);
751err_vport_flood_set:
752 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
753err_port_vport_create:
754 if (!vfid->nr_vports)
755 mlxsw_sp_vfid_destroy(mlxsw_sp, vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200756 return err;
757}
758
759int mlxsw_sp_port_kill_vid(struct net_device *dev,
760 __be16 __always_unused proto, u16 vid)
761{
762 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100763 struct mlxsw_sp_port *mlxsw_sp_vport;
764 struct mlxsw_sp_vfid *vfid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200765 int err;
766
767 /* VLAN 0 is removed from HW filter when device goes down, but
768 * it is reserved in our case, so simply return.
769 */
770 if (!vid)
771 return 0;
772
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100773 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
774 if (!mlxsw_sp_vport) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200775 netdev_warn(dev, "VID=%d does not exist\n", vid);
776 return 0;
777 }
778
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100779 vfid = mlxsw_sp_vport->vport.vfid;
780
781 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_vport, vid,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200782 MLXSW_REG_SPMS_STATE_DISCARDING);
783 if (err) {
784 netdev_err(dev, "Failed to set STP state for VID=%d\n", vid);
785 return err;
786 }
787
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100788 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200789 if (err) {
790 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
791 vid);
792 return err;
793 }
794
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100795 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200796 if (err) {
797 netdev_err(dev, "Failed to enable learning for VID=%d\n", vid);
798 return err;
799 }
800
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100801 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200802 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100803 false,
804 mlxsw_sp_vfid_to_fid(vfid->vfid),
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200805 vid);
806 if (err) {
807 netdev_err(dev, "Failed to invalidate {Port, VID=%d} to vFID=%d mapping\n",
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100808 vid, vfid->vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200809 return err;
810 }
811
812 /* When removing the last VLAN interface on a bridged port we need to
813 * transition all active 802.1Q bridge VLANs to use VID to FID
814 * mappings and set port's mode to VLAN mode.
815 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100816 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200817 err = mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
818 if (err) {
819 netdev_err(dev, "Failed to set to VLAN mode\n");
820 return err;
821 }
822 }
823
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100824 vfid->nr_vports--;
825 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
826
827 /* Destroy the vFID if no vPorts are assigned to it anymore. */
828 if (!vfid->nr_vports)
829 mlxsw_sp_vfid_destroy(mlxsw_sp_port->mlxsw_sp, vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200830
831 return 0;
832}
833
834static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
835 .ndo_open = mlxsw_sp_port_open,
836 .ndo_stop = mlxsw_sp_port_stop,
837 .ndo_start_xmit = mlxsw_sp_port_xmit,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100838 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200839 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
840 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
841 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
842 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
843 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
844 .ndo_fdb_add = switchdev_port_fdb_add,
845 .ndo_fdb_del = switchdev_port_fdb_del,
846 .ndo_fdb_dump = switchdev_port_fdb_dump,
847 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
848 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
849 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
850};
851
852static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
853 struct ethtool_drvinfo *drvinfo)
854{
855 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
856 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
857
858 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
859 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
860 sizeof(drvinfo->version));
861 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
862 "%d.%d.%d",
863 mlxsw_sp->bus_info->fw_rev.major,
864 mlxsw_sp->bus_info->fw_rev.minor,
865 mlxsw_sp->bus_info->fw_rev.subminor);
866 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
867 sizeof(drvinfo->bus_info));
868}
869
870struct mlxsw_sp_port_hw_stats {
871 char str[ETH_GSTRING_LEN];
872 u64 (*getter)(char *payload);
873};
874
875static const struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
876 {
877 .str = "a_frames_transmitted_ok",
878 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
879 },
880 {
881 .str = "a_frames_received_ok",
882 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
883 },
884 {
885 .str = "a_frame_check_sequence_errors",
886 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
887 },
888 {
889 .str = "a_alignment_errors",
890 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
891 },
892 {
893 .str = "a_octets_transmitted_ok",
894 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
895 },
896 {
897 .str = "a_octets_received_ok",
898 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
899 },
900 {
901 .str = "a_multicast_frames_xmitted_ok",
902 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
903 },
904 {
905 .str = "a_broadcast_frames_xmitted_ok",
906 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
907 },
908 {
909 .str = "a_multicast_frames_received_ok",
910 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
911 },
912 {
913 .str = "a_broadcast_frames_received_ok",
914 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
915 },
916 {
917 .str = "a_in_range_length_errors",
918 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
919 },
920 {
921 .str = "a_out_of_range_length_field",
922 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
923 },
924 {
925 .str = "a_frame_too_long_errors",
926 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
927 },
928 {
929 .str = "a_symbol_error_during_carrier",
930 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
931 },
932 {
933 .str = "a_mac_control_frames_transmitted",
934 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
935 },
936 {
937 .str = "a_mac_control_frames_received",
938 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
939 },
940 {
941 .str = "a_unsupported_opcodes_received",
942 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
943 },
944 {
945 .str = "a_pause_mac_ctrl_frames_received",
946 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
947 },
948 {
949 .str = "a_pause_mac_ctrl_frames_xmitted",
950 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
951 },
952};
953
954#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
955
956static void mlxsw_sp_port_get_strings(struct net_device *dev,
957 u32 stringset, u8 *data)
958{
959 u8 *p = data;
960 int i;
961
962 switch (stringset) {
963 case ETH_SS_STATS:
964 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
965 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
966 ETH_GSTRING_LEN);
967 p += ETH_GSTRING_LEN;
968 }
969 break;
970 }
971}
972
Ido Schimmel3a66ee32015-11-27 13:45:55 +0100973static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
974 enum ethtool_phys_id_state state)
975{
976 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
977 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
978 char mlcr_pl[MLXSW_REG_MLCR_LEN];
979 bool active;
980
981 switch (state) {
982 case ETHTOOL_ID_ACTIVE:
983 active = true;
984 break;
985 case ETHTOOL_ID_INACTIVE:
986 active = false;
987 break;
988 default:
989 return -EOPNOTSUPP;
990 }
991
992 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
993 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
994}
995
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200996static void mlxsw_sp_port_get_stats(struct net_device *dev,
997 struct ethtool_stats *stats, u64 *data)
998{
999 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1000 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1001 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
1002 int i;
1003 int err;
1004
1005 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port);
1006 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
1007 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++)
1008 data[i] = !err ? mlxsw_sp_port_hw_stats[i].getter(ppcnt_pl) : 0;
1009}
1010
1011static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1012{
1013 switch (sset) {
1014 case ETH_SS_STATS:
1015 return MLXSW_SP_PORT_HW_STATS_LEN;
1016 default:
1017 return -EOPNOTSUPP;
1018 }
1019}
1020
1021struct mlxsw_sp_port_link_mode {
1022 u32 mask;
1023 u32 supported;
1024 u32 advertised;
1025 u32 speed;
1026};
1027
1028static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1029 {
1030 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1031 .supported = SUPPORTED_100baseT_Full,
1032 .advertised = ADVERTISED_100baseT_Full,
1033 .speed = 100,
1034 },
1035 {
1036 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1037 .speed = 100,
1038 },
1039 {
1040 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1041 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1042 .supported = SUPPORTED_1000baseKX_Full,
1043 .advertised = ADVERTISED_1000baseKX_Full,
1044 .speed = 1000,
1045 },
1046 {
1047 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1048 .supported = SUPPORTED_10000baseT_Full,
1049 .advertised = ADVERTISED_10000baseT_Full,
1050 .speed = 10000,
1051 },
1052 {
1053 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1054 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1055 .supported = SUPPORTED_10000baseKX4_Full,
1056 .advertised = ADVERTISED_10000baseKX4_Full,
1057 .speed = 10000,
1058 },
1059 {
1060 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1061 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1062 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1063 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1064 .supported = SUPPORTED_10000baseKR_Full,
1065 .advertised = ADVERTISED_10000baseKR_Full,
1066 .speed = 10000,
1067 },
1068 {
1069 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1070 .supported = SUPPORTED_20000baseKR2_Full,
1071 .advertised = ADVERTISED_20000baseKR2_Full,
1072 .speed = 20000,
1073 },
1074 {
1075 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1076 .supported = SUPPORTED_40000baseCR4_Full,
1077 .advertised = ADVERTISED_40000baseCR4_Full,
1078 .speed = 40000,
1079 },
1080 {
1081 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1082 .supported = SUPPORTED_40000baseKR4_Full,
1083 .advertised = ADVERTISED_40000baseKR4_Full,
1084 .speed = 40000,
1085 },
1086 {
1087 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1088 .supported = SUPPORTED_40000baseSR4_Full,
1089 .advertised = ADVERTISED_40000baseSR4_Full,
1090 .speed = 40000,
1091 },
1092 {
1093 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1094 .supported = SUPPORTED_40000baseLR4_Full,
1095 .advertised = ADVERTISED_40000baseLR4_Full,
1096 .speed = 40000,
1097 },
1098 {
1099 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1100 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1101 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1102 .speed = 25000,
1103 },
1104 {
1105 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1106 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1107 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1108 .speed = 50000,
1109 },
1110 {
1111 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1112 .supported = SUPPORTED_56000baseKR4_Full,
1113 .advertised = ADVERTISED_56000baseKR4_Full,
1114 .speed = 56000,
1115 },
1116 {
1117 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1118 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1119 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1120 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1121 .speed = 100000,
1122 },
1123};
1124
1125#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1126
1127static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1128{
1129 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1130 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1131 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1132 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1133 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1134 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1135 return SUPPORTED_FIBRE;
1136
1137 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1138 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1139 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1140 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1141 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1142 return SUPPORTED_Backplane;
1143 return 0;
1144}
1145
1146static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1147{
1148 u32 modes = 0;
1149 int i;
1150
1151 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1152 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1153 modes |= mlxsw_sp_port_link_mode[i].supported;
1154 }
1155 return modes;
1156}
1157
1158static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1159{
1160 u32 modes = 0;
1161 int i;
1162
1163 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1164 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1165 modes |= mlxsw_sp_port_link_mode[i].advertised;
1166 }
1167 return modes;
1168}
1169
1170static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1171 struct ethtool_cmd *cmd)
1172{
1173 u32 speed = SPEED_UNKNOWN;
1174 u8 duplex = DUPLEX_UNKNOWN;
1175 int i;
1176
1177 if (!carrier_ok)
1178 goto out;
1179
1180 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1181 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1182 speed = mlxsw_sp_port_link_mode[i].speed;
1183 duplex = DUPLEX_FULL;
1184 break;
1185 }
1186 }
1187out:
1188 ethtool_cmd_speed_set(cmd, speed);
1189 cmd->duplex = duplex;
1190}
1191
1192static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1193{
1194 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1195 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1196 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1197 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1198 return PORT_FIBRE;
1199
1200 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1201 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1202 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1203 return PORT_DA;
1204
1205 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1206 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1207 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1208 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1209 return PORT_NONE;
1210
1211 return PORT_OTHER;
1212}
1213
1214static int mlxsw_sp_port_get_settings(struct net_device *dev,
1215 struct ethtool_cmd *cmd)
1216{
1217 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1218 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1219 char ptys_pl[MLXSW_REG_PTYS_LEN];
1220 u32 eth_proto_cap;
1221 u32 eth_proto_admin;
1222 u32 eth_proto_oper;
1223 int err;
1224
1225 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1226 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1227 if (err) {
1228 netdev_err(dev, "Failed to get proto");
1229 return err;
1230 }
1231 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1232 &eth_proto_admin, &eth_proto_oper);
1233
1234 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1235 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
1236 SUPPORTED_Pause | SUPPORTED_Asym_Pause;
1237 cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1238 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1239 eth_proto_oper, cmd);
1240
1241 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1242 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1243 cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1244
1245 cmd->transceiver = XCVR_INTERNAL;
1246 return 0;
1247}
1248
1249static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1250{
1251 u32 ptys_proto = 0;
1252 int i;
1253
1254 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1255 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1256 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1257 }
1258 return ptys_proto;
1259}
1260
1261static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1262{
1263 u32 ptys_proto = 0;
1264 int i;
1265
1266 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1267 if (speed == mlxsw_sp_port_link_mode[i].speed)
1268 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1269 }
1270 return ptys_proto;
1271}
1272
1273static int mlxsw_sp_port_set_settings(struct net_device *dev,
1274 struct ethtool_cmd *cmd)
1275{
1276 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1277 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1278 char ptys_pl[MLXSW_REG_PTYS_LEN];
1279 u32 speed;
1280 u32 eth_proto_new;
1281 u32 eth_proto_cap;
1282 u32 eth_proto_admin;
1283 bool is_up;
1284 int err;
1285
1286 speed = ethtool_cmd_speed(cmd);
1287
1288 eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ?
1289 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1290 mlxsw_sp_to_ptys_speed(speed);
1291
1292 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1293 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1294 if (err) {
1295 netdev_err(dev, "Failed to get proto");
1296 return err;
1297 }
1298 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1299
1300 eth_proto_new = eth_proto_new & eth_proto_cap;
1301 if (!eth_proto_new) {
1302 netdev_err(dev, "Not supported proto admin requested");
1303 return -EINVAL;
1304 }
1305 if (eth_proto_new == eth_proto_admin)
1306 return 0;
1307
1308 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1309 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1310 if (err) {
1311 netdev_err(dev, "Failed to set proto admin");
1312 return err;
1313 }
1314
1315 err = mlxsw_sp_port_oper_status_get(mlxsw_sp_port, &is_up);
1316 if (err) {
1317 netdev_err(dev, "Failed to get oper status");
1318 return err;
1319 }
1320 if (!is_up)
1321 return 0;
1322
1323 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1324 if (err) {
1325 netdev_err(dev, "Failed to set admin status");
1326 return err;
1327 }
1328
1329 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1330 if (err) {
1331 netdev_err(dev, "Failed to set admin status");
1332 return err;
1333 }
1334
1335 return 0;
1336}
1337
1338static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1339 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1340 .get_link = ethtool_op_get_link,
1341 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001342 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001343 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1344 .get_sset_count = mlxsw_sp_port_get_sset_count,
1345 .get_settings = mlxsw_sp_port_get_settings,
1346 .set_settings = mlxsw_sp_port_set_settings,
1347};
1348
1349static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port)
1350{
1351 struct mlxsw_sp_port *mlxsw_sp_port;
1352 struct net_device *dev;
1353 bool usable;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001354 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001355 int err;
1356
1357 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
1358 if (!dev)
1359 return -ENOMEM;
1360 mlxsw_sp_port = netdev_priv(dev);
1361 mlxsw_sp_port->dev = dev;
1362 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
1363 mlxsw_sp_port->local_port = local_port;
1364 mlxsw_sp_port->learning = 1;
1365 mlxsw_sp_port->learning_sync = 1;
Ido Schimmel02930382015-10-28 10:16:58 +01001366 mlxsw_sp_port->uc_flood = 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001367 mlxsw_sp_port->pvid = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001368 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
1369 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
1370 if (!mlxsw_sp_port->active_vlans) {
1371 err = -ENOMEM;
1372 goto err_port_active_vlans_alloc;
1373 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001374 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001375
1376 mlxsw_sp_port->pcpu_stats =
1377 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
1378 if (!mlxsw_sp_port->pcpu_stats) {
1379 err = -ENOMEM;
1380 goto err_alloc_stats;
1381 }
1382
1383 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
1384 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
1385
1386 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
1387 if (err) {
1388 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
1389 mlxsw_sp_port->local_port);
1390 goto err_dev_addr_init;
1391 }
1392
1393 netif_carrier_off(dev);
1394
1395 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
1396 NETIF_F_HW_VLAN_CTAG_FILTER;
1397
1398 /* Each packet needs to have a Tx header (metadata) on top all other
1399 * headers.
1400 */
1401 dev->hard_header_len += MLXSW_TXHDR_LEN;
1402
1403 err = mlxsw_sp_port_module_check(mlxsw_sp_port, &usable);
1404 if (err) {
1405 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to check module\n",
1406 mlxsw_sp_port->local_port);
1407 goto err_port_module_check;
1408 }
1409
1410 if (!usable) {
1411 dev_dbg(mlxsw_sp->bus_info->dev, "Port %d: Not usable, skipping initialization\n",
1412 mlxsw_sp_port->local_port);
1413 goto port_not_usable;
1414 }
1415
1416 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
1417 if (err) {
1418 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
1419 mlxsw_sp_port->local_port);
1420 goto err_port_system_port_mapping_set;
1421 }
1422
1423 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
1424 if (err) {
1425 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
1426 mlxsw_sp_port->local_port);
1427 goto err_port_swid_set;
1428 }
1429
1430 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
1431 if (err) {
1432 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
1433 mlxsw_sp_port->local_port);
1434 goto err_port_mtu_set;
1435 }
1436
1437 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1438 if (err)
1439 goto err_port_admin_status_set;
1440
1441 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
1442 if (err) {
1443 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
1444 mlxsw_sp_port->local_port);
1445 goto err_port_buffers_init;
1446 }
1447
1448 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
1449 err = register_netdev(dev);
1450 if (err) {
1451 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
1452 mlxsw_sp_port->local_port);
1453 goto err_register_netdev;
1454 }
1455
1456 err = mlxsw_sp_port_vlan_init(mlxsw_sp_port);
1457 if (err)
1458 goto err_port_vlan_init;
1459
1460 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
1461 return 0;
1462
1463err_port_vlan_init:
1464 unregister_netdev(dev);
1465err_register_netdev:
1466err_port_buffers_init:
1467err_port_admin_status_set:
1468err_port_mtu_set:
1469err_port_swid_set:
1470err_port_system_port_mapping_set:
1471port_not_usable:
1472err_port_module_check:
1473err_dev_addr_init:
1474 free_percpu(mlxsw_sp_port->pcpu_stats);
1475err_alloc_stats:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001476 kfree(mlxsw_sp_port->active_vlans);
1477err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001478 free_netdev(dev);
1479 return err;
1480}
1481
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001482static void mlxsw_sp_port_vports_fini(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001483{
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001484 struct net_device *dev = mlxsw_sp_port->dev;
1485 struct mlxsw_sp_port *mlxsw_sp_vport, *tmp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001486
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001487 list_for_each_entry_safe(mlxsw_sp_vport, tmp,
1488 &mlxsw_sp_port->vports_list, vport.list) {
1489 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
1490
1491 /* vPorts created for VLAN devices should already be gone
1492 * by now, since we unregistered the port netdev.
1493 */
1494 WARN_ON(is_vlan_dev(mlxsw_sp_vport->dev));
1495 mlxsw_sp_port_kill_vid(dev, 0, vid);
1496 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001497}
1498
1499static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
1500{
1501 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
1502
1503 if (!mlxsw_sp_port)
1504 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001505 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001506 mlxsw_sp_port_vports_fini(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001507 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
1508 free_percpu(mlxsw_sp_port->pcpu_stats);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001509 kfree(mlxsw_sp_port->active_vlans);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001510 free_netdev(mlxsw_sp_port->dev);
1511}
1512
1513static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
1514{
1515 int i;
1516
1517 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
1518 mlxsw_sp_port_remove(mlxsw_sp, i);
1519 kfree(mlxsw_sp->ports);
1520}
1521
1522static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
1523{
1524 size_t alloc_size;
1525 int i;
1526 int err;
1527
1528 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
1529 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
1530 if (!mlxsw_sp->ports)
1531 return -ENOMEM;
1532
1533 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
1534 err = mlxsw_sp_port_create(mlxsw_sp, i);
1535 if (err)
1536 goto err_port_create;
1537 }
1538 return 0;
1539
1540err_port_create:
1541 for (i--; i >= 1; i--)
1542 mlxsw_sp_port_remove(mlxsw_sp, i);
1543 kfree(mlxsw_sp->ports);
1544 return err;
1545}
1546
1547static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
1548 char *pude_pl, void *priv)
1549{
1550 struct mlxsw_sp *mlxsw_sp = priv;
1551 struct mlxsw_sp_port *mlxsw_sp_port;
1552 enum mlxsw_reg_pude_oper_status status;
1553 u8 local_port;
1554
1555 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
1556 mlxsw_sp_port = mlxsw_sp->ports[local_port];
1557 if (!mlxsw_sp_port) {
1558 dev_warn(mlxsw_sp->bus_info->dev, "Port %d: Link event received for non-existent port\n",
1559 local_port);
1560 return;
1561 }
1562
1563 status = mlxsw_reg_pude_oper_status_get(pude_pl);
1564 if (status == MLXSW_PORT_OPER_STATUS_UP) {
1565 netdev_info(mlxsw_sp_port->dev, "link up\n");
1566 netif_carrier_on(mlxsw_sp_port->dev);
1567 } else {
1568 netdev_info(mlxsw_sp_port->dev, "link down\n");
1569 netif_carrier_off(mlxsw_sp_port->dev);
1570 }
1571}
1572
1573static struct mlxsw_event_listener mlxsw_sp_pude_event = {
1574 .func = mlxsw_sp_pude_event_func,
1575 .trap_id = MLXSW_TRAP_ID_PUDE,
1576};
1577
1578static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
1579 enum mlxsw_event_trap_id trap_id)
1580{
1581 struct mlxsw_event_listener *el;
1582 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1583 int err;
1584
1585 switch (trap_id) {
1586 case MLXSW_TRAP_ID_PUDE:
1587 el = &mlxsw_sp_pude_event;
1588 break;
1589 }
1590 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
1591 if (err)
1592 return err;
1593
1594 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
1595 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1596 if (err)
1597 goto err_event_trap_set;
1598
1599 return 0;
1600
1601err_event_trap_set:
1602 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
1603 return err;
1604}
1605
1606static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
1607 enum mlxsw_event_trap_id trap_id)
1608{
1609 struct mlxsw_event_listener *el;
1610
1611 switch (trap_id) {
1612 case MLXSW_TRAP_ID_PUDE:
1613 el = &mlxsw_sp_pude_event;
1614 break;
1615 }
1616 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
1617}
1618
1619static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
1620 void *priv)
1621{
1622 struct mlxsw_sp *mlxsw_sp = priv;
1623 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
1624 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
1625
1626 if (unlikely(!mlxsw_sp_port)) {
1627 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
1628 local_port);
1629 return;
1630 }
1631
1632 skb->dev = mlxsw_sp_port->dev;
1633
1634 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
1635 u64_stats_update_begin(&pcpu_stats->syncp);
1636 pcpu_stats->rx_packets++;
1637 pcpu_stats->rx_bytes += skb->len;
1638 u64_stats_update_end(&pcpu_stats->syncp);
1639
1640 skb->protocol = eth_type_trans(skb, skb->dev);
1641 netif_receive_skb(skb);
1642}
1643
1644static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
1645 {
1646 .func = mlxsw_sp_rx_listener_func,
1647 .local_port = MLXSW_PORT_DONT_CARE,
1648 .trap_id = MLXSW_TRAP_ID_FDB_MC,
1649 },
1650 /* Traps for specific L2 packet types, not trapped as FDB MC */
1651 {
1652 .func = mlxsw_sp_rx_listener_func,
1653 .local_port = MLXSW_PORT_DONT_CARE,
1654 .trap_id = MLXSW_TRAP_ID_STP,
1655 },
1656 {
1657 .func = mlxsw_sp_rx_listener_func,
1658 .local_port = MLXSW_PORT_DONT_CARE,
1659 .trap_id = MLXSW_TRAP_ID_LACP,
1660 },
1661 {
1662 .func = mlxsw_sp_rx_listener_func,
1663 .local_port = MLXSW_PORT_DONT_CARE,
1664 .trap_id = MLXSW_TRAP_ID_EAPOL,
1665 },
1666 {
1667 .func = mlxsw_sp_rx_listener_func,
1668 .local_port = MLXSW_PORT_DONT_CARE,
1669 .trap_id = MLXSW_TRAP_ID_LLDP,
1670 },
1671 {
1672 .func = mlxsw_sp_rx_listener_func,
1673 .local_port = MLXSW_PORT_DONT_CARE,
1674 .trap_id = MLXSW_TRAP_ID_MMRP,
1675 },
1676 {
1677 .func = mlxsw_sp_rx_listener_func,
1678 .local_port = MLXSW_PORT_DONT_CARE,
1679 .trap_id = MLXSW_TRAP_ID_MVRP,
1680 },
1681 {
1682 .func = mlxsw_sp_rx_listener_func,
1683 .local_port = MLXSW_PORT_DONT_CARE,
1684 .trap_id = MLXSW_TRAP_ID_RPVST,
1685 },
1686 {
1687 .func = mlxsw_sp_rx_listener_func,
1688 .local_port = MLXSW_PORT_DONT_CARE,
1689 .trap_id = MLXSW_TRAP_ID_DHCP,
1690 },
1691 {
1692 .func = mlxsw_sp_rx_listener_func,
1693 .local_port = MLXSW_PORT_DONT_CARE,
1694 .trap_id = MLXSW_TRAP_ID_IGMP_QUERY,
1695 },
1696 {
1697 .func = mlxsw_sp_rx_listener_func,
1698 .local_port = MLXSW_PORT_DONT_CARE,
1699 .trap_id = MLXSW_TRAP_ID_IGMP_V1_REPORT,
1700 },
1701 {
1702 .func = mlxsw_sp_rx_listener_func,
1703 .local_port = MLXSW_PORT_DONT_CARE,
1704 .trap_id = MLXSW_TRAP_ID_IGMP_V2_REPORT,
1705 },
1706 {
1707 .func = mlxsw_sp_rx_listener_func,
1708 .local_port = MLXSW_PORT_DONT_CARE,
1709 .trap_id = MLXSW_TRAP_ID_IGMP_V2_LEAVE,
1710 },
1711 {
1712 .func = mlxsw_sp_rx_listener_func,
1713 .local_port = MLXSW_PORT_DONT_CARE,
1714 .trap_id = MLXSW_TRAP_ID_IGMP_V3_REPORT,
1715 },
1716};
1717
1718static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
1719{
1720 char htgt_pl[MLXSW_REG_HTGT_LEN];
1721 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1722 int i;
1723 int err;
1724
1725 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
1726 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
1727 if (err)
1728 return err;
1729
1730 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
1731 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
1732 if (err)
1733 return err;
1734
1735 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
1736 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
1737 &mlxsw_sp_rx_listener[i],
1738 mlxsw_sp);
1739 if (err)
1740 goto err_rx_listener_register;
1741
1742 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
1743 mlxsw_sp_rx_listener[i].trap_id);
1744 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1745 if (err)
1746 goto err_rx_trap_set;
1747 }
1748 return 0;
1749
1750err_rx_trap_set:
1751 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
1752 &mlxsw_sp_rx_listener[i],
1753 mlxsw_sp);
1754err_rx_listener_register:
1755 for (i--; i >= 0; i--) {
1756 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD,
1757 mlxsw_sp_rx_listener[i].trap_id);
1758 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1759
1760 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
1761 &mlxsw_sp_rx_listener[i],
1762 mlxsw_sp);
1763 }
1764 return err;
1765}
1766
1767static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
1768{
1769 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1770 int i;
1771
1772 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
1773 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD,
1774 mlxsw_sp_rx_listener[i].trap_id);
1775 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1776
1777 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
1778 &mlxsw_sp_rx_listener[i],
1779 mlxsw_sp);
1780 }
1781}
1782
1783static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
1784 enum mlxsw_reg_sfgc_type type,
1785 enum mlxsw_reg_sfgc_bridge_type bridge_type)
1786{
1787 enum mlxsw_flood_table_type table_type;
1788 enum mlxsw_sp_flood_table flood_table;
1789 char sfgc_pl[MLXSW_REG_SFGC_LEN];
1790
1791 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID) {
1792 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
1793 flood_table = 0;
1794 } else {
1795 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
1796 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
1797 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
1798 else
1799 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
1800 }
1801
1802 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
1803 flood_table);
1804 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
1805}
1806
1807static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
1808{
1809 int type, err;
1810
1811 /* For non-offloaded netdevs, flood all traffic types to CPU
1812 * port.
1813 */
1814 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
1815 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
1816 continue;
1817
1818 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
1819 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
1820 if (err)
1821 return err;
1822 }
1823
1824 /* For bridged ports, use one flooding table for unknown unicast
1825 * traffic and a second table for unregistered multicast and
1826 * broadcast.
1827 */
1828 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
1829 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
1830 continue;
1831
1832 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
1833 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
1834 if (err)
1835 return err;
1836 }
1837
1838 return 0;
1839}
1840
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001841static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
1842{
1843 char slcr_pl[MLXSW_REG_SLCR_LEN];
1844
1845 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
1846 MLXSW_REG_SLCR_LAG_HASH_DMAC |
1847 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
1848 MLXSW_REG_SLCR_LAG_HASH_VLANID |
1849 MLXSW_REG_SLCR_LAG_HASH_SIP |
1850 MLXSW_REG_SLCR_LAG_HASH_DIP |
1851 MLXSW_REG_SLCR_LAG_HASH_SPORT |
1852 MLXSW_REG_SLCR_LAG_HASH_DPORT |
1853 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
1854 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
1855}
1856
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001857static int mlxsw_sp_init(void *priv, struct mlxsw_core *mlxsw_core,
1858 const struct mlxsw_bus_info *mlxsw_bus_info)
1859{
1860 struct mlxsw_sp *mlxsw_sp = priv;
1861 int err;
1862
1863 mlxsw_sp->core = mlxsw_core;
1864 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001865 INIT_LIST_HEAD(&mlxsw_sp->port_vfids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001866
1867 err = mlxsw_sp_base_mac_get(mlxsw_sp);
1868 if (err) {
1869 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
1870 return err;
1871 }
1872
1873 err = mlxsw_sp_ports_create(mlxsw_sp);
1874 if (err) {
1875 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001876 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001877 }
1878
1879 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
1880 if (err) {
1881 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
1882 goto err_event_register;
1883 }
1884
1885 err = mlxsw_sp_traps_init(mlxsw_sp);
1886 if (err) {
1887 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
1888 goto err_rx_listener_register;
1889 }
1890
1891 err = mlxsw_sp_flood_init(mlxsw_sp);
1892 if (err) {
1893 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
1894 goto err_flood_init;
1895 }
1896
1897 err = mlxsw_sp_buffers_init(mlxsw_sp);
1898 if (err) {
1899 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
1900 goto err_buffers_init;
1901 }
1902
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001903 err = mlxsw_sp_lag_init(mlxsw_sp);
1904 if (err) {
1905 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
1906 goto err_lag_init;
1907 }
1908
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001909 err = mlxsw_sp_switchdev_init(mlxsw_sp);
1910 if (err) {
1911 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
1912 goto err_switchdev_init;
1913 }
1914
1915 return 0;
1916
1917err_switchdev_init:
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001918err_lag_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001919err_buffers_init:
1920err_flood_init:
1921 mlxsw_sp_traps_fini(mlxsw_sp);
1922err_rx_listener_register:
1923 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
1924err_event_register:
1925 mlxsw_sp_ports_remove(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001926 return err;
1927}
1928
1929static void mlxsw_sp_fini(void *priv)
1930{
1931 struct mlxsw_sp *mlxsw_sp = priv;
1932
1933 mlxsw_sp_switchdev_fini(mlxsw_sp);
1934 mlxsw_sp_traps_fini(mlxsw_sp);
1935 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
1936 mlxsw_sp_ports_remove(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001937}
1938
1939static struct mlxsw_config_profile mlxsw_sp_config_profile = {
1940 .used_max_vepa_channels = 1,
1941 .max_vepa_channels = 0,
1942 .used_max_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001943 .max_lag = MLXSW_SP_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001944 .used_max_port_per_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001945 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001946 .used_max_mid = 1,
1947 .max_mid = 7000,
1948 .used_max_pgt = 1,
1949 .max_pgt = 0,
1950 .used_max_system_port = 1,
1951 .max_system_port = 64,
1952 .used_max_vlan_groups = 1,
1953 .max_vlan_groups = 127,
1954 .used_max_regions = 1,
1955 .max_regions = 400,
1956 .used_flood_tables = 1,
1957 .used_flood_mode = 1,
1958 .flood_mode = 3,
1959 .max_fid_offset_flood_tables = 2,
1960 .fid_offset_flood_table_size = VLAN_N_VID - 1,
1961 .max_fid_flood_tables = 1,
1962 .fid_flood_table_size = VLAN_N_VID,
1963 .used_max_ib_mc = 1,
1964 .max_ib_mc = 0,
1965 .used_max_pkey = 1,
1966 .max_pkey = 0,
1967 .swid_config = {
1968 {
1969 .used_type = 1,
1970 .type = MLXSW_PORT_SWID_TYPE_ETH,
1971 }
1972 },
1973};
1974
1975static struct mlxsw_driver mlxsw_sp_driver = {
1976 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
1977 .owner = THIS_MODULE,
1978 .priv_size = sizeof(struct mlxsw_sp),
1979 .init = mlxsw_sp_init,
1980 .fini = mlxsw_sp_fini,
1981 .txhdr_construct = mlxsw_sp_txhdr_construct,
1982 .txhdr_len = MLXSW_TXHDR_LEN,
1983 .profile = &mlxsw_sp_config_profile,
1984};
1985
1986static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
1987{
1988 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
1989}
1990
1991static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port)
1992{
1993 struct net_device *dev = mlxsw_sp_port->dev;
1994 int err;
1995
1996 /* When port is not bridged untagged packets are tagged with
1997 * PVID=VID=1, thereby creating an implicit VLAN interface in
1998 * the device. Remove it and let bridge code take care of its
1999 * own VLANs.
2000 */
2001 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
2002 if (err)
2003 netdev_err(dev, "Failed to remove VID 1\n");
2004
2005 return err;
2006}
2007
2008static int mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
2009{
2010 struct net_device *dev = mlxsw_sp_port->dev;
2011 int err;
2012
2013 /* Add implicit VLAN interface in the device, so that untagged
2014 * packets will be classified to the default vFID.
2015 */
2016 err = mlxsw_sp_port_add_vid(dev, 0, 1);
2017 if (err)
2018 netdev_err(dev, "Failed to add VID 1\n");
2019
2020 return err;
2021}
2022
2023static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
2024 struct net_device *br_dev)
2025{
2026 return !mlxsw_sp->master_bridge.dev ||
2027 mlxsw_sp->master_bridge.dev == br_dev;
2028}
2029
2030static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
2031 struct net_device *br_dev)
2032{
2033 mlxsw_sp->master_bridge.dev = br_dev;
2034 mlxsw_sp->master_bridge.ref_count++;
2035}
2036
2037static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp,
2038 struct net_device *br_dev)
2039{
2040 if (--mlxsw_sp->master_bridge.ref_count == 0)
2041 mlxsw_sp->master_bridge.dev = NULL;
2042}
2043
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002044static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002045{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002046 char sldr_pl[MLXSW_REG_SLDR_LEN];
2047
2048 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
2049 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2050}
2051
2052static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
2053{
2054 char sldr_pl[MLXSW_REG_SLDR_LEN];
2055
2056 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
2057 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2058}
2059
2060static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
2061 u16 lag_id, u8 port_index)
2062{
2063 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2064 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2065
2066 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
2067 lag_id, port_index);
2068 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2069}
2070
2071static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
2072 u16 lag_id)
2073{
2074 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2075 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2076
2077 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
2078 lag_id);
2079 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2080}
2081
2082static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
2083 u16 lag_id)
2084{
2085 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2086 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2087
2088 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
2089 lag_id);
2090 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2091}
2092
2093static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
2094 u16 lag_id)
2095{
2096 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2097 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2098
2099 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
2100 lag_id);
2101 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2102}
2103
2104static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
2105 struct net_device *lag_dev,
2106 u16 *p_lag_id)
2107{
2108 struct mlxsw_sp_upper *lag;
2109 int free_lag_id = -1;
2110 int i;
2111
2112 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
2113 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
2114 if (lag->ref_count) {
2115 if (lag->dev == lag_dev) {
2116 *p_lag_id = i;
2117 return 0;
2118 }
2119 } else if (free_lag_id < 0) {
2120 free_lag_id = i;
2121 }
2122 }
2123 if (free_lag_id < 0)
2124 return -EBUSY;
2125 *p_lag_id = free_lag_id;
2126 return 0;
2127}
2128
2129static bool
2130mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
2131 struct net_device *lag_dev,
2132 struct netdev_lag_upper_info *lag_upper_info)
2133{
2134 u16 lag_id;
2135
2136 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
2137 return false;
2138 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
2139 return false;
2140 return true;
2141}
2142
2143static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
2144 u16 lag_id, u8 *p_port_index)
2145{
2146 int i;
2147
2148 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
2149 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
2150 *p_port_index = i;
2151 return 0;
2152 }
2153 }
2154 return -EBUSY;
2155}
2156
2157static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
2158 struct net_device *lag_dev)
2159{
2160 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2161 struct mlxsw_sp_upper *lag;
2162 u16 lag_id;
2163 u8 port_index;
2164 int err;
2165
2166 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
2167 if (err)
2168 return err;
2169 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
2170 if (!lag->ref_count) {
2171 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
2172 if (err)
2173 return err;
2174 lag->dev = lag_dev;
2175 }
2176
2177 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
2178 if (err)
2179 return err;
2180 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
2181 if (err)
2182 goto err_col_port_add;
2183 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
2184 if (err)
2185 goto err_col_port_enable;
2186
2187 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
2188 mlxsw_sp_port->local_port);
2189 mlxsw_sp_port->lag_id = lag_id;
2190 mlxsw_sp_port->lagged = 1;
2191 lag->ref_count++;
2192 return 0;
2193
2194err_col_port_add:
2195 if (!lag->ref_count)
2196 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
2197err_col_port_enable:
2198 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
2199 return err;
2200}
2201
2202static int mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
2203 struct net_device *lag_dev)
2204{
2205 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2206 struct mlxsw_sp_upper *lag;
2207 u16 lag_id = mlxsw_sp_port->lag_id;
2208 int err;
2209
2210 if (!mlxsw_sp_port->lagged)
2211 return 0;
2212 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
2213 WARN_ON(lag->ref_count == 0);
2214
2215 err = mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
2216 if (err)
2217 return err;
Dan Carpenter82a06422015-12-09 13:33:51 +03002218 err = mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002219 if (err)
2220 return err;
2221
2222 if (lag->ref_count == 1) {
2223 err = mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
2224 if (err)
2225 return err;
2226 }
2227
2228 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
2229 mlxsw_sp_port->local_port);
2230 mlxsw_sp_port->lagged = 0;
2231 lag->ref_count--;
2232 return 0;
2233}
2234
Jiri Pirko74581202015-12-03 12:12:30 +01002235static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
2236 u16 lag_id)
2237{
2238 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2239 char sldr_pl[MLXSW_REG_SLDR_LEN];
2240
2241 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
2242 mlxsw_sp_port->local_port);
2243 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2244}
2245
2246static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
2247 u16 lag_id)
2248{
2249 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2250 char sldr_pl[MLXSW_REG_SLDR_LEN];
2251
2252 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
2253 mlxsw_sp_port->local_port);
2254 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2255}
2256
2257static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
2258 bool lag_tx_enabled)
2259{
2260 if (lag_tx_enabled)
2261 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
2262 mlxsw_sp_port->lag_id);
2263 else
2264 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
2265 mlxsw_sp_port->lag_id);
2266}
2267
2268static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
2269 struct netdev_lag_lower_state_info *info)
2270{
2271 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
2272}
2273
2274static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
2275 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002276{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002277 struct netdev_notifier_changeupper_info *info;
2278 struct mlxsw_sp_port *mlxsw_sp_port;
2279 struct net_device *upper_dev;
2280 struct mlxsw_sp *mlxsw_sp;
2281 int err;
2282
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002283 mlxsw_sp_port = netdev_priv(dev);
2284 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2285 info = ptr;
2286
2287 switch (event) {
2288 case NETDEV_PRECHANGEUPPER:
2289 upper_dev = info->upper_dev;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002290 if (!info->master || !info->linking)
2291 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002292 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002293 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002294 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
2295 return NOTIFY_BAD;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002296 if (netif_is_lag_master(upper_dev) &&
2297 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
2298 info->upper_info))
2299 return NOTIFY_BAD;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002300 break;
2301 case NETDEV_CHANGEUPPER:
2302 upper_dev = info->upper_dev;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002303 if (!info->master)
2304 break;
2305 if (netif_is_bridge_master(upper_dev)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002306 if (info->linking) {
2307 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port);
2308 if (err)
2309 netdev_err(dev, "Failed to join bridge\n");
2310 mlxsw_sp_master_bridge_inc(mlxsw_sp, upper_dev);
Jiri Pirko0d9b9702015-10-28 10:16:56 +01002311 mlxsw_sp_port->bridged = 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002312 } else {
2313 err = mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
2314 if (err)
2315 netdev_err(dev, "Failed to leave bridge\n");
Jiri Pirko0d9b9702015-10-28 10:16:56 +01002316 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002317 mlxsw_sp_master_bridge_dec(mlxsw_sp, upper_dev);
2318 }
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002319 } else if (netif_is_lag_master(upper_dev)) {
2320 if (info->linking) {
2321 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
2322 upper_dev);
2323 if (err) {
2324 netdev_err(dev, "Failed to join link aggregation\n");
2325 return NOTIFY_BAD;
2326 }
2327 } else {
2328 err = mlxsw_sp_port_lag_leave(mlxsw_sp_port,
2329 upper_dev);
2330 if (err) {
2331 netdev_err(dev, "Failed to leave link aggregation\n");
2332 return NOTIFY_BAD;
2333 }
2334 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002335 }
2336 break;
2337 }
2338
2339 return NOTIFY_DONE;
2340}
2341
Jiri Pirko74581202015-12-03 12:12:30 +01002342static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
2343 unsigned long event, void *ptr)
2344{
2345 struct netdev_notifier_changelowerstate_info *info;
2346 struct mlxsw_sp_port *mlxsw_sp_port;
2347 int err;
2348
2349 mlxsw_sp_port = netdev_priv(dev);
2350 info = ptr;
2351
2352 switch (event) {
2353 case NETDEV_CHANGELOWERSTATE:
2354 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
2355 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
2356 info->lower_state_info);
2357 if (err)
2358 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
2359 }
2360 break;
2361 }
2362
2363 return NOTIFY_DONE;
2364}
2365
2366static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
2367 unsigned long event, void *ptr)
2368{
2369 switch (event) {
2370 case NETDEV_PRECHANGEUPPER:
2371 case NETDEV_CHANGEUPPER:
2372 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
2373 case NETDEV_CHANGELOWERSTATE:
2374 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
2375 }
2376
2377 return NOTIFY_DONE;
2378}
2379
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002380static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
2381 unsigned long event, void *ptr)
2382{
2383 struct net_device *dev;
2384 struct list_head *iter;
2385 int ret;
2386
2387 netdev_for_each_lower_dev(lag_dev, dev, iter) {
2388 if (mlxsw_sp_port_dev_check(dev)) {
2389 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
2390 if (ret == NOTIFY_BAD)
2391 return ret;
2392 }
2393 }
2394
2395 return NOTIFY_DONE;
2396}
2397
2398static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
2399 unsigned long event, void *ptr)
2400{
2401 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2402
2403 if (mlxsw_sp_port_dev_check(dev))
2404 return mlxsw_sp_netdevice_port_event(dev, event, ptr);
2405
2406 if (netif_is_lag_master(dev))
2407 return mlxsw_sp_netdevice_lag_event(dev, event, ptr);
2408
2409 return NOTIFY_DONE;
2410}
2411
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002412static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
2413 .notifier_call = mlxsw_sp_netdevice_event,
2414};
2415
2416static int __init mlxsw_sp_module_init(void)
2417{
2418 int err;
2419
2420 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
2421 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
2422 if (err)
2423 goto err_core_driver_register;
2424 return 0;
2425
2426err_core_driver_register:
2427 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
2428 return err;
2429}
2430
2431static void __exit mlxsw_sp_module_exit(void)
2432{
2433 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
2434 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
2435}
2436
2437module_init(mlxsw_sp_module_init);
2438module_exit(mlxsw_sp_module_exit);
2439
2440MODULE_LICENSE("Dual BSD/GPL");
2441MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
2442MODULE_DESCRIPTION("Mellanox Spectrum driver");
2443MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);