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gerrit-public.fairphone.software / kernel / msm-5.4 / 55c79a40e34566e9d198f6205b0cf06e3d89ac0a / . / arch / arm / mach-davinci / include / mach / mux.h
blob: ae4f6dd3623c2de738eb5f1ac8fd8a24a2c10bb4 [file] [log] [blame]
Vladimir Barinov83f53222007-07-10 13:10:04 +0100[diff] [blame]1/*
Kevin Hilman5526b3f2009-04-14 09:50:37 -0500[diff] [blame]2 * Table of the DAVINCI register configurations for the PINMUX combinations
Vladimir Barinov83f53222007-07-10 13:10:04 +0100[diff] [blame]3 *
4 * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
5 *
Kevin Hilman5526b3f2009-04-14 09:50:37 -0500[diff] [blame]6 * Based on linux/include/asm-arm/arch-omap/mux.h:
7 * Copyright (C) 2003 - 2005 Nokia Corporation
8 *
9 * Written by Tony Lindgren
10 *
Vladimir Barinov83f53222007-07-10 13:10:04 +0100[diff] [blame]11 * 2007 (c) MontaVista Software, Inc. This file is licensed under
12 * the terms of the GNU General Public License version 2. This program
13 * is licensed "as is" without any warranty of any kind, whether express
14 * or implied.
Kevin Hilman5526b3f2009-04-14 09:50:37 -0500[diff] [blame]15 *
16 * Copyright (C) 2008 Texas Instruments.
Vladimir Barinov83f53222007-07-10 13:10:04 +0100[diff] [blame]17 */
Vladimir Barinov83f53222007-07-10 13:10:04 +0100[diff] [blame]18
Kevin Hilman5526b3f2009-04-14 09:50:37 -0500[diff] [blame]19#ifndef __INC_MACH_MUX_H
20#define __INC_MACH_MUX_H
Vladimir Barinov83f53222007-07-10 13:10:04 +0100[diff] [blame]21
Kevin Hilman5526b3f2009-04-14 09:50:37 -0500[diff] [blame]22struct mux_config {
23 const char *name;
24 const char *mux_reg_name;
25 const unsigned char mux_reg;
26 const unsigned char mask_offset;
27 const unsigned char mask;
28 const unsigned char mode;
29 bool debug;
30};
Vladimir Barinov83f53222007-07-10 13:10:04 +0100[diff] [blame]31
Kevin Hilman5526b3f2009-04-14 09:50:37 -0500[diff] [blame]32enum davinci_dm644x_index {
33 /* ATA and HDDIR functions */
34 DM644X_HDIREN,
35 DM644X_ATAEN,
36 DM644X_ATAEN_DISABLE,
37
38 /* HPI functions */
39 DM644X_HPIEN_DISABLE,
40
41 /* AEAW functions */
42 DM644X_AEAW,
43
44 /* Memory Stick */
45 DM644X_MSTK,
46
47 /* I2C */
48 DM644X_I2C,
49
50 /* ASP function */
51 DM644X_MCBSP,
52
53 /* UART1 */
54 DM644X_UART1,
55
56 /* UART2 */
57 DM644X_UART2,
58
59 /* PWM0 */
60 DM644X_PWM0,
61
62 /* PWM1 */
63 DM644X_PWM1,
64
65 /* PWM2 */
66 DM644X_PWM2,
67
68 /* VLYNQ function */
69 DM644X_VLYNQEN,
70 DM644X_VLSCREN,
71 DM644X_VLYNQWD,
72
73 /* EMAC and MDIO function */
74 DM644X_EMACEN,
75
76 /* GPIO3V[0:16] pins */
77 DM644X_GPIO3V,
78
79 /* GPIO pins */
80 DM644X_GPIO0,
81 DM644X_GPIO3,
82 DM644X_GPIO43_44,
83 DM644X_GPIO46_47,
84
85 /* VPBE */
86 DM644X_RGB666,
87
88 /* LCD */
89 DM644X_LOEEN,
90 DM644X_LFLDEN,
91};
92
93enum davinci_dm646x_index {
94 /* ATA function */
95 DM646X_ATAEN,
96
97 /* AUDIO Clock */
98 DM646X_AUDCK1,
99 DM646X_AUDCK0,
100
101 /* CRGEN Control */
102 DM646X_CRGMUX,
103
104 /* VPIF Control */
105 DM646X_STSOMUX_DISABLE,
106 DM646X_STSIMUX_DISABLE,
107 DM646X_PTSOMUX_DISABLE,
108 DM646X_PTSIMUX_DISABLE,
109
110 /* TSIF Control */
111 DM646X_STSOMUX,
112 DM646X_STSIMUX,
113 DM646X_PTSOMUX_PARALLEL,
114 DM646X_PTSIMUX_PARALLEL,
115 DM646X_PTSOMUX_SERIAL,
116 DM646X_PTSIMUX_SERIAL,
117};
118
119enum davinci_dm355_index {
120 /* MMC/SD 0 */
121 DM355_MMCSD0,
122
123 /* MMC/SD 1 */
124 DM355_SD1_CLK,
125 DM355_SD1_CMD,
126 DM355_SD1_DATA3,
127 DM355_SD1_DATA2,
128 DM355_SD1_DATA1,
129 DM355_SD1_DATA0,
130
131 /* I2C */
132 DM355_I2C_SDA,
133 DM355_I2C_SCL,
134
135 /* ASP0 function */
136 DM355_MCBSP0_BDX,
137 DM355_MCBSP0_X,
138 DM355_MCBSP0_BFSX,
139 DM355_MCBSP0_BDR,
140 DM355_MCBSP0_R,
141 DM355_MCBSP0_BFSR,
142
143 /* SPI0 */
144 DM355_SPI0_SDI,
145 DM355_SPI0_SDENA0,
146 DM355_SPI0_SDENA1,
147
148 /* IRQ muxing */
149 DM355_INT_EDMA_CC,
150 DM355_INT_EDMA_TC0_ERR,
151 DM355_INT_EDMA_TC1_ERR,
152
153 /* EDMA event muxing */
154 DM355_EVT8_ASP1_TX,
155 DM355_EVT9_ASP1_RX,
156 DM355_EVT26_MMC0_RX,
157};
158
Sandeep Paulrajfb8fcb82009-06-11 09:41:05 -0400[diff] [blame]159enum davinci_dm365_index {
160 /* MMC/SD 0 */
161 DM365_MMCSD0,
162
163 /* MMC/SD 1 */
164 DM365_SD1_CLK,
165 DM365_SD1_CMD,
166 DM365_SD1_DATA3,
167 DM365_SD1_DATA2,
168 DM365_SD1_DATA1,
169 DM365_SD1_DATA0,
170
171 /* I2C */
172 DM365_I2C_SDA,
173 DM365_I2C_SCL,
174
175 /* AEMIF */
176 DM365_AEMIF_AR,
177 DM365_AEMIF_A3,
178 DM365_AEMIF_A7,
179 DM365_AEMIF_D15_8,
180 DM365_AEMIF_CE0,
181
182 /* ASP0 function */
183 DM365_MCBSP0_BDX,
184 DM365_MCBSP0_X,
185 DM365_MCBSP0_BFSX,
186 DM365_MCBSP0_BDR,
187 DM365_MCBSP0_R,
188 DM365_MCBSP0_BFSR,
189
190 /* SPI0 */
191 DM365_SPI0_SCLK,
192 DM365_SPI0_SDI,
193 DM365_SPI0_SDO,
194 DM365_SPI0_SDENA0,
195 DM365_SPI0_SDENA1,
196
197 /* UART */
198 DM365_UART0_RXD,
199 DM365_UART0_TXD,
200 DM365_UART1_RXD,
201 DM365_UART1_TXD,
202 DM365_UART1_RTS,
203 DM365_UART1_CTS,
204
205 /* EMAC */
206 DM365_EMAC_TX_EN,
207 DM365_EMAC_TX_CLK,
208 DM365_EMAC_COL,
209 DM365_EMAC_TXD3,
210 DM365_EMAC_TXD2,
211 DM365_EMAC_TXD1,
212 DM365_EMAC_TXD0,
213 DM365_EMAC_RXD3,
214 DM365_EMAC_RXD2,
215 DM365_EMAC_RXD1,
216 DM365_EMAC_RXD0,
217 DM365_EMAC_RX_CLK,
218 DM365_EMAC_RX_DV,
219 DM365_EMAC_RX_ER,
220 DM365_EMAC_CRS,
221 DM365_EMAC_MDIO,
222 DM365_EMAC_MDCLK,
223
Sandeep Paulraj9f513152009-06-20 12:11:09 -0400[diff] [blame]224 /* Keypad */
225 DM365_KEYPAD,
226
Sandeep Paulrajfb8fcb82009-06-11 09:41:05 -0400[diff] [blame]227 /* IRQ muxing */
228 DM365_INT_EDMA_CC,
229 DM365_INT_EDMA_TC0_ERR,
230 DM365_INT_EDMA_TC1_ERR,
Sandeep Paulraj9f513152009-06-20 12:11:09 -0400[diff] [blame]231 DM365_INT_EDMA_TC2_ERR,
232 DM365_INT_EDMA_TC3_ERR,
Sandeep Paulrajfb8fcb82009-06-11 09:41:05 -0400[diff] [blame]233 DM365_INT_PRTCSS,
234 DM365_INT_EMAC_RXTHRESH,
235 DM365_INT_EMAC_RXPULSE,
236 DM365_INT_EMAC_TXPULSE,
237 DM365_INT_EMAC_MISCPULSE,
238
239 /* EDMA event muxing */
240 DM365_EVT2_ASP_TX,
241 DM365_EVT3_ASP_RX,
242 DM365_EVT26_MMC0_RX,
243};
244
Mark A. Greer55c79a42009-06-03 18:36:54 -0700[diff] [blame^]245enum da830_index {
246 DA830_GPIO7_14,
247 DA830_RTCK,
248 DA830_GPIO7_15,
249 DA830_EMU_0,
250 DA830_EMB_SDCKE,
251 DA830_EMB_CLK_GLUE,
252 DA830_EMB_CLK,
253 DA830_NEMB_CS_0,
254 DA830_NEMB_CAS,
255 DA830_NEMB_RAS,
256 DA830_NEMB_WE,
257 DA830_EMB_BA_1,
258 DA830_EMB_BA_0,
259 DA830_EMB_A_0,
260 DA830_EMB_A_1,
261 DA830_EMB_A_2,
262 DA830_EMB_A_3,
263 DA830_EMB_A_4,
264 DA830_EMB_A_5,
265 DA830_GPIO7_0,
266 DA830_GPIO7_1,
267 DA830_GPIO7_2,
268 DA830_GPIO7_3,
269 DA830_GPIO7_4,
270 DA830_GPIO7_5,
271 DA830_GPIO7_6,
272 DA830_GPIO7_7,
273 DA830_EMB_A_6,
274 DA830_EMB_A_7,
275 DA830_EMB_A_8,
276 DA830_EMB_A_9,
277 DA830_EMB_A_10,
278 DA830_EMB_A_11,
279 DA830_EMB_A_12,
280 DA830_EMB_D_31,
281 DA830_GPIO7_8,
282 DA830_GPIO7_9,
283 DA830_GPIO7_10,
284 DA830_GPIO7_11,
285 DA830_GPIO7_12,
286 DA830_GPIO7_13,
287 DA830_GPIO3_13,
288 DA830_EMB_D_30,
289 DA830_EMB_D_29,
290 DA830_EMB_D_28,
291 DA830_EMB_D_27,
292 DA830_EMB_D_26,
293 DA830_EMB_D_25,
294 DA830_EMB_D_24,
295 DA830_EMB_D_23,
296 DA830_EMB_D_22,
297 DA830_EMB_D_21,
298 DA830_EMB_D_20,
299 DA830_EMB_D_19,
300 DA830_EMB_D_18,
301 DA830_EMB_D_17,
302 DA830_EMB_D_16,
303 DA830_NEMB_WE_DQM_3,
304 DA830_NEMB_WE_DQM_2,
305 DA830_EMB_D_0,
306 DA830_EMB_D_1,
307 DA830_EMB_D_2,
308 DA830_EMB_D_3,
309 DA830_EMB_D_4,
310 DA830_EMB_D_5,
311 DA830_EMB_D_6,
312 DA830_GPIO6_0,
313 DA830_GPIO6_1,
314 DA830_GPIO6_2,
315 DA830_GPIO6_3,
316 DA830_GPIO6_4,
317 DA830_GPIO6_5,
318 DA830_GPIO6_6,
319 DA830_EMB_D_7,
320 DA830_EMB_D_8,
321 DA830_EMB_D_9,
322 DA830_EMB_D_10,
323 DA830_EMB_D_11,
324 DA830_EMB_D_12,
325 DA830_EMB_D_13,
326 DA830_EMB_D_14,
327 DA830_GPIO6_7,
328 DA830_GPIO6_8,
329 DA830_GPIO6_9,
330 DA830_GPIO6_10,
331 DA830_GPIO6_11,
332 DA830_GPIO6_12,
333 DA830_GPIO6_13,
334 DA830_GPIO6_14,
335 DA830_EMB_D_15,
336 DA830_NEMB_WE_DQM_1,
337 DA830_NEMB_WE_DQM_0,
338 DA830_SPI0_SOMI_0,
339 DA830_SPI0_SIMO_0,
340 DA830_SPI0_CLK,
341 DA830_NSPI0_ENA,
342 DA830_NSPI0_SCS_0,
343 DA830_EQEP0I,
344 DA830_EQEP0S,
345 DA830_EQEP1I,
346 DA830_NUART0_CTS,
347 DA830_NUART0_RTS,
348 DA830_EQEP0A,
349 DA830_EQEP0B,
350 DA830_GPIO6_15,
351 DA830_GPIO5_14,
352 DA830_GPIO5_15,
353 DA830_GPIO5_0,
354 DA830_GPIO5_1,
355 DA830_GPIO5_2,
356 DA830_GPIO5_3,
357 DA830_GPIO5_4,
358 DA830_SPI1_SOMI_0,
359 DA830_SPI1_SIMO_0,
360 DA830_SPI1_CLK,
361 DA830_UART0_RXD,
362 DA830_UART0_TXD,
363 DA830_AXR1_10,
364 DA830_AXR1_11,
365 DA830_NSPI1_ENA,
366 DA830_I2C1_SCL,
367 DA830_I2C1_SDA,
368 DA830_EQEP1S,
369 DA830_I2C0_SDA,
370 DA830_I2C0_SCL,
371 DA830_UART2_RXD,
372 DA830_TM64P0_IN12,
373 DA830_TM64P0_OUT12,
374 DA830_GPIO5_5,
375 DA830_GPIO5_6,
376 DA830_GPIO5_7,
377 DA830_GPIO5_8,
378 DA830_GPIO5_9,
379 DA830_GPIO5_10,
380 DA830_GPIO5_11,
381 DA830_GPIO5_12,
382 DA830_NSPI1_SCS_0,
383 DA830_USB0_DRVVBUS,
384 DA830_AHCLKX0,
385 DA830_ACLKX0,
386 DA830_AFSX0,
387 DA830_AHCLKR0,
388 DA830_ACLKR0,
389 DA830_AFSR0,
390 DA830_UART2_TXD,
391 DA830_AHCLKX2,
392 DA830_ECAP0_APWM0,
393 DA830_RMII_MHZ_50_CLK,
394 DA830_ECAP1_APWM1,
395 DA830_USB_REFCLKIN,
396 DA830_GPIO5_13,
397 DA830_GPIO4_15,
398 DA830_GPIO2_11,
399 DA830_GPIO2_12,
400 DA830_GPIO2_13,
401 DA830_GPIO2_14,
402 DA830_GPIO2_15,
403 DA830_GPIO3_12,
404 DA830_AMUTE0,
405 DA830_AXR0_0,
406 DA830_AXR0_1,
407 DA830_AXR0_2,
408 DA830_AXR0_3,
409 DA830_AXR0_4,
410 DA830_AXR0_5,
411 DA830_AXR0_6,
412 DA830_RMII_TXD_0,
413 DA830_RMII_TXD_1,
414 DA830_RMII_TXEN,
415 DA830_RMII_CRS_DV,
416 DA830_RMII_RXD_0,
417 DA830_RMII_RXD_1,
418 DA830_RMII_RXER,
419 DA830_AFSR2,
420 DA830_ACLKX2,
421 DA830_AXR2_3,
422 DA830_AXR2_2,
423 DA830_AXR2_1,
424 DA830_AFSX2,
425 DA830_ACLKR2,
426 DA830_NRESETOUT,
427 DA830_GPIO3_0,
428 DA830_GPIO3_1,
429 DA830_GPIO3_2,
430 DA830_GPIO3_3,
431 DA830_GPIO3_4,
432 DA830_GPIO3_5,
433 DA830_GPIO3_6,
434 DA830_AXR0_7,
435 DA830_AXR0_8,
436 DA830_UART1_RXD,
437 DA830_UART1_TXD,
438 DA830_AXR0_11,
439 DA830_AHCLKX1,
440 DA830_ACLKX1,
441 DA830_AFSX1,
442 DA830_MDIO_CLK,
443 DA830_MDIO_D,
444 DA830_AXR0_9,
445 DA830_AXR0_10,
446 DA830_EPWM0B,
447 DA830_EPWM0A,
448 DA830_EPWMSYNCI,
449 DA830_AXR2_0,
450 DA830_EPWMSYNC0,
451 DA830_GPIO3_7,
452 DA830_GPIO3_8,
453 DA830_GPIO3_9,
454 DA830_GPIO3_10,
455 DA830_GPIO3_11,
456 DA830_GPIO3_14,
457 DA830_GPIO3_15,
458 DA830_GPIO4_10,
459 DA830_AHCLKR1,
460 DA830_ACLKR1,
461 DA830_AFSR1,
462 DA830_AMUTE1,
463 DA830_AXR1_0,
464 DA830_AXR1_1,
465 DA830_AXR1_2,
466 DA830_AXR1_3,
467 DA830_ECAP2_APWM2,
468 DA830_EHRPWMGLUETZ,
469 DA830_EQEP1A,
470 DA830_GPIO4_11,
471 DA830_GPIO4_12,
472 DA830_GPIO4_13,
473 DA830_GPIO4_14,
474 DA830_GPIO4_0,
475 DA830_GPIO4_1,
476 DA830_GPIO4_2,
477 DA830_GPIO4_3,
478 DA830_AXR1_4,
479 DA830_AXR1_5,
480 DA830_AXR1_6,
481 DA830_AXR1_7,
482 DA830_AXR1_8,
483 DA830_AXR1_9,
484 DA830_EMA_D_0,
485 DA830_EMA_D_1,
486 DA830_EQEP1B,
487 DA830_EPWM2B,
488 DA830_EPWM2A,
489 DA830_EPWM1B,
490 DA830_EPWM1A,
491 DA830_MMCSD_DAT_0,
492 DA830_MMCSD_DAT_1,
493 DA830_UHPI_HD_0,
494 DA830_UHPI_HD_1,
495 DA830_GPIO4_4,
496 DA830_GPIO4_5,
497 DA830_GPIO4_6,
498 DA830_GPIO4_7,
499 DA830_GPIO4_8,
500 DA830_GPIO4_9,
501 DA830_GPIO0_0,
502 DA830_GPIO0_1,
503 DA830_EMA_D_2,
504 DA830_EMA_D_3,
505 DA830_EMA_D_4,
506 DA830_EMA_D_5,
507 DA830_EMA_D_6,
508 DA830_EMA_D_7,
509 DA830_EMA_D_8,
510 DA830_EMA_D_9,
511 DA830_MMCSD_DAT_2,
512 DA830_MMCSD_DAT_3,
513 DA830_MMCSD_DAT_4,
514 DA830_MMCSD_DAT_5,
515 DA830_MMCSD_DAT_6,
516 DA830_MMCSD_DAT_7,
517 DA830_UHPI_HD_8,
518 DA830_UHPI_HD_9,
519 DA830_UHPI_HD_2,
520 DA830_UHPI_HD_3,
521 DA830_UHPI_HD_4,
522 DA830_UHPI_HD_5,
523 DA830_UHPI_HD_6,
524 DA830_UHPI_HD_7,
525 DA830_LCD_D_8,
526 DA830_LCD_D_9,
527 DA830_GPIO0_2,
528 DA830_GPIO0_3,
529 DA830_GPIO0_4,
530 DA830_GPIO0_5,
531 DA830_GPIO0_6,
532 DA830_GPIO0_7,
533 DA830_GPIO0_8,
534 DA830_GPIO0_9,
535 DA830_EMA_D_10,
536 DA830_EMA_D_11,
537 DA830_EMA_D_12,
538 DA830_EMA_D_13,
539 DA830_EMA_D_14,
540 DA830_EMA_D_15,
541 DA830_EMA_A_0,
542 DA830_EMA_A_1,
543 DA830_UHPI_HD_10,
544 DA830_UHPI_HD_11,
545 DA830_UHPI_HD_12,
546 DA830_UHPI_HD_13,
547 DA830_UHPI_HD_14,
548 DA830_UHPI_HD_15,
549 DA830_LCD_D_7,
550 DA830_MMCSD_CLK,
551 DA830_LCD_D_10,
552 DA830_LCD_D_11,
553 DA830_LCD_D_12,
554 DA830_LCD_D_13,
555 DA830_LCD_D_14,
556 DA830_LCD_D_15,
557 DA830_UHPI_HCNTL0,
558 DA830_GPIO0_10,
559 DA830_GPIO0_11,
560 DA830_GPIO0_12,
561 DA830_GPIO0_13,
562 DA830_GPIO0_14,
563 DA830_GPIO0_15,
564 DA830_GPIO1_0,
565 DA830_GPIO1_1,
566 DA830_EMA_A_2,
567 DA830_EMA_A_3,
568 DA830_EMA_A_4,
569 DA830_EMA_A_5,
570 DA830_EMA_A_6,
571 DA830_EMA_A_7,
572 DA830_EMA_A_8,
573 DA830_EMA_A_9,
574 DA830_MMCSD_CMD,
575 DA830_LCD_D_6,
576 DA830_LCD_D_3,
577 DA830_LCD_D_2,
578 DA830_LCD_D_1,
579 DA830_LCD_D_0,
580 DA830_LCD_PCLK,
581 DA830_LCD_HSYNC,
582 DA830_UHPI_HCNTL1,
583 DA830_GPIO1_2,
584 DA830_GPIO1_3,
585 DA830_GPIO1_4,
586 DA830_GPIO1_5,
587 DA830_GPIO1_6,
588 DA830_GPIO1_7,
589 DA830_GPIO1_8,
590 DA830_GPIO1_9,
591 DA830_EMA_A_10,
592 DA830_EMA_A_11,
593 DA830_EMA_A_12,
594 DA830_EMA_BA_1,
595 DA830_EMA_BA_0,
596 DA830_EMA_CLK,
597 DA830_EMA_SDCKE,
598 DA830_NEMA_CAS,
599 DA830_LCD_VSYNC,
600 DA830_NLCD_AC_ENB_CS,
601 DA830_LCD_MCLK,
602 DA830_LCD_D_5,
603 DA830_LCD_D_4,
604 DA830_OBSCLK,
605 DA830_NEMA_CS_4,
606 DA830_UHPI_HHWIL,
607 DA830_AHCLKR2,
608 DA830_GPIO1_10,
609 DA830_GPIO1_11,
610 DA830_GPIO1_12,
611 DA830_GPIO1_13,
612 DA830_GPIO1_14,
613 DA830_GPIO1_15,
614 DA830_GPIO2_0,
615 DA830_GPIO2_1,
616 DA830_NEMA_RAS,
617 DA830_NEMA_WE,
618 DA830_NEMA_CS_0,
619 DA830_NEMA_CS_2,
620 DA830_NEMA_CS_3,
621 DA830_NEMA_OE,
622 DA830_NEMA_WE_DQM_1,
623 DA830_NEMA_WE_DQM_0,
624 DA830_NEMA_CS_5,
625 DA830_UHPI_HRNW,
626 DA830_NUHPI_HAS,
627 DA830_NUHPI_HCS,
628 DA830_NUHPI_HDS1,
629 DA830_NUHPI_HDS2,
630 DA830_NUHPI_HINT,
631 DA830_AXR0_12,
632 DA830_AMUTE2,
633 DA830_AXR0_13,
634 DA830_AXR0_14,
635 DA830_AXR0_15,
636 DA830_GPIO2_2,
637 DA830_GPIO2_3,
638 DA830_GPIO2_4,
639 DA830_GPIO2_5,
640 DA830_GPIO2_6,
641 DA830_GPIO2_7,
642 DA830_GPIO2_8,
643 DA830_GPIO2_9,
644 DA830_EMA_WAIT_0,
645 DA830_NUHPI_HRDY,
646 DA830_GPIO2_10,
647};
648
Kevin Hilman5526b3f2009-04-14 09:50:37 -0500[diff] [blame]649#ifdef CONFIG_DAVINCI_MUX
650/* setup pin muxing */
Kevin Hilman5526b3f2009-04-14 09:50:37 -0500[diff] [blame]651extern int davinci_cfg_reg(unsigned long reg_cfg);
652#else
653/* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */
Kevin Hilman5526b3f2009-04-14 09:50:37 -0500[diff] [blame]654static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; }
655#endif
656
657#endif /* __INC_MACH_MUX_H */