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Arnaud Ebalard70e12332013-12-19 23:27:28 +01001/*
2 * rtc-isl12057 - Driver for Intersil ISL12057 I2C Real Time Clock
3 *
4 * Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
5 *
6 * This work is largely based on Intersil ISL1208 driver developed by
7 * Hebert Valerio Riedel <hvr@gnu.org>.
8 *
9 * Detailed datasheet on which this development is based is available here:
10 *
11 * http://natisbad.org/NAS2/refs/ISL12057.pdf
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 */
23
24#include <linux/module.h>
25#include <linux/mutex.h>
26#include <linux/rtc.h>
27#include <linux/i2c.h>
28#include <linux/bcd.h>
Arnaud Ebalard70e12332013-12-19 23:27:28 +010029#include <linux/of.h>
30#include <linux/of_device.h>
31#include <linux/regmap.h>
32
33#define DRV_NAME "rtc-isl12057"
34
35/* RTC section */
36#define ISL12057_REG_RTC_SC 0x00 /* Seconds */
37#define ISL12057_REG_RTC_MN 0x01 /* Minutes */
38#define ISL12057_REG_RTC_HR 0x02 /* Hours */
39#define ISL12057_REG_RTC_HR_PM BIT(5) /* AM/PM bit in 12h format */
40#define ISL12057_REG_RTC_HR_MIL BIT(6) /* 24h/12h format */
41#define ISL12057_REG_RTC_DW 0x03 /* Day of the Week */
42#define ISL12057_REG_RTC_DT 0x04 /* Date */
43#define ISL12057_REG_RTC_MO 0x05 /* Month */
44#define ISL12057_REG_RTC_YR 0x06 /* Year */
45#define ISL12057_RTC_SEC_LEN 7
46
47/* Alarm 1 section */
48#define ISL12057_REG_A1_SC 0x07 /* Alarm 1 Seconds */
49#define ISL12057_REG_A1_MN 0x08 /* Alarm 1 Minutes */
50#define ISL12057_REG_A1_HR 0x09 /* Alarm 1 Hours */
51#define ISL12057_REG_A1_HR_PM BIT(5) /* AM/PM bit in 12h format */
52#define ISL12057_REG_A1_HR_MIL BIT(6) /* 24h/12h format */
53#define ISL12057_REG_A1_DWDT 0x0A /* Alarm 1 Date / Day of the week */
54#define ISL12057_REG_A1_DWDT_B BIT(6) /* DW / DT selection bit */
55#define ISL12057_A1_SEC_LEN 4
56
57/* Alarm 2 section */
58#define ISL12057_REG_A2_MN 0x0B /* Alarm 2 Minutes */
59#define ISL12057_REG_A2_HR 0x0C /* Alarm 2 Hours */
60#define ISL12057_REG_A2_DWDT 0x0D /* Alarm 2 Date / Day of the week */
61#define ISL12057_A2_SEC_LEN 3
62
63/* Control/Status registers */
64#define ISL12057_REG_INT 0x0E
65#define ISL12057_REG_INT_A1IE BIT(0) /* Alarm 1 interrupt enable bit */
66#define ISL12057_REG_INT_A2IE BIT(1) /* Alarm 2 interrupt enable bit */
67#define ISL12057_REG_INT_INTCN BIT(2) /* Interrupt control enable bit */
68#define ISL12057_REG_INT_RS1 BIT(3) /* Freq out control bit 1 */
69#define ISL12057_REG_INT_RS2 BIT(4) /* Freq out control bit 2 */
70#define ISL12057_REG_INT_EOSC BIT(7) /* Oscillator enable bit */
71
72#define ISL12057_REG_SR 0x0F
73#define ISL12057_REG_SR_A1F BIT(0) /* Alarm 1 interrupt bit */
74#define ISL12057_REG_SR_A2F BIT(1) /* Alarm 2 interrupt bit */
75#define ISL12057_REG_SR_OSF BIT(7) /* Oscillator failure bit */
76
77/* Register memory map length */
78#define ISL12057_MEM_MAP_LEN 0x10
79
80struct isl12057_rtc_data {
81 struct regmap *regmap;
82 struct mutex lock;
83};
84
85static void isl12057_rtc_regs_to_tm(struct rtc_time *tm, u8 *regs)
86{
87 tm->tm_sec = bcd2bin(regs[ISL12057_REG_RTC_SC]);
88 tm->tm_min = bcd2bin(regs[ISL12057_REG_RTC_MN]);
89
90 if (regs[ISL12057_REG_RTC_HR] & ISL12057_REG_RTC_HR_MIL) { /* AM/PM */
Arnaud Ebalard5945b282014-12-10 15:54:02 -080091 tm->tm_hour = bcd2bin(regs[ISL12057_REG_RTC_HR] & 0x1f);
Arnaud Ebalard70e12332013-12-19 23:27:28 +010092 if (regs[ISL12057_REG_RTC_HR] & ISL12057_REG_RTC_HR_PM)
93 tm->tm_hour += 12;
94 } else { /* 24 hour mode */
95 tm->tm_hour = bcd2bin(regs[ISL12057_REG_RTC_HR] & 0x3f);
96 }
97
98 tm->tm_mday = bcd2bin(regs[ISL12057_REG_RTC_DT]);
99 tm->tm_wday = bcd2bin(regs[ISL12057_REG_RTC_DW]) - 1; /* starts at 1 */
Arnaud Ebalard5945b282014-12-10 15:54:02 -0800100 tm->tm_mon = bcd2bin(regs[ISL12057_REG_RTC_MO] & 0x1f) - 1; /* ditto */
Arnaud Ebalard70e12332013-12-19 23:27:28 +0100101 tm->tm_year = bcd2bin(regs[ISL12057_REG_RTC_YR]) + 100;
102}
103
104static int isl12057_rtc_tm_to_regs(u8 *regs, struct rtc_time *tm)
105{
106 /*
107 * The clock has an 8 bit wide bcd-coded register for the year.
108 * tm_year is an offset from 1900 and we are interested in the
109 * 2000-2099 range, so any value less than 100 is invalid.
110 */
111 if (tm->tm_year < 100)
112 return -EINVAL;
113
114 regs[ISL12057_REG_RTC_SC] = bin2bcd(tm->tm_sec);
115 regs[ISL12057_REG_RTC_MN] = bin2bcd(tm->tm_min);
116 regs[ISL12057_REG_RTC_HR] = bin2bcd(tm->tm_hour); /* 24-hour format */
117 regs[ISL12057_REG_RTC_DT] = bin2bcd(tm->tm_mday);
118 regs[ISL12057_REG_RTC_MO] = bin2bcd(tm->tm_mon + 1);
119 regs[ISL12057_REG_RTC_YR] = bin2bcd(tm->tm_year - 100);
120 regs[ISL12057_REG_RTC_DW] = bin2bcd(tm->tm_wday + 1);
121
122 return 0;
123}
124
125/*
126 * Try and match register bits w/ fixed null values to see whether we
127 * are dealing with an ISL12057. Note: this function is called early
128 * during init and hence does need mutex protection.
129 */
130static int isl12057_i2c_validate_chip(struct regmap *regmap)
131{
132 u8 regs[ISL12057_MEM_MAP_LEN];
133 static const u8 mask[ISL12057_MEM_MAP_LEN] = { 0x80, 0x80, 0x80, 0xf8,
134 0xc0, 0x60, 0x00, 0x00,
135 0x00, 0x00, 0x00, 0x00,
136 0x00, 0x00, 0x60, 0x7c };
137 int ret, i;
138
139 ret = regmap_bulk_read(regmap, 0, regs, ISL12057_MEM_MAP_LEN);
140 if (ret)
141 return ret;
142
143 for (i = 0; i < ISL12057_MEM_MAP_LEN; ++i) {
144 if (regs[i] & mask[i]) /* check if bits are cleared */
145 return -ENODEV;
146 }
147
148 return 0;
149}
150
151static int isl12057_rtc_read_time(struct device *dev, struct rtc_time *tm)
152{
153 struct isl12057_rtc_data *data = dev_get_drvdata(dev);
154 u8 regs[ISL12057_RTC_SEC_LEN];
155 int ret;
156
157 mutex_lock(&data->lock);
158 ret = regmap_bulk_read(data->regmap, ISL12057_REG_RTC_SC, regs,
159 ISL12057_RTC_SEC_LEN);
160 mutex_unlock(&data->lock);
161
162 if (ret) {
163 dev_err(dev, "%s: RTC read failed\n", __func__);
164 return ret;
165 }
166
167 isl12057_rtc_regs_to_tm(tm, regs);
168
169 return rtc_valid_tm(tm);
170}
171
172static int isl12057_rtc_set_time(struct device *dev, struct rtc_time *tm)
173{
174 struct isl12057_rtc_data *data = dev_get_drvdata(dev);
175 u8 regs[ISL12057_RTC_SEC_LEN];
176 int ret;
177
178 ret = isl12057_rtc_tm_to_regs(regs, tm);
179 if (ret)
180 return ret;
181
182 mutex_lock(&data->lock);
183 ret = regmap_bulk_write(data->regmap, ISL12057_REG_RTC_SC, regs,
184 ISL12057_RTC_SEC_LEN);
185 mutex_unlock(&data->lock);
186
187 if (ret)
188 dev_err(dev, "%s: RTC write failed\n", __func__);
189
190 return ret;
191}
192
193/*
194 * Check current RTC status and enable/disable what needs to be. Return 0 if
195 * everything went ok and a negative value upon error. Note: this function
196 * is called early during init and hence does need mutex protection.
197 */
198static int isl12057_check_rtc_status(struct device *dev, struct regmap *regmap)
199{
200 int ret;
201
202 /* Enable oscillator if not already running */
203 ret = regmap_update_bits(regmap, ISL12057_REG_INT,
204 ISL12057_REG_INT_EOSC, 0);
205 if (ret < 0) {
206 dev_err(dev, "Unable to enable oscillator\n");
207 return ret;
208 }
209
210 /* Clear oscillator failure bit if needed */
211 ret = regmap_update_bits(regmap, ISL12057_REG_SR,
212 ISL12057_REG_SR_OSF, 0);
213 if (ret < 0) {
214 dev_err(dev, "Unable to clear oscillator failure bit\n");
215 return ret;
216 }
217
218 /* Clear alarm bit if needed */
219 ret = regmap_update_bits(regmap, ISL12057_REG_SR,
220 ISL12057_REG_SR_A1F, 0);
221 if (ret < 0) {
222 dev_err(dev, "Unable to clear alarm bit\n");
223 return ret;
224 }
225
226 return 0;
227}
228
229static const struct rtc_class_ops rtc_ops = {
230 .read_time = isl12057_rtc_read_time,
231 .set_time = isl12057_rtc_set_time,
232};
233
234static struct regmap_config isl12057_rtc_regmap_config = {
235 .reg_bits = 8,
236 .val_bits = 8,
237};
238
239static int isl12057_probe(struct i2c_client *client,
240 const struct i2c_device_id *id)
241{
242 struct device *dev = &client->dev;
243 struct isl12057_rtc_data *data;
244 struct rtc_device *rtc;
245 struct regmap *regmap;
246 int ret;
247
248 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
249 I2C_FUNC_SMBUS_BYTE_DATA |
250 I2C_FUNC_SMBUS_I2C_BLOCK))
251 return -ENODEV;
252
253 regmap = devm_regmap_init_i2c(client, &isl12057_rtc_regmap_config);
254 if (IS_ERR(regmap)) {
255 ret = PTR_ERR(regmap);
256 dev_err(dev, "regmap allocation failed: %d\n", ret);
257 return ret;
258 }
259
260 ret = isl12057_i2c_validate_chip(regmap);
261 if (ret)
262 return ret;
263
264 ret = isl12057_check_rtc_status(dev, regmap);
265 if (ret)
266 return ret;
267
268 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
269 if (!data)
270 return -ENOMEM;
271
272 mutex_init(&data->lock);
273 data->regmap = regmap;
274 dev_set_drvdata(dev, data);
275
276 rtc = devm_rtc_device_register(dev, DRV_NAME, &rtc_ops, THIS_MODULE);
Fengguang Wu00b281842014-02-18 18:00:21 +0000277 return PTR_ERR_OR_ZERO(rtc);
Arnaud Ebalard70e12332013-12-19 23:27:28 +0100278}
279
280#ifdef CONFIG_OF
Jingoo Han8c5bfac2014-06-06 14:35:56 -0700281static const struct of_device_id isl12057_dt_match[] = {
Arnaud Ebalard70e12332013-12-19 23:27:28 +0100282 { .compatible = "isl,isl12057" },
283 { },
284};
285#endif
286
287static const struct i2c_device_id isl12057_id[] = {
288 { "isl12057", 0 },
289 { }
290};
291MODULE_DEVICE_TABLE(i2c, isl12057_id);
292
293static struct i2c_driver isl12057_driver = {
294 .driver = {
295 .name = DRV_NAME,
296 .owner = THIS_MODULE,
297 .of_match_table = of_match_ptr(isl12057_dt_match),
298 },
299 .probe = isl12057_probe,
300 .id_table = isl12057_id,
301};
302module_i2c_driver(isl12057_driver);
303
304MODULE_AUTHOR("Arnaud EBALARD <arno@natisbad.org>");
305MODULE_DESCRIPTION("Intersil ISL12057 RTC driver");
306MODULE_LICENSE("GPL");