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Rajendra Nayakf327e072010-12-21 20:01:18 -07001/*
2 * OMAP4 powerdomain control
3 *
4 * Copyright (C) 2009-2010 Texas Instruments, Inc.
5 * Copyright (C) 2007-2009 Nokia Corporation
6 *
7 * Derived from mach-omap2/powerdomain.c written by Paul Walmsley
8 * Rajendra Nayak <rnayak@ti.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/io.h>
16#include <linux/errno.h>
17#include <linux/delay.h>
Paul Walmsley6e014782010-12-21 20:01:20 -070018
Rajendra Nayakf327e072010-12-21 20:01:18 -070019#include <plat/powerdomain.h>
20#include <plat/prcm.h>
Paul Walmsley59fb6592010-12-21 15:30:55 -070021#include "prm2xxx_3xxx.h"
Paul Walmsleyd198b512010-12-21 15:30:54 -070022#include "prm44xx.h"
Rajendra Nayakf327e072010-12-21 20:01:18 -070023#include "prm-regbits-44xx.h"
24#include "powerdomains.h"
25
26static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
27{
28 prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
29 (pwrst << OMAP_POWERSTATE_SHIFT),
30 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
31 return 0;
32}
33
34static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
35{
36 return prm_read_mod_bits_shift(pwrdm->prcm_offs,
37 OMAP4_PM_PWSTCTRL, OMAP_POWERSTATE_MASK);
38}
39
40static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm)
41{
42 return prm_read_mod_bits_shift(pwrdm->prcm_offs,
43 OMAP4_PM_PWSTST, OMAP_POWERSTATEST_MASK);
44}
45
46static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
47{
48 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
49 OMAP4430_LASTPOWERSTATEENTERED_MASK);
50}
51
Rajendra Nayak9b7fc902010-12-21 20:01:19 -070052static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
53{
54 prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK,
55 (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT),
56 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
57 return 0;
58}
59
Santosh Shilimkar4b4f62c2010-12-21 20:01:19 -070060static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
61{
62 prm_rmw_mod_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK,
63 OMAP4430_LASTPOWERSTATEENTERED_MASK,
64 pwrdm->prcm_offs, OMAP4_PM_PWSTST);
65 return 0;
66}
67
Rajendra Nayak12627572010-12-21 20:01:18 -070068static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
69{
70 u32 v;
71
72 v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK);
73 prm_rmw_mod_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v,
74 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
75
76 return 0;
77}
78
Rajendra Nayak9b7fc902010-12-21 20:01:19 -070079static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
80 u8 pwrst)
81{
82 u32 m;
83
84 m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
85
86 prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
87 OMAP4_PM_PWSTCTRL);
88
89 return 0;
90}
91
92static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
93 u8 pwrst)
94{
95 u32 m;
96
97 m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
98
99 prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
100 OMAP4_PM_PWSTCTRL);
101
102 return 0;
103}
104
Rajendra Nayak12627572010-12-21 20:01:18 -0700105static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
106{
107 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
108 OMAP4430_LOGICSTATEST_MASK);
109}
110
111static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
112{
113 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL,
114 OMAP4430_LOGICRETSTATE_MASK);
115}
116
Rajendra Nayak9b7fc902010-12-21 20:01:19 -0700117static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
118{
119 u32 m;
120
121 m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
122
123 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, m);
124}
125
126static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
127{
128 u32 m;
129
130 m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
131
132 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL, m);
133}
134
135static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
136{
137 u32 c = 0;
138
139 /*
140 * REVISIT: pwrdm_wait_transition() may be better implemented
141 * via a callback and a periodic timer check -- how long do we expect
142 * powerdomain transitions to take?
143 */
144
145 /* XXX Is this udelay() value meaningful? */
146 while ((prm_read_mod_reg(pwrdm->prcm_offs, OMAP4_PM_PWSTST) &
147 OMAP_INTRANSITION_MASK) &&
148 (c++ < PWRDM_TRANSITION_BAILOUT))
149 udelay(1);
150
151 if (c > PWRDM_TRANSITION_BAILOUT) {
152 printk(KERN_ERR "powerdomain: waited too long for "
153 "powerdomain %s to complete transition\n", pwrdm->name);
154 return -EAGAIN;
155 }
156
157 pr_debug("powerdomain: completed transition in %d loops\n", c);
158
159 return 0;
160}
161
Rajendra Nayakf327e072010-12-21 20:01:18 -0700162struct pwrdm_ops omap4_pwrdm_operations = {
163 .pwrdm_set_next_pwrst = omap4_pwrdm_set_next_pwrst,
164 .pwrdm_read_next_pwrst = omap4_pwrdm_read_next_pwrst,
165 .pwrdm_read_pwrst = omap4_pwrdm_read_pwrst,
166 .pwrdm_read_prev_pwrst = omap4_pwrdm_read_prev_pwrst,
Rajendra Nayak9b7fc902010-12-21 20:01:19 -0700167 .pwrdm_set_lowpwrstchange = omap4_pwrdm_set_lowpwrstchange,
Santosh Shilimkar4b4f62c2010-12-21 20:01:19 -0700168 .pwrdm_clear_all_prev_pwrst = omap4_pwrdm_clear_all_prev_pwrst,
Rajendra Nayak12627572010-12-21 20:01:18 -0700169 .pwrdm_set_logic_retst = omap4_pwrdm_set_logic_retst,
170 .pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst,
171 .pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst,
Rajendra Nayak9b7fc902010-12-21 20:01:19 -0700172 .pwrdm_read_mem_pwrst = omap4_pwrdm_read_mem_pwrst,
173 .pwrdm_read_mem_retst = omap4_pwrdm_read_mem_retst,
174 .pwrdm_set_mem_onst = omap4_pwrdm_set_mem_onst,
175 .pwrdm_set_mem_retst = omap4_pwrdm_set_mem_retst,
176 .pwrdm_wait_transition = omap4_pwrdm_wait_transition,
Rajendra Nayakf327e072010-12-21 20:01:18 -0700177};