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Eric Miao49cbe782009-01-20 14:15:18 +08001/*
2 * linux/arch/arm/mach-mmp/include/mach/addr-map.h
3 *
4 * Common address map definitions
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_ADDR_MAP_H
12#define __ASM_MACH_ADDR_MAP_H
13
14/* APB - Application Subsystem Peripheral Bus
15 *
16 * NOTE: the DMA controller registers are actually on the AXI fabric #1
17 * slave port to AHB/APB bridge, due to its close relationship to those
18 * peripherals on APB, let's count it into the ABP mapping area.
19 */
20#define APB_PHYS_BASE 0xd4000000
Arnd Bergmann97b09da2011-10-01 22:03:45 +020021#define APB_VIRT_BASE IOMEM(0xfe000000)
Eric Miao49cbe782009-01-20 14:15:18 +080022#define APB_PHYS_SIZE 0x00200000
23
24#define AXI_PHYS_BASE 0xd4200000
Arnd Bergmann97b09da2011-10-01 22:03:45 +020025#define AXI_VIRT_BASE IOMEM(0xfe200000)
Eric Miao49cbe782009-01-20 14:15:18 +080026#define AXI_PHYS_SIZE 0x00200000
27
28/* Static Memory Controller - Chip Select 0 and 1 */
29#define SMC_CS0_PHYS_BASE 0x80000000
30#define SMC_CS0_PHYS_SIZE 0x10000000
31#define SMC_CS1_PHYS_BASE 0x90000000
32#define SMC_CS1_PHYS_SIZE 0x10000000
33
Chao Xie5e5661a2012-05-07 11:22:22 +080034#define APMU_VIRT_BASE (AXI_VIRT_BASE + 0x82800)
35#define APMU_REG(x) (APMU_VIRT_BASE + (x))
36
37#define APBC_VIRT_BASE (APB_VIRT_BASE + 0x015000)
38#define APBC_REG(x) (APBC_VIRT_BASE + (x))
39
40#define MPMU_VIRT_BASE (APB_VIRT_BASE + 0x50000)
41#define MPMU_REG(x) (MPMU_VIRT_BASE + (x))
42
43#define CIU_VIRT_BASE (AXI_VIRT_BASE + 0x82c00)
44#define CIU_REG(x) (CIU_VIRT_BASE + (x))
45
Eric Miao49cbe782009-01-20 14:15:18 +080046#endif /* __ASM_MACH_ADDR_MAP_H */