blob: d049fe4b80c48e00d169f3835bb7b70b8022a879 [file] [log] [blame]
Ilia Lin46e28562018-05-30 05:39:28 +03001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
4 */
5
6/*
7 * In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
8 * the CPU frequency subset and voltage value of each OPP varies
9 * based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
10 * defines the voltage and frequency value based on the msm-id in SMEM
11 * and speedbin blown in the efuse combination.
12 * The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the SoC
13 * to provide the OPP framework with required information.
14 * This is used to determine the voltage and frequency value for each OPP of
15 * operating-points-v2 table when it is parsed by the OPP framework.
16 */
17
18#include <linux/cpu.h>
19#include <linux/err.h>
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/nvmem-consumer.h>
24#include <linux/of.h>
25#include <linux/platform_device.h>
26#include <linux/pm_opp.h>
27#include <linux/slab.h>
28#include <linux/soc/qcom/smem.h>
29
30#define MSM_ID_SMEM 137
31
32enum _msm_id {
33 MSM8996V3 = 0xF6ul,
34 APQ8096V3 = 0x123ul,
35 MSM8996SG = 0x131ul,
36 APQ8096SG = 0x138ul,
37};
38
39enum _msm8996_version {
40 MSM8996_V3,
41 MSM8996_SG,
42 NUM_OF_MSM8996_VERSIONS,
43};
44
45static enum _msm8996_version __init qcom_cpufreq_kryo_get_msm_id(void)
46{
47 size_t len;
48 u32 *msm_id;
49 enum _msm8996_version version;
50
51 msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len);
52 if (IS_ERR(msm_id))
53 return NUM_OF_MSM8996_VERSIONS;
54
55 /* The first 4 bytes are format, next to them is the actual msm-id */
56 msm_id++;
57
58 switch ((enum _msm_id)*msm_id) {
59 case MSM8996V3:
60 case APQ8096V3:
61 version = MSM8996_V3;
62 break;
63 case MSM8996SG:
64 case APQ8096SG:
65 version = MSM8996_SG;
66 break;
67 default:
68 version = NUM_OF_MSM8996_VERSIONS;
69 }
70
71 return version;
72}
73
74static int qcom_cpufreq_kryo_probe(struct platform_device *pdev)
75{
76 struct opp_table *opp_tables[NR_CPUS] = {0};
77 struct platform_device *cpufreq_dt_pdev;
78 enum _msm8996_version msm8996_version;
79 struct nvmem_cell *speedbin_nvmem;
80 struct device_node *np;
81 struct device *cpu_dev;
82 unsigned cpu;
83 u8 *speedbin;
84 u32 versions;
85 size_t len;
86 int ret;
87
88 cpu_dev = get_cpu_device(0);
89 if (NULL == cpu_dev)
90 ret = -ENODEV;
91
92 msm8996_version = qcom_cpufreq_kryo_get_msm_id();
93 if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
94 dev_err(cpu_dev, "Not Snapdragon 820/821!");
95 return -ENODEV;
96 }
97
98 np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
99 if (IS_ERR(np))
100 return PTR_ERR(np);
101
102 ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu");
103 if (!ret) {
104 of_node_put(np);
105 return -ENOENT;
106 }
107
108 speedbin_nvmem = of_nvmem_cell_get(np, NULL);
109 of_node_put(np);
110 if (IS_ERR(speedbin_nvmem)) {
111 dev_err(cpu_dev, "Could not get nvmem cell: %ld\n",
112 PTR_ERR(speedbin_nvmem));
113 return PTR_ERR(speedbin_nvmem);
114 }
115
116 speedbin = nvmem_cell_read(speedbin_nvmem, &len);
117 nvmem_cell_put(speedbin_nvmem);
118
119 switch (msm8996_version) {
120 case MSM8996_V3:
121 versions = 1 << (unsigned int)(*speedbin);
122 break;
123 case MSM8996_SG:
124 versions = 1 << ((unsigned int)(*speedbin) + 4);
125 break;
126 default:
127 BUG();
128 break;
129 }
130
131 for_each_possible_cpu(cpu) {
132 cpu_dev = get_cpu_device(cpu);
133 if (NULL == cpu_dev) {
134 ret = -ENODEV;
135 goto free_opp;
136 }
137
138 opp_tables[cpu] = dev_pm_opp_set_supported_hw(cpu_dev,
139 &versions, 1);
140 if (IS_ERR(opp_tables[cpu])) {
141 ret = PTR_ERR(opp_tables[cpu]);
142 dev_err(cpu_dev, "Failed to set supported hardware\n");
143 goto free_opp;
144 }
145 }
146
147 cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
148 NULL, 0);
149 if (!IS_ERR(cpufreq_dt_pdev))
150 return 0;
151
152 ret = PTR_ERR(cpufreq_dt_pdev);
153 dev_err(cpu_dev, "Failed to register platform device\n");
154
155free_opp:
156 for_each_possible_cpu(cpu) {
157 if (IS_ERR_OR_NULL(opp_tables[cpu]))
158 break;
159 dev_pm_opp_put_supported_hw(opp_tables[cpu]);
160 }
161
162 return ret;
163}
164
165static struct platform_driver qcom_cpufreq_kryo_driver = {
166 .probe = qcom_cpufreq_kryo_probe,
167 .driver = {
168 .name = "qcom-cpufreq-kryo",
169 },
170};
171
172static const struct of_device_id qcom_cpufreq_kryo_match_list[] __initconst = {
173 { .compatible = "qcom,apq8096", },
174 { .compatible = "qcom,msm8996", },
175};
176
177/*
178 * Since the driver depends on smem and nvmem drivers, which may
179 * return EPROBE_DEFER, all the real activity is done in the probe,
180 * which may be defered as well. The init here is only registering
181 * the driver and the platform device.
182 */
183static int __init qcom_cpufreq_kryo_init(void)
184{
185 struct device_node *np = of_find_node_by_path("/");
186 const struct of_device_id *match;
187 int ret;
188
189 if (!np)
190 return -ENODEV;
191
192 match = of_match_node(qcom_cpufreq_kryo_match_list, np);
193 of_node_put(np);
194 if (!match)
195 return -ENODEV;
196
197 ret = platform_driver_register(&qcom_cpufreq_kryo_driver);
198 if (unlikely(ret < 0))
199 return ret;
200
201 ret = PTR_ERR_OR_ZERO(platform_device_register_simple(
202 "qcom-cpufreq-kryo", -1, NULL, 0));
203 if (0 == ret)
204 return 0;
205
206 platform_driver_unregister(&qcom_cpufreq_kryo_driver);
207 return ret;
208}
209module_init(qcom_cpufreq_kryo_init);
210
211MODULE_DESCRIPTION("Qualcomm Technologies, Inc. Kryo CPUfreq driver");
212MODULE_LICENSE("GPL v2");