blob: c97ebd681c471196cb4135deafbf8e07efc9d615 [file] [log] [blame]
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001/* QLogic qed NIC Driver
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02002 * Copyright (c) 2015-2017 QLogic Corporation
Yuval Mintz0a7fb112016-10-01 21:59:55 +03003 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
Yuval Mintz0a7fb112016-10-01 21:59:55 +03009 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +020010 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Yuval Mintz0a7fb112016-10-01 21:59:55 +030031 */
32
33#include <linux/types.h>
34#include <asm/byteorder.h>
35#include <linux/dma-mapping.h>
36#include <linux/if_vlan.h>
37#include <linux/kernel.h>
38#include <linux/pci.h>
39#include <linux/slab.h>
40#include <linux/stddef.h>
Yuval Mintz0a7fb112016-10-01 21:59:55 +030041#include <linux/workqueue.h>
42#include <net/ipv6.h>
43#include <linux/bitops.h>
44#include <linux/delay.h>
45#include <linux/errno.h>
46#include <linux/etherdevice.h>
47#include <linux/io.h>
48#include <linux/list.h>
49#include <linux/mutex.h>
50#include <linux/spinlock.h>
51#include <linux/string.h>
52#include <linux/qed/qed_ll2_if.h>
53#include "qed.h"
54#include "qed_cxt.h"
55#include "qed_dev_api.h"
56#include "qed_hsi.h"
57#include "qed_hw.h"
58#include "qed_int.h"
59#include "qed_ll2.h"
60#include "qed_mcp.h"
Yuval Mintz1d6cff42016-12-01 00:21:07 -080061#include "qed_ooo.h"
Yuval Mintz0a7fb112016-10-01 21:59:55 +030062#include "qed_reg_addr.h"
63#include "qed_sp.h"
Kalderon, Michalb71b9af2017-06-21 16:22:45 +030064#include "qed_rdma.h"
Yuval Mintz0a7fb112016-10-01 21:59:55 +030065
66#define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registred)
67#define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registred)
68
69#define QED_LL2_TX_SIZE (256)
70#define QED_LL2_RX_SIZE (4096)
71
72struct qed_cb_ll2_info {
73 int rx_cnt;
74 u32 rx_size;
75 u8 handle;
Yuval Mintz0a7fb112016-10-01 21:59:55 +030076
77 /* Lock protecting LL2 buffer lists in sleepless context */
78 spinlock_t lock;
79 struct list_head list;
80
81 const struct qed_ll2_cb_ops *cbs;
82 void *cb_cookie;
83};
84
85struct qed_ll2_buffer {
86 struct list_head list;
87 void *data;
88 dma_addr_t phys_addr;
89};
90
Michal Kalderon0518c122017-06-09 17:13:22 +030091static void qed_ll2b_complete_tx_packet(void *cxt,
Yuval Mintz0a7fb112016-10-01 21:59:55 +030092 u8 connection_handle,
93 void *cookie,
94 dma_addr_t first_frag_addr,
95 bool b_last_fragment,
96 bool b_last_packet)
97{
Michal Kalderon0518c122017-06-09 17:13:22 +030098 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +030099 struct qed_dev *cdev = p_hwfn->cdev;
100 struct sk_buff *skb = cookie;
101
102 /* All we need to do is release the mapping */
103 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr,
104 skb_headlen(skb), DMA_TO_DEVICE);
105
106 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb)
107 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb,
108 b_last_fragment);
109
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300110 dev_kfree_skb_any(skb);
111}
112
113static int qed_ll2_alloc_buffer(struct qed_dev *cdev,
114 u8 **data, dma_addr_t *phys_addr)
115{
116 *data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC);
117 if (!(*data)) {
118 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n");
119 return -ENOMEM;
120 }
121
122 *phys_addr = dma_map_single(&cdev->pdev->dev,
123 ((*data) + NET_SKB_PAD),
124 cdev->ll2->rx_size, DMA_FROM_DEVICE);
125 if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) {
126 DP_INFO(cdev, "Failed to map LL2 buffer data\n");
127 kfree((*data));
128 return -ENOMEM;
129 }
130
131 return 0;
132}
133
134static int qed_ll2_dealloc_buffer(struct qed_dev *cdev,
135 struct qed_ll2_buffer *buffer)
136{
137 spin_lock_bh(&cdev->ll2->lock);
138
139 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
140 cdev->ll2->rx_size, DMA_FROM_DEVICE);
141 kfree(buffer->data);
142 list_del(&buffer->list);
143
144 cdev->ll2->rx_cnt--;
145 if (!cdev->ll2->rx_cnt)
146 DP_INFO(cdev, "All LL2 entries were removed\n");
147
148 spin_unlock_bh(&cdev->ll2->lock);
149
150 return 0;
151}
152
153static void qed_ll2_kill_buffers(struct qed_dev *cdev)
154{
155 struct qed_ll2_buffer *buffer, *tmp_buffer;
156
157 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list)
158 qed_ll2_dealloc_buffer(cdev, buffer);
159}
160
Michal Kalderon0518c122017-06-09 17:13:22 +0300161void qed_ll2b_complete_rx_packet(void *cxt, struct qed_ll2_comp_rx_data *data)
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300162{
Michal Kalderon0518c122017-06-09 17:13:22 +0300163 struct qed_hwfn *p_hwfn = cxt;
Mintz, Yuval68be9102017-06-09 17:13:19 +0300164 struct qed_ll2_buffer *buffer = data->cookie;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300165 struct qed_dev *cdev = p_hwfn->cdev;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300166 dma_addr_t new_phys_addr;
167 struct sk_buff *skb;
168 bool reuse = false;
169 int rc = -EINVAL;
170 u8 *new_data;
171
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300172 DP_VERBOSE(p_hwfn,
173 (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA),
174 "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n",
Mintz, Yuval68be9102017-06-09 17:13:19 +0300175 (u64)data->rx_buf_addr,
176 data->u.placement_offset,
177 data->length.packet_length,
178 data->parse_flags,
179 data->vlan, data->opaque_data_0, data->opaque_data_1);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300180
181 if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) {
182 print_hex_dump(KERN_INFO, "",
183 DUMP_PREFIX_OFFSET, 16, 1,
Mintz, Yuval68be9102017-06-09 17:13:19 +0300184 buffer->data, data->length.packet_length, false);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300185 }
186
187 /* Determine if data is valid */
Mintz, Yuval68be9102017-06-09 17:13:19 +0300188 if (data->length.packet_length < ETH_HLEN)
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300189 reuse = true;
190
191 /* Allocate a replacement for buffer; Reuse upon failure */
192 if (!reuse)
193 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data,
194 &new_phys_addr);
195
196 /* If need to reuse or there's no replacement buffer, repost this */
197 if (rc)
198 goto out_post;
Mintz, Yuval752ecb22017-03-14 15:26:00 +0200199 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
200 cdev->ll2->rx_size, DMA_FROM_DEVICE);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300201
202 skb = build_skb(buffer->data, 0);
203 if (!skb) {
204 rc = -ENOMEM;
205 goto out_post;
206 }
207
Mintz, Yuval68be9102017-06-09 17:13:19 +0300208 data->u.placement_offset += NET_SKB_PAD;
209 skb_reserve(skb, data->u.placement_offset);
210 skb_put(skb, data->length.packet_length);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300211 skb_checksum_none_assert(skb);
212
213 /* Get parital ethernet information instead of eth_type_trans(),
214 * Since we don't have an associated net_device.
215 */
216 skb_reset_mac_header(skb);
217 skb->protocol = eth_hdr(skb)->h_proto;
218
219 /* Pass SKB onward */
220 if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) {
Mintz, Yuval68be9102017-06-09 17:13:19 +0300221 if (data->vlan)
222 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
223 data->vlan);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300224 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb,
Mintz, Yuval68be9102017-06-09 17:13:19 +0300225 data->opaque_data_0,
226 data->opaque_data_1);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300227 }
228
229 /* Update Buffer information and update FW producer */
230 buffer->data = new_data;
231 buffer->phys_addr = new_phys_addr;
232
233out_post:
234 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), cdev->ll2->handle,
235 buffer->phys_addr, 0, buffer, 1);
236
237 if (rc)
238 qed_ll2_dealloc_buffer(cdev, buffer);
239}
240
241static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
242 u8 connection_handle,
243 bool b_lock,
244 bool b_only_active)
245{
246 struct qed_ll2_info *p_ll2_conn, *p_ret = NULL;
247
248 if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS)
249 return NULL;
250
251 if (!p_hwfn->p_ll2_info)
252 return NULL;
253
254 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
255
256 if (b_only_active) {
257 if (b_lock)
258 mutex_lock(&p_ll2_conn->mutex);
259 if (p_ll2_conn->b_active)
260 p_ret = p_ll2_conn;
261 if (b_lock)
262 mutex_unlock(&p_ll2_conn->mutex);
263 } else {
264 p_ret = p_ll2_conn;
265 }
266
267 return p_ret;
268}
269
270static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
271 u8 connection_handle)
272{
273 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true);
274}
275
276static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn,
277 u8 connection_handle)
278{
279 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true);
280}
281
282static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn
283 *p_hwfn,
284 u8 connection_handle)
285{
286 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false);
287}
288
289static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
290{
291 bool b_last_packet = false, b_last_frag = false;
292 struct qed_ll2_tx_packet *p_pkt = NULL;
293 struct qed_ll2_info *p_ll2_conn;
294 struct qed_ll2_tx_queue *p_tx;
Michal Kalderon6291c602018-05-16 14:44:39 +0300295 unsigned long flags = 0;
Ram Amraniabd49672016-10-01 22:00:01 +0300296 dma_addr_t tx_frag;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300297
298 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
299 if (!p_ll2_conn)
300 return;
301
302 p_tx = &p_ll2_conn->tx_queue;
303
Michal Kalderon6291c602018-05-16 14:44:39 +0300304 spin_lock_irqsave(&p_tx->lock, flags);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300305 while (!list_empty(&p_tx->active_descq)) {
306 p_pkt = list_first_entry(&p_tx->active_descq,
307 struct qed_ll2_tx_packet, list_entry);
308 if (!p_pkt)
309 break;
310
311 list_del(&p_pkt->list_entry);
312 b_last_packet = list_empty(&p_tx->active_descq);
313 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
Michal Kalderon6291c602018-05-16 14:44:39 +0300314 spin_unlock_irqrestore(&p_tx->lock, flags);
Kalderon, Michal526d1d02017-07-02 10:29:23 +0300315 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800316 struct qed_ooo_buffer *p_buffer;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300317
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800318 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
319 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
320 p_buffer);
321 } else {
322 p_tx->cur_completing_packet = *p_pkt;
323 p_tx->cur_completing_bd_idx = 1;
324 b_last_frag =
325 p_tx->cur_completing_bd_idx == p_pkt->bd_used;
326 tx_frag = p_pkt->bds_set[0].tx_frag;
Michal Kalderon0518c122017-06-09 17:13:22 +0300327 p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie,
328 p_ll2_conn->my_id,
329 p_pkt->cookie,
330 tx_frag,
331 b_last_frag,
332 b_last_packet);
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800333 }
Michal Kalderon6291c602018-05-16 14:44:39 +0300334 spin_lock_irqsave(&p_tx->lock, flags);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300335 }
Michal Kalderon6291c602018-05-16 14:44:39 +0300336 spin_unlock_irqrestore(&p_tx->lock, flags);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300337}
338
339static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
340{
341 struct qed_ll2_info *p_ll2_conn = p_cookie;
342 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
343 u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0;
344 struct qed_ll2_tx_packet *p_pkt;
345 bool b_last_frag = false;
346 unsigned long flags;
347 int rc = -EINVAL;
348
349 spin_lock_irqsave(&p_tx->lock, flags);
350 if (p_tx->b_completing_packet) {
351 rc = -EBUSY;
352 goto out;
353 }
354
355 new_idx = le16_to_cpu(*p_tx->p_fw_cons);
356 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
357 while (num_bds) {
358 if (list_empty(&p_tx->active_descq))
359 goto out;
360
361 p_pkt = list_first_entry(&p_tx->active_descq,
362 struct qed_ll2_tx_packet, list_entry);
363 if (!p_pkt)
364 goto out;
365
366 p_tx->b_completing_packet = true;
367 p_tx->cur_completing_packet = *p_pkt;
368 num_bds_in_packet = p_pkt->bd_used;
369 list_del(&p_pkt->list_entry);
370
371 if (num_bds < num_bds_in_packet) {
372 DP_NOTICE(p_hwfn,
373 "Rest of BDs does not cover whole packet\n");
374 goto out;
375 }
376
377 num_bds -= num_bds_in_packet;
378 p_tx->bds_idx += num_bds_in_packet;
379 while (num_bds_in_packet--)
380 qed_chain_consume(&p_tx->txq_chain);
381
382 p_tx->cur_completing_bd_idx = 1;
383 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used;
384 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
385
386 spin_unlock_irqrestore(&p_tx->lock, flags);
Michal Kalderon0518c122017-06-09 17:13:22 +0300387
388 p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie,
389 p_ll2_conn->my_id,
390 p_pkt->cookie,
391 p_pkt->bds_set[0].tx_frag,
392 b_last_frag, !num_bds);
393
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300394 spin_lock_irqsave(&p_tx->lock, flags);
395 }
396
397 p_tx->b_completing_packet = false;
398 rc = 0;
399out:
400 spin_unlock_irqrestore(&p_tx->lock, flags);
401 return rc;
402}
403
Michal Kalderon0518c122017-06-09 17:13:22 +0300404static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn,
405 union core_rx_cqe_union *p_cqe,
406 struct qed_ll2_comp_rx_data *data)
Ram Amraniabd49672016-10-01 22:00:01 +0300407{
Michal Kalderon0518c122017-06-09 17:13:22 +0300408 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags);
409 data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length);
410 data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan);
411 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi);
412 data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo);
413 data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error;
Tomer Tayarda090912017-12-27 19:30:07 +0200414 data->qp_id = le16_to_cpu(p_cqe->rx_cqe_gsi.qp_id);
415
416 data->src_qp = le32_to_cpu(p_cqe->rx_cqe_gsi.src_qp);
Ram Amraniabd49672016-10-01 22:00:01 +0300417}
418
Mintz, Yuval68be9102017-06-09 17:13:19 +0300419static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn,
420 union core_rx_cqe_union *p_cqe,
421 struct qed_ll2_comp_rx_data *data)
422{
423 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags);
Michal Kalderon1e99c492017-09-24 12:09:45 +0300424 data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags);
Mintz, Yuval68be9102017-06-09 17:13:19 +0300425 data->length.packet_length =
426 le16_to_cpu(p_cqe->rx_cqe_fp.packet_length);
427 data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan);
428 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]);
429 data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]);
430 data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset;
431}
432
433static int
Michal Kalderon6f34a282017-10-09 12:37:48 +0300434qed_ll2_handle_slowpath(struct qed_hwfn *p_hwfn,
435 struct qed_ll2_info *p_ll2_conn,
436 union core_rx_cqe_union *p_cqe,
437 unsigned long *p_lock_flags)
438{
439 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
440 struct core_rx_slow_path_cqe *sp_cqe;
441
442 sp_cqe = &p_cqe->rx_cqe_sp;
443 if (sp_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) {
444 DP_NOTICE(p_hwfn,
445 "LL2 - unexpected Rx CQE slowpath ramrod_cmd_id:%d\n",
446 sp_cqe->ramrod_cmd_id);
447 return -EINVAL;
448 }
449
450 if (!p_ll2_conn->cbs.slowpath_cb) {
451 DP_NOTICE(p_hwfn,
452 "LL2 - received RX_QUEUE_FLUSH but no callback was provided\n");
453 return -EINVAL;
454 }
455
456 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
457
458 p_ll2_conn->cbs.slowpath_cb(p_ll2_conn->cbs.cookie,
459 p_ll2_conn->my_id,
460 le32_to_cpu(sp_cqe->opaque_data.data[0]),
461 le32_to_cpu(sp_cqe->opaque_data.data[1]));
462
463 spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
464
465 return 0;
466}
467
468static int
Mintz, Yuval68be9102017-06-09 17:13:19 +0300469qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn,
470 struct qed_ll2_info *p_ll2_conn,
471 union core_rx_cqe_union *p_cqe,
472 unsigned long *p_lock_flags, bool b_last_cqe)
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300473{
474 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
475 struct qed_ll2_rx_packet *p_pkt = NULL;
Mintz, Yuval68be9102017-06-09 17:13:19 +0300476 struct qed_ll2_comp_rx_data data;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300477
478 if (!list_empty(&p_rx->active_descq))
479 p_pkt = list_first_entry(&p_rx->active_descq,
480 struct qed_ll2_rx_packet, list_entry);
481 if (!p_pkt) {
482 DP_NOTICE(p_hwfn,
Mintz, Yuval68be9102017-06-09 17:13:19 +0300483 "[%d] LL2 Rx completion but active_descq is empty\n",
Mintz, Yuval13c54772017-06-09 17:13:20 +0300484 p_ll2_conn->input.conn_type);
Mintz, Yuval68be9102017-06-09 17:13:19 +0300485
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300486 return -EIO;
487 }
488 list_del(&p_pkt->list_entry);
489
Michal Kalderon0518c122017-06-09 17:13:22 +0300490 if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR)
491 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data);
492 else
493 qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300494 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd)
495 DP_NOTICE(p_hwfn,
496 "Mismatch between active_descq and the LL2 Rx chain\n");
Mintz, Yuval68be9102017-06-09 17:13:19 +0300497
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300498 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
499
Mintz, Yuval68be9102017-06-09 17:13:19 +0300500 data.connection_handle = p_ll2_conn->my_id;
501 data.cookie = p_pkt->cookie;
502 data.rx_buf_addr = p_pkt->rx_buf_addr;
503 data.b_last_packet = b_last_cqe;
504
Ram Amrani1df2ade2017-03-14 15:26:02 +0200505 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
Michal Kalderon0518c122017-06-09 17:13:22 +0300506 p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data);
507
Ram Amrani1df2ade2017-03-14 15:26:02 +0200508 spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300509
510 return 0;
511}
512
513static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie)
514{
Mintz, Yuval13c54772017-06-09 17:13:20 +0300515 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300516 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
517 union core_rx_cqe_union *cqe = NULL;
518 u16 cq_new_idx = 0, cq_old_idx = 0;
519 unsigned long flags = 0;
520 int rc = 0;
521
522 spin_lock_irqsave(&p_rx->lock, flags);
523 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
524 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
525
526 while (cq_new_idx != cq_old_idx) {
527 bool b_last_cqe = (cq_new_idx == cq_old_idx);
528
Mintz, Yuval13c54772017-06-09 17:13:20 +0300529 cqe =
530 (union core_rx_cqe_union *)
531 qed_chain_consume(&p_rx->rcq_chain);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300532 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
533
534 DP_VERBOSE(p_hwfn,
535 QED_MSG_LL2,
536 "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n",
537 cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type);
538
539 switch (cqe->rx_cqe_sp.type) {
540 case CORE_RX_CQE_TYPE_SLOW_PATH:
Michal Kalderon6f34a282017-10-09 12:37:48 +0300541 rc = qed_ll2_handle_slowpath(p_hwfn, p_ll2_conn,
542 cqe, &flags);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300543 break;
Ram Amraniabd49672016-10-01 22:00:01 +0300544 case CORE_RX_CQE_TYPE_GSI_OFFLOAD:
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300545 case CORE_RX_CQE_TYPE_REGULAR:
Mintz, Yuval68be9102017-06-09 17:13:19 +0300546 rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn,
547 cqe, &flags,
548 b_last_cqe);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300549 break;
550 default:
551 rc = -EIO;
552 }
553 }
554
555 spin_unlock_irqrestore(&p_rx->lock, flags);
556 return rc;
557}
558
Yuval Mintz8c93bea2016-10-13 22:57:03 +0300559static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300560{
561 struct qed_ll2_info *p_ll2_conn = NULL;
562 struct qed_ll2_rx_packet *p_pkt = NULL;
563 struct qed_ll2_rx_queue *p_rx;
Michal Kalderon6291c602018-05-16 14:44:39 +0300564 unsigned long flags = 0;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300565
566 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
567 if (!p_ll2_conn)
568 return;
569
570 p_rx = &p_ll2_conn->rx_queue;
571
Michal Kalderon6291c602018-05-16 14:44:39 +0300572 spin_lock_irqsave(&p_rx->lock, flags);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300573 while (!list_empty(&p_rx->active_descq)) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300574 p_pkt = list_first_entry(&p_rx->active_descq,
575 struct qed_ll2_rx_packet, list_entry);
576 if (!p_pkt)
577 break;
Wei Yongjunb4f0fd42016-10-17 15:17:51 +0000578 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq);
Michal Kalderon6291c602018-05-16 14:44:39 +0300579 spin_unlock_irqrestore(&p_rx->lock, flags);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300580
Kalderon, Michal526d1d02017-07-02 10:29:23 +0300581 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800582 struct qed_ooo_buffer *p_buffer;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300583
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800584 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
585 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
586 p_buffer);
587 } else {
Mintz, Yuval54f19f02017-06-09 17:13:24 +0300588 dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr;
589 void *cookie = p_pkt->cookie;
590 bool b_last;
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800591
592 b_last = list_empty(&p_rx->active_descq);
Mintz, Yuval54f19f02017-06-09 17:13:24 +0300593 p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie,
594 p_ll2_conn->my_id,
595 cookie,
596 rx_buf_addr, b_last);
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800597 }
Michal Kalderon6291c602018-05-16 14:44:39 +0300598 spin_lock_irqsave(&p_rx->lock, flags);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300599 }
Michal Kalderon6291c602018-05-16 14:44:39 +0300600 spin_unlock_irqrestore(&p_rx->lock, flags);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300601}
602
Michal Kalderon974f6c02018-05-16 14:44:38 +0300603static bool
604qed_ll2_lb_rxq_handler_slowpath(struct qed_hwfn *p_hwfn,
605 struct core_rx_slow_path_cqe *p_cqe)
606{
607 struct ooo_opaque *iscsi_ooo;
608 u32 cid;
609
610 if (p_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH)
611 return false;
612
613 iscsi_ooo = (struct ooo_opaque *)&p_cqe->opaque_data;
614 if (iscsi_ooo->ooo_opcode != TCP_EVENT_DELETE_ISLES)
615 return false;
616
617 /* Need to make a flush */
618 cid = le32_to_cpu(iscsi_ooo->cid);
619 qed_ooo_release_connection_isles(p_hwfn, p_hwfn->p_ooo_info, cid);
620
621 return true;
622}
623
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800624static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn,
625 struct qed_ll2_info *p_ll2_conn)
626{
627 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
628 u16 packet_length = 0, parse_flags = 0, vlan = 0;
629 struct qed_ll2_rx_packet *p_pkt = NULL;
630 u32 num_ooo_add_to_peninsula = 0, cid;
631 union core_rx_cqe_union *cqe = NULL;
632 u16 cq_new_idx = 0, cq_old_idx = 0;
633 struct qed_ooo_buffer *p_buffer;
634 struct ooo_opaque *iscsi_ooo;
635 u8 placement_offset = 0;
636 u8 cqe_type;
637
638 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
639 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
640 if (cq_new_idx == cq_old_idx)
641 return 0;
642
643 while (cq_new_idx != cq_old_idx) {
644 struct core_rx_fast_path_cqe *p_cqe_fp;
645
646 cqe = qed_chain_consume(&p_rx->rcq_chain);
647 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
648 cqe_type = cqe->rx_cqe_sp.type;
649
Michal Kalderon974f6c02018-05-16 14:44:38 +0300650 if (cqe_type == CORE_RX_CQE_TYPE_SLOW_PATH)
651 if (qed_ll2_lb_rxq_handler_slowpath(p_hwfn,
652 &cqe->rx_cqe_sp))
653 continue;
654
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800655 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) {
656 DP_NOTICE(p_hwfn,
657 "Got a non-regular LB LL2 completion [type 0x%02x]\n",
658 cqe_type);
659 return -EINVAL;
660 }
661 p_cqe_fp = &cqe->rx_cqe_fp;
662
663 placement_offset = p_cqe_fp->placement_offset;
664 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags);
665 packet_length = le16_to_cpu(p_cqe_fp->packet_length);
666 vlan = le16_to_cpu(p_cqe_fp->vlan);
667 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data;
668 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info,
669 iscsi_ooo);
670 cid = le32_to_cpu(iscsi_ooo->cid);
671
672 /* Process delete isle first */
673 if (iscsi_ooo->drop_size)
674 qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid,
675 iscsi_ooo->drop_isle,
676 iscsi_ooo->drop_size);
677
678 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP)
679 continue;
680
681 /* Now process create/add/join isles */
682 if (list_empty(&p_rx->active_descq)) {
683 DP_NOTICE(p_hwfn,
684 "LL2 OOO RX chain has no submitted buffers\n"
685 );
686 return -EIO;
687 }
688
689 p_pkt = list_first_entry(&p_rx->active_descq,
690 struct qed_ll2_rx_packet, list_entry);
691
692 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) ||
693 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) ||
694 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) ||
695 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) ||
696 (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) {
697 if (!p_pkt) {
698 DP_NOTICE(p_hwfn,
699 "LL2 OOO RX packet is not valid\n");
700 return -EIO;
701 }
702 list_del(&p_pkt->list_entry);
703 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
704 p_buffer->packet_length = packet_length;
705 p_buffer->parse_flags = parse_flags;
706 p_buffer->vlan = vlan;
707 p_buffer->placement_offset = placement_offset;
708 qed_chain_consume(&p_rx->rxq_chain);
709 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
710
711 switch (iscsi_ooo->ooo_opcode) {
712 case TCP_EVENT_ADD_NEW_ISLE:
713 qed_ooo_add_new_isle(p_hwfn,
714 p_hwfn->p_ooo_info,
715 cid,
716 iscsi_ooo->ooo_isle,
717 p_buffer);
718 break;
719 case TCP_EVENT_ADD_ISLE_RIGHT:
720 qed_ooo_add_new_buffer(p_hwfn,
721 p_hwfn->p_ooo_info,
722 cid,
723 iscsi_ooo->ooo_isle,
724 p_buffer,
725 QED_OOO_RIGHT_BUF);
726 break;
727 case TCP_EVENT_ADD_ISLE_LEFT:
728 qed_ooo_add_new_buffer(p_hwfn,
729 p_hwfn->p_ooo_info,
730 cid,
731 iscsi_ooo->ooo_isle,
732 p_buffer,
733 QED_OOO_LEFT_BUF);
734 break;
735 case TCP_EVENT_JOIN:
736 qed_ooo_add_new_buffer(p_hwfn,
737 p_hwfn->p_ooo_info,
738 cid,
739 iscsi_ooo->ooo_isle +
740 1,
741 p_buffer,
742 QED_OOO_LEFT_BUF);
743 qed_ooo_join_isles(p_hwfn,
744 p_hwfn->p_ooo_info,
745 cid, iscsi_ooo->ooo_isle);
746 break;
747 case TCP_EVENT_ADD_PEN:
748 num_ooo_add_to_peninsula++;
749 qed_ooo_put_ready_buffer(p_hwfn,
750 p_hwfn->p_ooo_info,
751 p_buffer, true);
752 break;
753 }
754 } else {
755 DP_NOTICE(p_hwfn,
756 "Unexpected event (%d) TX OOO completion\n",
757 iscsi_ooo->ooo_opcode);
758 }
759 }
760
761 return 0;
762}
763
764static void
765qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn,
766 struct qed_ll2_info *p_ll2_conn)
767{
Mintz, Yuval7c7973b2017-06-09 17:13:18 +0300768 struct qed_ll2_tx_pkt_info tx_pkt;
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800769 struct qed_ooo_buffer *p_buffer;
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800770 u16 l4_hdr_offset_w;
771 dma_addr_t first_frag;
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800772 u8 bd_flags;
Mintz, Yuval7c7973b2017-06-09 17:13:18 +0300773 int rc;
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800774
775 /* Submit Tx buffers here */
776 while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn,
777 p_hwfn->p_ooo_info))) {
778 l4_hdr_offset_w = 0;
779 bd_flags = 0;
780
781 first_frag = p_buffer->rx_buffer_phys_addr +
782 p_buffer->placement_offset;
Mintz, Yuvalbe086e72017-03-11 18:39:18 +0200783 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1);
784 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1);
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800785
Mintz, Yuval7c7973b2017-06-09 17:13:18 +0300786 memset(&tx_pkt, 0, sizeof(tx_pkt));
787 tx_pkt.num_of_bds = 1;
788 tx_pkt.vlan = p_buffer->vlan;
789 tx_pkt.bd_flags = bd_flags;
790 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w;
Mintz, Yuval13c54772017-06-09 17:13:20 +0300791 tx_pkt.tx_dest = p_ll2_conn->tx_dest;
Mintz, Yuval7c7973b2017-06-09 17:13:18 +0300792 tx_pkt.first_frag = first_frag;
793 tx_pkt.first_frag_len = p_buffer->packet_length;
794 tx_pkt.cookie = p_buffer;
795
796 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id,
797 &tx_pkt, true);
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800798 if (rc) {
799 qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info,
800 p_buffer, false);
801 break;
802 }
803 }
804}
805
806static void
807qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn,
808 struct qed_ll2_info *p_ll2_conn)
809{
810 struct qed_ooo_buffer *p_buffer;
811 int rc;
812
813 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
814 p_hwfn->p_ooo_info))) {
815 rc = qed_ll2_post_rx_buffer(p_hwfn,
816 p_ll2_conn->my_id,
817 p_buffer->rx_buffer_phys_addr,
818 0, p_buffer, true);
819 if (rc) {
820 qed_ooo_put_free_buffer(p_hwfn,
821 p_hwfn->p_ooo_info, p_buffer);
822 break;
823 }
824 }
825}
826
827static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
828{
829 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
830 int rc;
831
Michal Kalderonfc16f562018-05-16 14:44:40 +0300832 if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
833 return 0;
834
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800835 rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn);
836 if (rc)
837 return rc;
838
839 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
840 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
841
842 return 0;
843}
844
845static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
846{
847 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
848 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
849 struct qed_ll2_tx_packet *p_pkt = NULL;
850 struct qed_ooo_buffer *p_buffer;
851 bool b_dont_submit_rx = false;
852 u16 new_idx = 0, num_bds = 0;
853 int rc;
854
Michal Kalderonfc16f562018-05-16 14:44:40 +0300855 if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
856 return 0;
857
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800858 new_idx = le16_to_cpu(*p_tx->p_fw_cons);
859 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
860
861 if (!num_bds)
862 return 0;
863
864 while (num_bds) {
865 if (list_empty(&p_tx->active_descq))
866 return -EINVAL;
867
868 p_pkt = list_first_entry(&p_tx->active_descq,
869 struct qed_ll2_tx_packet, list_entry);
870 if (!p_pkt)
871 return -EINVAL;
872
873 if (p_pkt->bd_used != 1) {
874 DP_NOTICE(p_hwfn,
875 "Unexpectedly many BDs(%d) in TX OOO completion\n",
876 p_pkt->bd_used);
877 return -EINVAL;
878 }
879
880 list_del(&p_pkt->list_entry);
881
882 num_bds--;
883 p_tx->bds_idx++;
884 qed_chain_consume(&p_tx->txq_chain);
885
886 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
887 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
888
889 if (b_dont_submit_rx) {
890 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
891 p_buffer);
892 continue;
893 }
894
895 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id,
896 p_buffer->rx_buffer_phys_addr, 0,
897 p_buffer, true);
898 if (rc != 0) {
899 qed_ooo_put_free_buffer(p_hwfn,
900 p_hwfn->p_ooo_info, p_buffer);
901 b_dont_submit_rx = true;
902 }
903 }
904
905 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
906
907 return 0;
908}
909
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800910static void qed_ll2_stop_ooo(struct qed_dev *cdev)
911{
912 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
913 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
914
915 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Stopping LL2 OOO queue [%02x]\n",
916 *handle);
917
918 qed_ll2_terminate_connection(hwfn, *handle);
919 qed_ll2_release_connection(hwfn, *handle);
920 *handle = QED_LL2_UNUSED_HANDLE;
921}
922
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300923static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn,
924 struct qed_ll2_info *p_ll2_conn,
925 u8 action_on_error)
926{
Mintz, Yuval13c54772017-06-09 17:13:20 +0300927 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300928 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
929 struct core_rx_start_ramrod_data *p_ramrod = NULL;
930 struct qed_spq_entry *p_ent = NULL;
931 struct qed_sp_init_data init_data;
932 u16 cqe_pbl_size;
933 int rc = 0;
934
935 /* Get SPQ entry */
936 memset(&init_data, 0, sizeof(init_data));
937 init_data.cid = p_ll2_conn->cid;
938 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
939 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
940
941 rc = qed_sp_init_request(p_hwfn, &p_ent,
942 CORE_RAMROD_RX_QUEUE_START,
943 PROTOCOLID_CORE, &init_data);
944 if (rc)
945 return rc;
946
947 p_ramrod = &p_ent->ramrod.core_rx_queue_start;
948
949 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
950 p_ramrod->sb_index = p_rx->rx_sb_index;
951 p_ramrod->complete_event_flg = 1;
952
Mintz, Yuval13c54772017-06-09 17:13:20 +0300953 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
954 DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300955 cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain);
956 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
957 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr,
958 qed_chain_get_pbl_phys(&p_rx->rcq_chain));
959
Mintz, Yuval13c54772017-06-09 17:13:20 +0300960 p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg;
Tomer Tayarda090912017-12-27 19:30:07 +0200961 p_ramrod->inner_vlan_stripping_en =
962 p_ll2_conn->input.rx_vlan_removal_en;
Sudarsana Reddy Kallurucac6f692018-05-05 18:43:02 -0700963
964 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
965 p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE)
966 p_ramrod->report_outer_vlan = 1;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300967 p_ramrod->queue_id = p_ll2_conn->queue_id;
Michal Kalderoned468eb2017-10-09 12:37:44 +0300968 p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300969
Sudarsana Reddy Kalluru0bc5fe82018-05-05 18:42:59 -0700970 if (test_bit(QED_MF_LL2_NON_UNICAST, &p_hwfn->cdev->mf_bits) &&
971 p_ramrod->main_func_queue && conn_type != QED_LL2_TYPE_ROCE &&
972 conn_type != QED_LL2_TYPE_IWARP) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300973 p_ramrod->mf_si_bcast_accept_all = 1;
974 p_ramrod->mf_si_mcast_accept_all = 1;
975 } else {
976 p_ramrod->mf_si_bcast_accept_all = 0;
977 p_ramrod->mf_si_mcast_accept_all = 0;
978 }
979
980 p_ramrod->action_on_error.error_type = action_on_error;
Mintz, Yuval13c54772017-06-09 17:13:20 +0300981 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300982 return qed_spq_post(p_hwfn, p_ent, NULL);
983}
984
985static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn,
986 struct qed_ll2_info *p_ll2_conn)
987{
Mintz, Yuval13c54772017-06-09 17:13:20 +0300988 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300989 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
990 struct core_tx_start_ramrod_data *p_ramrod = NULL;
991 struct qed_spq_entry *p_ent = NULL;
992 struct qed_sp_init_data init_data;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300993 u16 pq_id = 0, pbl_size;
994 int rc = -EINVAL;
995
996 if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
997 return 0;
998
Kalderon, Michal526d1d02017-07-02 10:29:23 +0300999 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001000 p_ll2_conn->tx_stats_en = 0;
1001 else
1002 p_ll2_conn->tx_stats_en = 1;
1003
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001004 /* Get SPQ entry */
1005 memset(&init_data, 0, sizeof(init_data));
1006 init_data.cid = p_ll2_conn->cid;
1007 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1008 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1009
1010 rc = qed_sp_init_request(p_hwfn, &p_ent,
1011 CORE_RAMROD_TX_QUEUE_START,
1012 PROTOCOLID_CORE, &init_data);
1013 if (rc)
1014 return rc;
1015
1016 p_ramrod = &p_ent->ramrod.core_tx_queue_start;
1017
1018 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
1019 p_ramrod->sb_index = p_tx->tx_sb_index;
Mintz, Yuval13c54772017-06-09 17:13:20 +03001020 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001021 p_ramrod->stats_en = p_ll2_conn->tx_stats_en;
1022 p_ramrod->stats_id = p_ll2_conn->tx_stats_id;
1023
1024 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr,
1025 qed_chain_get_pbl_phys(&p_tx->txq_chain));
1026 pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain);
1027 p_ramrod->pbl_size = cpu_to_le16(pbl_size);
1028
Mintz, Yuval13c54772017-06-09 17:13:20 +03001029 switch (p_ll2_conn->input.tx_tc) {
Kalderon, Michal526d1d02017-07-02 10:29:23 +03001030 case PURE_LB_TC:
Ariel Eliorb5a9ee72017-04-03 12:21:09 +03001031 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
1032 break;
Kalderon, Michal526d1d02017-07-02 10:29:23 +03001033 case PKT_LB_TC:
Ariel Eliorb5a9ee72017-04-03 12:21:09 +03001034 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO);
Colin Ian King827d2402017-04-05 13:35:44 +01001035 break;
Ariel Eliorb5a9ee72017-04-03 12:21:09 +03001036 default:
1037 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD);
1038 break;
1039 }
1040
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001041 p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
1042
1043 switch (conn_type) {
Arun Easi1e128c82017-02-15 06:28:22 -08001044 case QED_LL2_TYPE_FCOE:
1045 p_ramrod->conn_type = PROTOCOLID_FCOE;
1046 break;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001047 case QED_LL2_TYPE_ISCSI:
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001048 p_ramrod->conn_type = PROTOCOLID_ISCSI;
1049 break;
1050 case QED_LL2_TYPE_ROCE:
1051 p_ramrod->conn_type = PROTOCOLID_ROCE;
1052 break;
Kalderon, Michalcc4ad322017-07-02 10:29:24 +03001053 case QED_LL2_TYPE_IWARP:
1054 p_ramrod->conn_type = PROTOCOLID_IWARP;
1055 break;
1056 case QED_LL2_TYPE_OOO:
1057 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI)
1058 p_ramrod->conn_type = PROTOCOLID_ISCSI;
1059 else
1060 p_ramrod->conn_type = PROTOCOLID_IWARP;
1061 break;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001062 default:
1063 p_ramrod->conn_type = PROTOCOLID_ETH;
1064 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type);
1065 }
1066
Mintz, Yuval13c54772017-06-09 17:13:20 +03001067 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
1068
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001069 return qed_spq_post(p_hwfn, p_ent, NULL);
1070}
1071
1072static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn,
1073 struct qed_ll2_info *p_ll2_conn)
1074{
1075 struct core_rx_stop_ramrod_data *p_ramrod = NULL;
1076 struct qed_spq_entry *p_ent = NULL;
1077 struct qed_sp_init_data init_data;
1078 int rc = -EINVAL;
1079
1080 /* Get SPQ entry */
1081 memset(&init_data, 0, sizeof(init_data));
1082 init_data.cid = p_ll2_conn->cid;
1083 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1084 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1085
1086 rc = qed_sp_init_request(p_hwfn, &p_ent,
1087 CORE_RAMROD_RX_QUEUE_STOP,
1088 PROTOCOLID_CORE, &init_data);
1089 if (rc)
1090 return rc;
1091
1092 p_ramrod = &p_ent->ramrod.core_rx_queue_stop;
1093
1094 p_ramrod->complete_event_flg = 1;
1095 p_ramrod->queue_id = p_ll2_conn->queue_id;
1096
1097 return qed_spq_post(p_hwfn, p_ent, NULL);
1098}
1099
1100static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn,
1101 struct qed_ll2_info *p_ll2_conn)
1102{
1103 struct qed_spq_entry *p_ent = NULL;
1104 struct qed_sp_init_data init_data;
1105 int rc = -EINVAL;
1106
1107 /* Get SPQ entry */
1108 memset(&init_data, 0, sizeof(init_data));
1109 init_data.cid = p_ll2_conn->cid;
1110 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1111 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1112
1113 rc = qed_sp_init_request(p_hwfn, &p_ent,
1114 CORE_RAMROD_TX_QUEUE_STOP,
1115 PROTOCOLID_CORE, &init_data);
1116 if (rc)
1117 return rc;
1118
1119 return qed_spq_post(p_hwfn, p_ent, NULL);
1120}
1121
1122static int
1123qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001124 struct qed_ll2_info *p_ll2_info)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001125{
1126 struct qed_ll2_rx_packet *p_descq;
1127 u32 capacity;
1128 int rc = 0;
1129
Mintz, Yuval13c54772017-06-09 17:13:20 +03001130 if (!p_ll2_info->input.rx_num_desc)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001131 goto out;
1132
1133 rc = qed_chain_alloc(p_hwfn->cdev,
1134 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1135 QED_CHAIN_MODE_NEXT_PTR,
1136 QED_CHAIN_CNT_TYPE_U16,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001137 p_ll2_info->input.rx_num_desc,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001138 sizeof(struct core_rx_bd),
Mintz, Yuval1a4a6972017-06-20 16:00:00 +03001139 &p_ll2_info->rx_queue.rxq_chain, NULL);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001140 if (rc) {
1141 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n");
1142 goto out;
1143 }
1144
1145 capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain);
1146 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet),
1147 GFP_KERNEL);
1148 if (!p_descq) {
1149 rc = -ENOMEM;
1150 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n");
1151 goto out;
1152 }
1153 p_ll2_info->rx_queue.descq_array = p_descq;
1154
1155 rc = qed_chain_alloc(p_hwfn->cdev,
1156 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1157 QED_CHAIN_MODE_PBL,
1158 QED_CHAIN_CNT_TYPE_U16,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001159 p_ll2_info->input.rx_num_desc,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001160 sizeof(struct core_rx_fast_path_cqe),
Mintz, Yuval1a4a6972017-06-20 16:00:00 +03001161 &p_ll2_info->rx_queue.rcq_chain, NULL);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001162 if (rc) {
1163 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n");
1164 goto out;
1165 }
1166
1167 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1168 "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n",
Mintz, Yuval13c54772017-06-09 17:13:20 +03001169 p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001170
1171out:
1172 return rc;
1173}
1174
1175static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001176 struct qed_ll2_info *p_ll2_info)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001177{
1178 struct qed_ll2_tx_packet *p_descq;
Michal Kalderonf5823fe2017-10-09 12:37:43 +03001179 u32 desc_size;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001180 u32 capacity;
1181 int rc = 0;
1182
Mintz, Yuval13c54772017-06-09 17:13:20 +03001183 if (!p_ll2_info->input.tx_num_desc)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001184 goto out;
1185
1186 rc = qed_chain_alloc(p_hwfn->cdev,
1187 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1188 QED_CHAIN_MODE_PBL,
1189 QED_CHAIN_CNT_TYPE_U16,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001190 p_ll2_info->input.tx_num_desc,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001191 sizeof(struct core_tx_bd),
Mintz, Yuval1a4a6972017-06-20 16:00:00 +03001192 &p_ll2_info->tx_queue.txq_chain, NULL);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001193 if (rc)
1194 goto out;
1195
1196 capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain);
Michal Kalderonf5823fe2017-10-09 12:37:43 +03001197 /* First element is part of the packet, rest are flexibly added */
1198 desc_size = (sizeof(*p_descq) +
1199 (p_ll2_info->input.tx_max_bds_per_packet - 1) *
1200 sizeof(p_descq->bds_set));
1201
1202 p_descq = kcalloc(capacity, desc_size, GFP_KERNEL);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001203 if (!p_descq) {
1204 rc = -ENOMEM;
1205 goto out;
1206 }
Michal Kalderonf5823fe2017-10-09 12:37:43 +03001207 p_ll2_info->tx_queue.descq_mem = p_descq;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001208
1209 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1210 "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n",
Mintz, Yuval13c54772017-06-09 17:13:20 +03001211 p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001212
1213out:
1214 if (rc)
1215 DP_NOTICE(p_hwfn,
1216 "Can't allocate memory for Tx LL2 with 0x%08x buffers\n",
Mintz, Yuval13c54772017-06-09 17:13:20 +03001217 p_ll2_info->input.tx_num_desc);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001218 return rc;
1219}
1220
Mintz, Yuval13c54772017-06-09 17:13:20 +03001221static int
1222qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn,
1223 struct qed_ll2_info *p_ll2_info, u16 mtu)
1224{
1225 struct qed_ooo_buffer *p_buf = NULL;
1226 void *p_virt;
1227 u16 buf_idx;
1228 int rc = 0;
1229
Kalderon, Michal526d1d02017-07-02 10:29:23 +03001230 if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO)
Mintz, Yuval13c54772017-06-09 17:13:20 +03001231 return rc;
1232
1233 /* Correct number of requested OOO buffers if needed */
1234 if (!p_ll2_info->input.rx_num_ooo_buffers) {
1235 u16 num_desc = p_ll2_info->input.rx_num_desc;
1236
1237 if (!num_desc)
1238 return -EINVAL;
1239 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2;
1240 }
1241
1242 for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers;
1243 buf_idx++) {
1244 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL);
1245 if (!p_buf) {
1246 rc = -ENOMEM;
1247 goto out;
1248 }
1249
1250 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE;
1251 p_buf->rx_buffer_size = (p_buf->rx_buffer_size +
1252 ETH_CACHE_LINE_SIZE - 1) &
1253 ~(ETH_CACHE_LINE_SIZE - 1);
1254 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
1255 p_buf->rx_buffer_size,
1256 &p_buf->rx_buffer_phys_addr,
1257 GFP_KERNEL);
1258 if (!p_virt) {
1259 kfree(p_buf);
1260 rc = -ENOMEM;
1261 goto out;
1262 }
1263
1264 p_buf->rx_buffer_virt_addr = p_virt;
1265 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf);
1266 }
1267
1268 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1269 "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n",
1270 p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size);
1271
1272out:
1273 return rc;
1274}
1275
Michal Kalderon0518c122017-06-09 17:13:22 +03001276static int
1277qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs)
1278{
1279 if (!cbs || (!cbs->rx_comp_cb ||
1280 !cbs->rx_release_cb ||
1281 !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie))
1282 return -EINVAL;
1283
1284 p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb;
1285 p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb;
1286 p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb;
1287 p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb;
Michal Kalderon6f34a282017-10-09 12:37:48 +03001288 p_ll2_info->cbs.slowpath_cb = cbs->slowpath_cb;
Michal Kalderon0518c122017-06-09 17:13:22 +03001289 p_ll2_info->cbs.cookie = cbs->cookie;
1290
1291 return 0;
1292}
1293
Mintz, Yuval13c54772017-06-09 17:13:20 +03001294static enum core_error_handle
1295qed_ll2_get_error_choice(enum qed_ll2_error_handle err)
1296{
1297 switch (err) {
1298 case QED_LL2_DROP_PACKET:
1299 return LL2_DROP_PACKET;
1300 case QED_LL2_DO_NOTHING:
1301 return LL2_DO_NOTHING;
1302 case QED_LL2_ASSERT:
1303 return LL2_ASSERT;
1304 default:
1305 return LL2_DO_NOTHING;
1306 }
1307}
1308
Michal Kalderon0518c122017-06-09 17:13:22 +03001309int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001310{
Michal Kalderon0518c122017-06-09 17:13:22 +03001311 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001312 qed_int_comp_cb_t comp_rx_cb, comp_tx_cb;
1313 struct qed_ll2_info *p_ll2_info = NULL;
Mintz, Yuval13c54772017-06-09 17:13:20 +03001314 u8 i, *p_tx_max;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001315 int rc;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001316
Mintz, Yuval13c54772017-06-09 17:13:20 +03001317 if (!data->p_connection_handle || !p_hwfn->p_ll2_info)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001318 return -EINVAL;
1319
1320 /* Find a free connection to be used */
1321 for (i = 0; (i < QED_MAX_NUM_OF_LL2_CONNECTIONS); i++) {
1322 mutex_lock(&p_hwfn->p_ll2_info[i].mutex);
1323 if (p_hwfn->p_ll2_info[i].b_active) {
1324 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1325 continue;
1326 }
1327
1328 p_hwfn->p_ll2_info[i].b_active = true;
1329 p_ll2_info = &p_hwfn->p_ll2_info[i];
1330 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1331 break;
1332 }
1333 if (!p_ll2_info)
1334 return -EBUSY;
1335
Mintz, Yuval13c54772017-06-09 17:13:20 +03001336 memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input));
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001337
Tomer Tayarda090912017-12-27 19:30:07 +02001338 switch (data->input.tx_dest) {
1339 case QED_LL2_TX_DEST_NW:
1340 p_ll2_info->tx_dest = CORE_TX_DEST_NW;
1341 break;
1342 case QED_LL2_TX_DEST_LB:
1343 p_ll2_info->tx_dest = CORE_TX_DEST_LB;
1344 break;
1345 case QED_LL2_TX_DEST_DROP:
1346 p_ll2_info->tx_dest = CORE_TX_DEST_DROP;
1347 break;
1348 default:
1349 return -EINVAL;
1350 }
1351
Michal Kalderoned468eb2017-10-09 12:37:44 +03001352 if (data->input.conn_type == QED_LL2_TYPE_OOO ||
1353 data->input.secondary_queue)
1354 p_ll2_info->main_func_queue = false;
1355 else
1356 p_ll2_info->main_func_queue = true;
Mintz, Yuval13c54772017-06-09 17:13:20 +03001357
1358 /* Correct maximum number of Tx BDs */
1359 p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet;
1360 if (*p_tx_max == 0)
1361 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET;
1362 else
1363 *p_tx_max = min_t(u8, *p_tx_max,
1364 CORE_LL2_TX_MAX_BDS_PER_PACKET);
Michal Kalderon0518c122017-06-09 17:13:22 +03001365
1366 rc = qed_ll2_set_cbs(p_ll2_info, data->cbs);
1367 if (rc) {
1368 DP_NOTICE(p_hwfn, "Invalid callback functions\n");
1369 goto q_allocate_fail;
1370 }
1371
Mintz, Yuval13c54772017-06-09 17:13:20 +03001372 rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001373 if (rc)
1374 goto q_allocate_fail;
1375
Mintz, Yuval13c54772017-06-09 17:13:20 +03001376 rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001377 if (rc)
1378 goto q_allocate_fail;
1379
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001380 rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001381 data->input.mtu);
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001382 if (rc)
1383 goto q_allocate_fail;
1384
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001385 /* Register callbacks for the Rx/Tx queues */
Kalderon, Michal526d1d02017-07-02 10:29:23 +03001386 if (data->input.conn_type == QED_LL2_TYPE_OOO) {
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001387 comp_rx_cb = qed_ll2_lb_rxq_completion;
1388 comp_tx_cb = qed_ll2_lb_txq_completion;
1389 } else {
1390 comp_rx_cb = qed_ll2_rxq_completion;
1391 comp_tx_cb = qed_ll2_txq_completion;
1392 }
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001393
Mintz, Yuval13c54772017-06-09 17:13:20 +03001394 if (data->input.rx_num_desc) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001395 qed_int_register_cb(p_hwfn, comp_rx_cb,
1396 &p_hwfn->p_ll2_info[i],
1397 &p_ll2_info->rx_queue.rx_sb_index,
1398 &p_ll2_info->rx_queue.p_fw_cons);
1399 p_ll2_info->rx_queue.b_cb_registred = true;
1400 }
1401
Mintz, Yuval13c54772017-06-09 17:13:20 +03001402 if (data->input.tx_num_desc) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001403 qed_int_register_cb(p_hwfn,
1404 comp_tx_cb,
1405 &p_hwfn->p_ll2_info[i],
1406 &p_ll2_info->tx_queue.tx_sb_index,
1407 &p_ll2_info->tx_queue.p_fw_cons);
1408 p_ll2_info->tx_queue.b_cb_registred = true;
1409 }
1410
Mintz, Yuval13c54772017-06-09 17:13:20 +03001411 *data->p_connection_handle = i;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001412 return rc;
1413
1414q_allocate_fail:
1415 qed_ll2_release_connection(p_hwfn, i);
1416 return -ENOMEM;
1417}
1418
1419static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn,
1420 struct qed_ll2_info *p_ll2_conn)
1421{
Mintz, Yuval13c54772017-06-09 17:13:20 +03001422 enum qed_ll2_error_handle error_input;
1423 enum core_error_handle error_mode;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001424 u8 action_on_error = 0;
1425
1426 if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
1427 return 0;
1428
1429 DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0);
Mintz, Yuval13c54772017-06-09 17:13:20 +03001430 error_input = p_ll2_conn->input.ai_err_packet_too_big;
1431 error_mode = qed_ll2_get_error_choice(error_input);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001432 SET_FIELD(action_on_error,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001433 CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode);
1434 error_input = p_ll2_conn->input.ai_err_no_buf;
1435 error_mode = qed_ll2_get_error_choice(error_input);
1436 SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001437
1438 return qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error);
1439}
1440
Mintz, Yuval58de2892017-06-09 17:13:21 +03001441static void
1442qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn,
1443 struct qed_ll2_info *p_ll2_conn)
1444{
Kalderon, Michal526d1d02017-07-02 10:29:23 +03001445 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
Mintz, Yuval58de2892017-06-09 17:13:21 +03001446 return;
1447
1448 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1449 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
1450}
Michal Kalderon0518c122017-06-09 17:13:22 +03001451
1452int qed_ll2_establish_connection(void *cxt, u8 connection_handle)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001453{
Michal Kalderon0518c122017-06-09 17:13:22 +03001454 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001455 struct qed_ll2_info *p_ll2_conn;
Michal Kalderonf5823fe2017-10-09 12:37:43 +03001456 struct qed_ll2_tx_packet *p_pkt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001457 struct qed_ll2_rx_queue *p_rx;
1458 struct qed_ll2_tx_queue *p_tx;
Rahul Verma15582962017-04-06 15:58:29 +03001459 struct qed_ptt *p_ptt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001460 int rc = -EINVAL;
1461 u32 i, capacity;
Michal Kalderonf5823fe2017-10-09 12:37:43 +03001462 u32 desc_size;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001463 u8 qid;
1464
Rahul Verma15582962017-04-06 15:58:29 +03001465 p_ptt = qed_ptt_acquire(p_hwfn);
1466 if (!p_ptt)
1467 return -EAGAIN;
1468
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001469 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
Rahul Verma15582962017-04-06 15:58:29 +03001470 if (!p_ll2_conn) {
1471 rc = -EINVAL;
1472 goto out;
1473 }
1474
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001475 p_rx = &p_ll2_conn->rx_queue;
1476 p_tx = &p_ll2_conn->tx_queue;
1477
1478 qed_chain_reset(&p_rx->rxq_chain);
1479 qed_chain_reset(&p_rx->rcq_chain);
1480 INIT_LIST_HEAD(&p_rx->active_descq);
1481 INIT_LIST_HEAD(&p_rx->free_descq);
1482 INIT_LIST_HEAD(&p_rx->posting_descq);
1483 spin_lock_init(&p_rx->lock);
1484 capacity = qed_chain_get_capacity(&p_rx->rxq_chain);
1485 for (i = 0; i < capacity; i++)
1486 list_add_tail(&p_rx->descq_array[i].list_entry,
1487 &p_rx->free_descq);
1488 *p_rx->p_fw_cons = 0;
1489
1490 qed_chain_reset(&p_tx->txq_chain);
1491 INIT_LIST_HEAD(&p_tx->active_descq);
1492 INIT_LIST_HEAD(&p_tx->free_descq);
1493 INIT_LIST_HEAD(&p_tx->sending_descq);
1494 spin_lock_init(&p_tx->lock);
1495 capacity = qed_chain_get_capacity(&p_tx->txq_chain);
Michal Kalderonf5823fe2017-10-09 12:37:43 +03001496 /* First element is part of the packet, rest are flexibly added */
1497 desc_size = (sizeof(*p_pkt) +
1498 (p_ll2_conn->input.tx_max_bds_per_packet - 1) *
1499 sizeof(p_pkt->bds_set));
1500
1501 for (i = 0; i < capacity; i++) {
1502 p_pkt = p_tx->descq_mem + desc_size * i;
1503 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
1504 }
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001505 p_tx->cur_completing_bd_idx = 0;
1506 p_tx->bds_idx = 0;
1507 p_tx->b_completing_packet = false;
1508 p_tx->cur_send_packet = NULL;
1509 p_tx->cur_send_frag_num = 0;
1510 p_tx->cur_completing_frag_num = 0;
1511 *p_tx->p_fw_cons = 0;
1512
Rahul Verma15582962017-04-06 15:58:29 +03001513 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid);
1514 if (rc)
1515 goto out;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001516
1517 qid = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + connection_handle;
1518 p_ll2_conn->queue_id = qid;
1519 p_ll2_conn->tx_stats_id = qid;
1520 p_rx->set_prod_addr = (u8 __iomem *)p_hwfn->regview +
1521 GTT_BAR0_MAP_REG_TSDM_RAM +
1522 TSTORM_LL2_RX_PRODS_OFFSET(qid);
1523 p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells +
1524 qed_db_addr(p_ll2_conn->cid,
1525 DQ_DEMS_LEGACY);
1526
1527 rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn);
1528 if (rc)
Rahul Verma15582962017-04-06 15:58:29 +03001529 goto out;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001530
1531 rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn);
1532 if (rc)
Rahul Verma15582962017-04-06 15:58:29 +03001533 goto out;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001534
Kalderon, Michalc851a9d2017-07-02 10:29:21 +03001535 if (!QED_IS_RDMA_PERSONALITY(p_hwfn))
Rahul Verma15582962017-04-06 15:58:29 +03001536 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001537
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001538 qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn);
1539
Mintz, Yuval13c54772017-06-09 17:13:20 +03001540 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
Sudarsana Reddy Kallurucac6f692018-05-05 18:43:02 -07001541 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
1542 qed_llh_add_protocol_filter(p_hwfn, p_ptt,
1543 ETH_P_FCOE, 0,
1544 QED_LLH_FILTER_ETHERTYPE);
Rahul Verma15582962017-04-06 15:58:29 +03001545 qed_llh_add_protocol_filter(p_hwfn, p_ptt,
Sudarsana Reddy Kallurucac6f692018-05-05 18:43:02 -07001546 ETH_P_FIP, 0,
Arun Easi1e128c82017-02-15 06:28:22 -08001547 QED_LLH_FILTER_ETHERTYPE);
1548 }
1549
Rahul Verma15582962017-04-06 15:58:29 +03001550out:
1551 qed_ptt_release(p_hwfn, p_ptt);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001552 return rc;
1553}
1554
1555static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn,
1556 struct qed_ll2_rx_queue *p_rx,
1557 struct qed_ll2_rx_packet *p_curp)
1558{
1559 struct qed_ll2_rx_packet *p_posting_packet = NULL;
1560 struct core_ll2_rx_prod rx_prod = { 0, 0, 0 };
1561 bool b_notify_fw = false;
1562 u16 bd_prod, cq_prod;
1563
1564 /* This handles the flushing of already posted buffers */
1565 while (!list_empty(&p_rx->posting_descq)) {
1566 p_posting_packet = list_first_entry(&p_rx->posting_descq,
1567 struct qed_ll2_rx_packet,
1568 list_entry);
Wei Yongjunb4f0fd42016-10-17 15:17:51 +00001569 list_move_tail(&p_posting_packet->list_entry,
1570 &p_rx->active_descq);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001571 b_notify_fw = true;
1572 }
1573
1574 /* This handles the supplied packet [if there is one] */
1575 if (p_curp) {
1576 list_add_tail(&p_curp->list_entry, &p_rx->active_descq);
1577 b_notify_fw = true;
1578 }
1579
1580 if (!b_notify_fw)
1581 return;
1582
1583 bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain);
1584 cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain);
1585 rx_prod.bd_prod = cpu_to_le16(bd_prod);
1586 rx_prod.cqe_prod = cpu_to_le16(cq_prod);
1587 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod));
1588}
1589
Michal Kalderon0518c122017-06-09 17:13:22 +03001590int qed_ll2_post_rx_buffer(void *cxt,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001591 u8 connection_handle,
1592 dma_addr_t addr,
1593 u16 buf_len, void *cookie, u8 notify_fw)
1594{
Michal Kalderon0518c122017-06-09 17:13:22 +03001595 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001596 struct core_rx_bd_with_buff_len *p_curb = NULL;
1597 struct qed_ll2_rx_packet *p_curp = NULL;
1598 struct qed_ll2_info *p_ll2_conn;
1599 struct qed_ll2_rx_queue *p_rx;
1600 unsigned long flags;
1601 void *p_data;
1602 int rc = 0;
1603
1604 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1605 if (!p_ll2_conn)
1606 return -EINVAL;
1607 p_rx = &p_ll2_conn->rx_queue;
1608
1609 spin_lock_irqsave(&p_rx->lock, flags);
1610 if (!list_empty(&p_rx->free_descq))
1611 p_curp = list_first_entry(&p_rx->free_descq,
1612 struct qed_ll2_rx_packet, list_entry);
1613 if (p_curp) {
1614 if (qed_chain_get_elem_left(&p_rx->rxq_chain) &&
1615 qed_chain_get_elem_left(&p_rx->rcq_chain)) {
1616 p_data = qed_chain_produce(&p_rx->rxq_chain);
1617 p_curb = (struct core_rx_bd_with_buff_len *)p_data;
1618 qed_chain_produce(&p_rx->rcq_chain);
1619 }
1620 }
1621
1622 /* If we're lacking entires, let's try to flush buffers to FW */
1623 if (!p_curp || !p_curb) {
1624 rc = -EBUSY;
1625 p_curp = NULL;
1626 goto out_notify;
1627 }
1628
1629 /* We have an Rx packet we can fill */
1630 DMA_REGPAIR_LE(p_curb->addr, addr);
1631 p_curb->buff_length = cpu_to_le16(buf_len);
1632 p_curp->rx_buf_addr = addr;
1633 p_curp->cookie = cookie;
1634 p_curp->rxq_bd = p_curb;
1635 p_curp->buf_length = buf_len;
1636 list_del(&p_curp->list_entry);
1637
1638 /* Check if we only want to enqueue this packet without informing FW */
1639 if (!notify_fw) {
1640 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq);
1641 goto out;
1642 }
1643
1644out_notify:
1645 qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp);
1646out:
1647 spin_unlock_irqrestore(&p_rx->lock, flags);
1648 return rc;
1649}
1650
1651static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn,
1652 struct qed_ll2_tx_queue *p_tx,
1653 struct qed_ll2_tx_packet *p_curp,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001654 struct qed_ll2_tx_pkt_info *pkt,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001655 u8 notify_fw)
1656{
1657 list_del(&p_curp->list_entry);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001658 p_curp->cookie = pkt->cookie;
1659 p_curp->bd_used = pkt->num_of_bds;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001660 p_curp->notify_fw = notify_fw;
1661 p_tx->cur_send_packet = p_curp;
1662 p_tx->cur_send_frag_num = 0;
1663
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001664 p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag;
1665 p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001666 p_tx->cur_send_frag_num++;
1667}
1668
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001669static void
1670qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn,
1671 struct qed_ll2_info *p_ll2,
1672 struct qed_ll2_tx_packet *p_curp,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001673 struct qed_ll2_tx_pkt_info *pkt)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001674{
1675 struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain;
1676 u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain);
1677 struct core_tx_bd *start_bd = NULL;
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001678 enum core_roce_flavor_type roce_flavor;
1679 enum core_tx_dest tx_dest;
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001680 u16 bd_data = 0, frag_idx;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001681
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001682 roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE
1683 : CORE_RROCE;
1684
Michal Kalderon77caa792017-10-09 12:37:45 +03001685 switch (pkt->tx_dest) {
1686 case QED_LL2_TX_DEST_NW:
1687 tx_dest = CORE_TX_DEST_NW;
1688 break;
1689 case QED_LL2_TX_DEST_LB:
1690 tx_dest = CORE_TX_DEST_LB;
1691 break;
1692 case QED_LL2_TX_DEST_DROP:
1693 tx_dest = CORE_TX_DEST_DROP;
1694 break;
1695 default:
1696 tx_dest = CORE_TX_DEST_LB;
1697 break;
1698 }
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001699
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001700 start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
Michal Kalderon89d65112017-10-09 12:37:47 +03001701 if (QED_IS_IWARP_PERSONALITY(p_hwfn) &&
Sudarsana Reddy Kallurucac6f692018-05-05 18:43:02 -07001702 p_ll2->input.conn_type == QED_LL2_TYPE_OOO) {
Michal Kalderon89d65112017-10-09 12:37:47 +03001703 start_bd->nw_vlan_or_lb_echo =
1704 cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE);
Sudarsana Reddy Kallurucac6f692018-05-05 18:43:02 -07001705 } else {
Michal Kalderon89d65112017-10-09 12:37:47 +03001706 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan);
Sudarsana Reddy Kallurucac6f692018-05-05 18:43:02 -07001707 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
1708 p_ll2->input.conn_type == QED_LL2_TYPE_FCOE)
1709 pkt->remove_stag = true;
1710 }
1711
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001712 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001713 cpu_to_le16(pkt->l4_hdr_offset_w));
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001714 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001715 bd_data |= pkt->bd_flags;
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001716 SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001717 SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds);
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001718 SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor);
Michal Kalderon6df60fe2017-10-09 12:37:46 +03001719 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum));
1720 SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum));
1721 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len));
Sudarsana Reddy Kallurucac6f692018-05-05 18:43:02 -07001722 SET_FIELD(bd_data, CORE_TX_BD_DATA_DISABLE_STAG_INSERTION,
1723 !!(pkt->remove_stag));
1724
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001725 start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001726 DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag);
1727 start_bd->nbytes = cpu_to_le16(pkt->first_frag_len);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001728
1729 DP_VERBOSE(p_hwfn,
1730 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1731 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n",
1732 p_ll2->queue_id,
1733 p_ll2->cid,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001734 p_ll2->input.conn_type,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001735 prod_idx,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001736 pkt->first_frag_len,
1737 pkt->num_of_bds,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001738 le32_to_cpu(start_bd->addr.hi),
1739 le32_to_cpu(start_bd->addr.lo));
1740
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001741 if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001742 return;
1743
1744 /* Need to provide the packet with additional BDs for frags */
1745 for (frag_idx = p_ll2->tx_queue.cur_send_frag_num;
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001746 frag_idx < pkt->num_of_bds; frag_idx++) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001747 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd;
1748
1749 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001750 (*p_bd)->bd_data.as_bitfield = 0;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001751 (*p_bd)->bitfield1 = 0;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001752 p_curp->bds_set[frag_idx].tx_frag = 0;
1753 p_curp->bds_set[frag_idx].frag_len = 0;
1754 }
1755}
1756
1757/* This should be called while the Txq spinlock is being held */
1758static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn,
1759 struct qed_ll2_info *p_ll2_conn)
1760{
1761 bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw;
1762 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1763 struct qed_ll2_tx_packet *p_pkt = NULL;
1764 struct core_db_data db_msg = { 0, 0, 0 };
1765 u16 bd_prod;
1766
1767 /* If there are missing BDs, don't do anything now */
1768 if (p_ll2_conn->tx_queue.cur_send_frag_num !=
1769 p_ll2_conn->tx_queue.cur_send_packet->bd_used)
1770 return;
1771
1772 /* Push the current packet to the list and clean after it */
1773 list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry,
1774 &p_ll2_conn->tx_queue.sending_descq);
1775 p_ll2_conn->tx_queue.cur_send_packet = NULL;
1776 p_ll2_conn->tx_queue.cur_send_frag_num = 0;
1777
1778 /* Notify FW of packet only if requested to */
1779 if (!b_notify)
1780 return;
1781
1782 bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain);
1783
1784 while (!list_empty(&p_tx->sending_descq)) {
1785 p_pkt = list_first_entry(&p_tx->sending_descq,
1786 struct qed_ll2_tx_packet, list_entry);
1787 if (!p_pkt)
1788 break;
1789
Wei Yongjunb4f0fd42016-10-17 15:17:51 +00001790 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001791 }
1792
1793 SET_FIELD(db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
1794 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
1795 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_VAL_SEL,
1796 DQ_XCM_CORE_TX_BD_PROD_CMD);
1797 db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
1798 db_msg.spq_prod = cpu_to_le16(bd_prod);
1799
1800 /* Make sure the BDs data is updated before ringing the doorbell */
1801 wmb();
1802
1803 DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&db_msg));
1804
1805 DP_VERBOSE(p_hwfn,
1806 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1807 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n",
1808 p_ll2_conn->queue_id,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001809 p_ll2_conn->cid,
1810 p_ll2_conn->input.conn_type, db_msg.spq_prod);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001811}
1812
Michal Kalderon0518c122017-06-09 17:13:22 +03001813int qed_ll2_prepare_tx_packet(void *cxt,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001814 u8 connection_handle,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001815 struct qed_ll2_tx_pkt_info *pkt,
1816 bool notify_fw)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001817{
Michal Kalderon0518c122017-06-09 17:13:22 +03001818 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001819 struct qed_ll2_tx_packet *p_curp = NULL;
1820 struct qed_ll2_info *p_ll2_conn = NULL;
1821 struct qed_ll2_tx_queue *p_tx;
1822 struct qed_chain *p_tx_chain;
1823 unsigned long flags;
1824 int rc = 0;
1825
1826 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1827 if (!p_ll2_conn)
1828 return -EINVAL;
1829 p_tx = &p_ll2_conn->tx_queue;
1830 p_tx_chain = &p_tx->txq_chain;
1831
Michal Kalderonf5823fe2017-10-09 12:37:43 +03001832 if (pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001833 return -EIO;
1834
1835 spin_lock_irqsave(&p_tx->lock, flags);
1836 if (p_tx->cur_send_packet) {
1837 rc = -EEXIST;
1838 goto out;
1839 }
1840
1841 /* Get entry, but only if we have tx elements for it */
1842 if (!list_empty(&p_tx->free_descq))
1843 p_curp = list_first_entry(&p_tx->free_descq,
1844 struct qed_ll2_tx_packet, list_entry);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001845 if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001846 p_curp = NULL;
1847
1848 if (!p_curp) {
1849 rc = -EBUSY;
1850 goto out;
1851 }
1852
1853 /* Prepare packet and BD, and perhaps send a doorbell to FW */
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001854 qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw);
1855
1856 qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001857
1858 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
1859
1860out:
1861 spin_unlock_irqrestore(&p_tx->lock, flags);
1862 return rc;
1863}
1864
Michal Kalderon0518c122017-06-09 17:13:22 +03001865int qed_ll2_set_fragment_of_tx_packet(void *cxt,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001866 u8 connection_handle,
1867 dma_addr_t addr, u16 nbytes)
1868{
1869 struct qed_ll2_tx_packet *p_cur_send_packet = NULL;
Michal Kalderon0518c122017-06-09 17:13:22 +03001870 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001871 struct qed_ll2_info *p_ll2_conn = NULL;
1872 u16 cur_send_frag_num = 0;
1873 struct core_tx_bd *p_bd;
1874 unsigned long flags;
1875
1876 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1877 if (!p_ll2_conn)
1878 return -EINVAL;
1879
1880 if (!p_ll2_conn->tx_queue.cur_send_packet)
1881 return -EINVAL;
1882
1883 p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet;
1884 cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num;
1885
1886 if (cur_send_frag_num >= p_cur_send_packet->bd_used)
1887 return -EINVAL;
1888
1889 /* Fill the BD information, and possibly notify FW */
1890 p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd;
1891 DMA_REGPAIR_LE(p_bd->addr, addr);
1892 p_bd->nbytes = cpu_to_le16(nbytes);
1893 p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr;
1894 p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes;
1895
1896 p_ll2_conn->tx_queue.cur_send_frag_num++;
1897
1898 spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags);
1899 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
1900 spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags);
1901
1902 return 0;
1903}
1904
Michal Kalderon0518c122017-06-09 17:13:22 +03001905int qed_ll2_terminate_connection(void *cxt, u8 connection_handle)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001906{
Michal Kalderon0518c122017-06-09 17:13:22 +03001907 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001908 struct qed_ll2_info *p_ll2_conn = NULL;
1909 int rc = -EINVAL;
Rahul Verma15582962017-04-06 15:58:29 +03001910 struct qed_ptt *p_ptt;
1911
1912 p_ptt = qed_ptt_acquire(p_hwfn);
1913 if (!p_ptt)
1914 return -EAGAIN;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001915
1916 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
Rahul Verma15582962017-04-06 15:58:29 +03001917 if (!p_ll2_conn) {
1918 rc = -EINVAL;
1919 goto out;
1920 }
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001921
1922 /* Stop Tx & Rx of connection, if needed */
1923 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
Michal Kalderonfc16f562018-05-16 14:44:40 +03001924 p_ll2_conn->tx_queue.b_cb_registred = false;
1925 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001926 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn);
1927 if (rc)
Rahul Verma15582962017-04-06 15:58:29 +03001928 goto out;
Michal Kalderonfc16f562018-05-16 14:44:40 +03001929
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001930 qed_ll2_txq_flush(p_hwfn, connection_handle);
Michal Kalderonfc16f562018-05-16 14:44:40 +03001931 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001932 }
1933
1934 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
Michal Kalderonfc16f562018-05-16 14:44:40 +03001935 p_ll2_conn->rx_queue.b_cb_registred = false;
1936 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001937 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn);
1938 if (rc)
Rahul Verma15582962017-04-06 15:58:29 +03001939 goto out;
Michal Kalderonfc16f562018-05-16 14:44:40 +03001940
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001941 qed_ll2_rxq_flush(p_hwfn, connection_handle);
Michal Kalderonfc16f562018-05-16 14:44:40 +03001942 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001943 }
1944
Kalderon, Michal526d1d02017-07-02 10:29:23 +03001945 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001946 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1947
Mintz, Yuval13c54772017-06-09 17:13:20 +03001948 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
Sudarsana Reddy Kallurucac6f692018-05-05 18:43:02 -07001949 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
1950 qed_llh_remove_protocol_filter(p_hwfn, p_ptt,
1951 ETH_P_FCOE, 0,
1952 QED_LLH_FILTER_ETHERTYPE);
Rahul Verma15582962017-04-06 15:58:29 +03001953 qed_llh_remove_protocol_filter(p_hwfn, p_ptt,
Sudarsana Reddy Kallurucac6f692018-05-05 18:43:02 -07001954 ETH_P_FIP, 0,
Arun Easi1e128c82017-02-15 06:28:22 -08001955 QED_LLH_FILTER_ETHERTYPE);
1956 }
1957
Rahul Verma15582962017-04-06 15:58:29 +03001958out:
1959 qed_ptt_release(p_hwfn, p_ptt);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001960 return rc;
1961}
1962
Mintz, Yuval58de2892017-06-09 17:13:21 +03001963static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn,
1964 struct qed_ll2_info *p_ll2_conn)
1965{
1966 struct qed_ooo_buffer *p_buffer;
1967
Kalderon, Michal526d1d02017-07-02 10:29:23 +03001968 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
Mintz, Yuval58de2892017-06-09 17:13:21 +03001969 return;
1970
1971 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1972 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
1973 p_hwfn->p_ooo_info))) {
1974 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
1975 p_buffer->rx_buffer_size,
1976 p_buffer->rx_buffer_virt_addr,
1977 p_buffer->rx_buffer_phys_addr);
1978 kfree(p_buffer);
1979 }
1980}
Michal Kalderon0518c122017-06-09 17:13:22 +03001981
1982void qed_ll2_release_connection(void *cxt, u8 connection_handle)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001983{
Michal Kalderon0518c122017-06-09 17:13:22 +03001984 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001985 struct qed_ll2_info *p_ll2_conn = NULL;
1986
1987 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1988 if (!p_ll2_conn)
1989 return;
1990
Michal Kalderonf5823fe2017-10-09 12:37:43 +03001991 kfree(p_ll2_conn->tx_queue.descq_mem);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001992 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain);
1993
1994 kfree(p_ll2_conn->rx_queue.descq_array);
1995 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain);
1996 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain);
1997
1998 qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid);
1999
Yuval Mintz1d6cff42016-12-01 00:21:07 -08002000 qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn);
2001
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002002 mutex_lock(&p_ll2_conn->mutex);
2003 p_ll2_conn->b_active = false;
2004 mutex_unlock(&p_ll2_conn->mutex);
2005}
2006
Tomer Tayar3587cb82017-05-21 12:10:56 +03002007int qed_ll2_alloc(struct qed_hwfn *p_hwfn)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002008{
2009 struct qed_ll2_info *p_ll2_connections;
2010 u8 i;
2011
2012 /* Allocate LL2's set struct */
2013 p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS,
2014 sizeof(struct qed_ll2_info), GFP_KERNEL);
2015 if (!p_ll2_connections) {
2016 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n");
Tomer Tayar3587cb82017-05-21 12:10:56 +03002017 return -ENOMEM;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002018 }
2019
2020 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
2021 p_ll2_connections[i].my_id = i;
2022
Tomer Tayar3587cb82017-05-21 12:10:56 +03002023 p_hwfn->p_ll2_info = p_ll2_connections;
2024 return 0;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002025}
2026
Tomer Tayar3587cb82017-05-21 12:10:56 +03002027void qed_ll2_setup(struct qed_hwfn *p_hwfn)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002028{
2029 int i;
2030
2031 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
Tomer Tayar3587cb82017-05-21 12:10:56 +03002032 mutex_init(&p_hwfn->p_ll2_info[i].mutex);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002033}
2034
Tomer Tayar3587cb82017-05-21 12:10:56 +03002035void qed_ll2_free(struct qed_hwfn *p_hwfn)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002036{
Tomer Tayar3587cb82017-05-21 12:10:56 +03002037 if (!p_hwfn->p_ll2_info)
2038 return;
2039
2040 kfree(p_hwfn->p_ll2_info);
2041 p_hwfn->p_ll2_info = NULL;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002042}
2043
Mintz, Yuvalfef1c3f2017-06-09 17:13:25 +03002044static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn,
2045 struct qed_ptt *p_ptt,
2046 struct qed_ll2_stats *p_stats)
2047{
2048 struct core_ll2_port_stats port_stats;
2049
2050 memset(&port_stats, 0, sizeof(port_stats));
2051 qed_memcpy_from(p_hwfn, p_ptt, &port_stats,
2052 BAR0_MAP_REG_TSDM_RAM +
2053 TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)),
2054 sizeof(port_stats));
2055
2056 p_stats->gsi_invalid_hdr = HILO_64_REGPAIR(port_stats.gsi_invalid_hdr);
2057 p_stats->gsi_invalid_pkt_length =
2058 HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length);
2059 p_stats->gsi_unsupported_pkt_typ =
2060 HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ);
2061 p_stats->gsi_crcchksm_error =
2062 HILO_64_REGPAIR(port_stats.gsi_crcchksm_error);
2063}
2064
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002065static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn,
2066 struct qed_ptt *p_ptt,
2067 struct qed_ll2_info *p_ll2_conn,
2068 struct qed_ll2_stats *p_stats)
2069{
2070 struct core_ll2_tstorm_per_queue_stat tstats;
2071 u8 qid = p_ll2_conn->queue_id;
2072 u32 tstats_addr;
2073
2074 memset(&tstats, 0, sizeof(tstats));
2075 tstats_addr = BAR0_MAP_REG_TSDM_RAM +
2076 CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid);
2077 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
2078
2079 p_stats->packet_too_big_discard =
2080 HILO_64_REGPAIR(tstats.packet_too_big_discard);
2081 p_stats->no_buff_discard = HILO_64_REGPAIR(tstats.no_buff_discard);
2082}
2083
2084static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn,
2085 struct qed_ptt *p_ptt,
2086 struct qed_ll2_info *p_ll2_conn,
2087 struct qed_ll2_stats *p_stats)
2088{
2089 struct core_ll2_ustorm_per_queue_stat ustats;
2090 u8 qid = p_ll2_conn->queue_id;
2091 u32 ustats_addr;
2092
2093 memset(&ustats, 0, sizeof(ustats));
2094 ustats_addr = BAR0_MAP_REG_USDM_RAM +
2095 CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid);
2096 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats));
2097
2098 p_stats->rcv_ucast_bytes = HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
2099 p_stats->rcv_mcast_bytes = HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
2100 p_stats->rcv_bcast_bytes = HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
2101 p_stats->rcv_ucast_pkts = HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
2102 p_stats->rcv_mcast_pkts = HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
2103 p_stats->rcv_bcast_pkts = HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
2104}
2105
2106static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn,
2107 struct qed_ptt *p_ptt,
2108 struct qed_ll2_info *p_ll2_conn,
2109 struct qed_ll2_stats *p_stats)
2110{
2111 struct core_ll2_pstorm_per_queue_stat pstats;
2112 u8 stats_id = p_ll2_conn->tx_stats_id;
2113 u32 pstats_addr;
2114
2115 memset(&pstats, 0, sizeof(pstats));
2116 pstats_addr = BAR0_MAP_REG_PSDM_RAM +
2117 CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id);
2118 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
2119
2120 p_stats->sent_ucast_bytes = HILO_64_REGPAIR(pstats.sent_ucast_bytes);
2121 p_stats->sent_mcast_bytes = HILO_64_REGPAIR(pstats.sent_mcast_bytes);
2122 p_stats->sent_bcast_bytes = HILO_64_REGPAIR(pstats.sent_bcast_bytes);
2123 p_stats->sent_ucast_pkts = HILO_64_REGPAIR(pstats.sent_ucast_pkts);
2124 p_stats->sent_mcast_pkts = HILO_64_REGPAIR(pstats.sent_mcast_pkts);
2125 p_stats->sent_bcast_pkts = HILO_64_REGPAIR(pstats.sent_bcast_pkts);
2126}
2127
Michal Kalderon0518c122017-06-09 17:13:22 +03002128int qed_ll2_get_stats(void *cxt,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002129 u8 connection_handle, struct qed_ll2_stats *p_stats)
2130{
Michal Kalderon0518c122017-06-09 17:13:22 +03002131 struct qed_hwfn *p_hwfn = cxt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002132 struct qed_ll2_info *p_ll2_conn = NULL;
2133 struct qed_ptt *p_ptt;
2134
2135 memset(p_stats, 0, sizeof(*p_stats));
2136
2137 if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) ||
2138 !p_hwfn->p_ll2_info)
2139 return -EINVAL;
2140
2141 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
2142
2143 p_ptt = qed_ptt_acquire(p_hwfn);
2144 if (!p_ptt) {
2145 DP_ERR(p_hwfn, "Failed to acquire ptt\n");
2146 return -EINVAL;
2147 }
2148
Mintz, Yuvalfef1c3f2017-06-09 17:13:25 +03002149 if (p_ll2_conn->input.gsi_enable)
2150 _qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002151 _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2152 _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2153 if (p_ll2_conn->tx_stats_en)
2154 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2155
2156 qed_ptt_release(p_hwfn, p_ptt);
2157 return 0;
2158}
2159
Michal Kalderon0518c122017-06-09 17:13:22 +03002160static void qed_ll2b_release_rx_packet(void *cxt,
2161 u8 connection_handle,
2162 void *cookie,
2163 dma_addr_t rx_buf_addr,
2164 bool b_last_packet)
2165{
2166 struct qed_hwfn *p_hwfn = cxt;
2167
2168 qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie);
2169}
2170
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002171static void qed_ll2_register_cb_ops(struct qed_dev *cdev,
2172 const struct qed_ll2_cb_ops *ops,
2173 void *cookie)
2174{
2175 cdev->ll2->cbs = ops;
2176 cdev->ll2->cb_cookie = cookie;
2177}
2178
Michal Kalderon0518c122017-06-09 17:13:22 +03002179struct qed_ll2_cbs ll2_cbs = {
2180 .rx_comp_cb = &qed_ll2b_complete_rx_packet,
2181 .rx_release_cb = &qed_ll2b_release_rx_packet,
2182 .tx_comp_cb = &qed_ll2b_complete_tx_packet,
2183 .tx_release_cb = &qed_ll2b_complete_tx_packet,
2184};
2185
Mintz, Yuval13c54772017-06-09 17:13:20 +03002186static void qed_ll2_set_conn_data(struct qed_dev *cdev,
2187 struct qed_ll2_acquire_data *data,
2188 struct qed_ll2_params *params,
2189 enum qed_ll2_conn_type conn_type,
Michal Kalderon0518c122017-06-09 17:13:22 +03002190 u8 *handle, bool lb)
Mintz, Yuval13c54772017-06-09 17:13:20 +03002191{
2192 memset(data, 0, sizeof(*data));
2193
2194 data->input.conn_type = conn_type;
2195 data->input.mtu = params->mtu;
2196 data->input.rx_num_desc = QED_LL2_RX_SIZE;
2197 data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets;
2198 data->input.rx_vlan_removal_en = params->rx_vlan_stripping;
2199 data->input.tx_num_desc = QED_LL2_TX_SIZE;
Mintz, Yuval13c54772017-06-09 17:13:20 +03002200 data->p_connection_handle = handle;
Michal Kalderon0518c122017-06-09 17:13:22 +03002201 data->cbs = &ll2_cbs;
2202 ll2_cbs.cookie = QED_LEADING_HWFN(cdev);
2203
Mintz, Yuval13c54772017-06-09 17:13:20 +03002204 if (lb) {
Kalderon, Michal526d1d02017-07-02 10:29:23 +03002205 data->input.tx_tc = PKT_LB_TC;
Mintz, Yuval13c54772017-06-09 17:13:20 +03002206 data->input.tx_dest = QED_LL2_TX_DEST_LB;
2207 } else {
2208 data->input.tx_tc = 0;
2209 data->input.tx_dest = QED_LL2_TX_DEST_NW;
2210 }
2211}
2212
2213static int qed_ll2_start_ooo(struct qed_dev *cdev,
2214 struct qed_ll2_params *params)
2215{
2216 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2217 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
2218 struct qed_ll2_acquire_data data;
2219 int rc;
2220
2221 qed_ll2_set_conn_data(cdev, &data, params,
Kalderon, Michal526d1d02017-07-02 10:29:23 +03002222 QED_LL2_TYPE_OOO, handle, true);
Mintz, Yuval13c54772017-06-09 17:13:20 +03002223
2224 rc = qed_ll2_acquire_connection(hwfn, &data);
2225 if (rc) {
2226 DP_INFO(cdev, "Failed to acquire LL2 OOO connection\n");
2227 goto out;
2228 }
2229
2230 rc = qed_ll2_establish_connection(hwfn, *handle);
2231 if (rc) {
2232 DP_INFO(cdev, "Failed to establist LL2 OOO connection\n");
2233 goto fail;
2234 }
2235
2236 return 0;
2237
2238fail:
2239 qed_ll2_release_connection(hwfn, *handle);
2240out:
2241 *handle = QED_LL2_UNUSED_HANDLE;
2242 return rc;
2243}
2244
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002245static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params)
2246{
Wei Yongjun88a24282016-10-10 14:08:28 +00002247 struct qed_ll2_buffer *buffer, *tmp_buffer;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002248 enum qed_ll2_conn_type conn_type;
Mintz, Yuval13c54772017-06-09 17:13:20 +03002249 struct qed_ll2_acquire_data data;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002250 struct qed_ptt *p_ptt;
2251 int rc, i;
Michal Kalderon0518c122017-06-09 17:13:22 +03002252
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002253
2254 /* Initialize LL2 locks & lists */
2255 INIT_LIST_HEAD(&cdev->ll2->list);
2256 spin_lock_init(&cdev->ll2->lock);
2257 cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN +
2258 L1_CACHE_BYTES + params->mtu;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002259
2260 /*Allocate memory for LL2 */
2261 DP_INFO(cdev, "Allocating LL2 buffers of size %08x bytes\n",
2262 cdev->ll2->rx_size);
2263 for (i = 0; i < QED_LL2_RX_SIZE; i++) {
2264 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
2265 if (!buffer) {
2266 DP_INFO(cdev, "Failed to allocate LL2 buffers\n");
2267 goto fail;
2268 }
2269
2270 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data,
2271 &buffer->phys_addr);
2272 if (rc) {
2273 kfree(buffer);
2274 goto fail;
2275 }
2276
2277 list_add_tail(&buffer->list, &cdev->ll2->list);
2278 }
2279
2280 switch (QED_LEADING_HWFN(cdev)->hw_info.personality) {
Arun Easi1e128c82017-02-15 06:28:22 -08002281 case QED_PCI_FCOE:
2282 conn_type = QED_LL2_TYPE_FCOE;
Arun Easi1e128c82017-02-15 06:28:22 -08002283 break;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002284 case QED_PCI_ISCSI:
2285 conn_type = QED_LL2_TYPE_ISCSI;
2286 break;
2287 case QED_PCI_ETH_ROCE:
2288 conn_type = QED_LL2_TYPE_ROCE;
2289 break;
2290 default:
2291 conn_type = QED_LL2_TYPE_TEST;
2292 }
2293
Mintz, Yuval13c54772017-06-09 17:13:20 +03002294 qed_ll2_set_conn_data(cdev, &data, params, conn_type,
Michal Kalderon0518c122017-06-09 17:13:22 +03002295 &cdev->ll2->handle, false);
Arnd Bergmann0629a332017-01-18 15:52:52 +01002296
Mintz, Yuval13c54772017-06-09 17:13:20 +03002297 rc = qed_ll2_acquire_connection(QED_LEADING_HWFN(cdev), &data);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002298 if (rc) {
2299 DP_INFO(cdev, "Failed to acquire LL2 connection\n");
2300 goto fail;
2301 }
2302
2303 rc = qed_ll2_establish_connection(QED_LEADING_HWFN(cdev),
2304 cdev->ll2->handle);
2305 if (rc) {
2306 DP_INFO(cdev, "Failed to establish LL2 connection\n");
2307 goto release_fail;
2308 }
2309
2310 /* Post all Rx buffers to FW */
2311 spin_lock_bh(&cdev->ll2->lock);
Wei Yongjun88a24282016-10-10 14:08:28 +00002312 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002313 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev),
2314 cdev->ll2->handle,
2315 buffer->phys_addr, 0, buffer, 1);
2316 if (rc) {
2317 DP_INFO(cdev,
2318 "Failed to post an Rx buffer; Deleting it\n");
2319 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
2320 cdev->ll2->rx_size, DMA_FROM_DEVICE);
2321 kfree(buffer->data);
2322 list_del(&buffer->list);
2323 kfree(buffer);
2324 } else {
2325 cdev->ll2->rx_cnt++;
2326 }
2327 }
2328 spin_unlock_bh(&cdev->ll2->lock);
2329
2330 if (!cdev->ll2->rx_cnt) {
2331 DP_INFO(cdev, "Failed passing even a single Rx buffer\n");
2332 goto release_terminate;
2333 }
2334
2335 if (!is_valid_ether_addr(params->ll2_mac_address)) {
2336 DP_INFO(cdev, "Invalid Ethernet address\n");
2337 goto release_terminate;
2338 }
2339
Tomer Tayarda090912017-12-27 19:30:07 +02002340 if (QED_LEADING_HWFN(cdev)->hw_info.personality == QED_PCI_ISCSI) {
Yuval Mintz1d6cff42016-12-01 00:21:07 -08002341 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n");
2342 rc = qed_ll2_start_ooo(cdev, params);
2343 if (rc) {
2344 DP_INFO(cdev,
2345 "Failed to initialize the OOO LL2 queue\n");
2346 goto release_terminate;
2347 }
2348 }
2349
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002350 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
2351 if (!p_ptt) {
2352 DP_INFO(cdev, "Failed to acquire PTT\n");
2353 goto release_terminate;
2354 }
2355
2356 rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
2357 params->ll2_mac_address);
2358 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
2359 if (rc) {
2360 DP_ERR(cdev, "Failed to allocate LLH filter\n");
2361 goto release_terminate_all;
2362 }
2363
2364 ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002365 return 0;
2366
2367release_terminate_all:
2368
2369release_terminate:
2370 qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2371release_fail:
2372 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2373fail:
2374 qed_ll2_kill_buffers(cdev);
2375 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2376 return -EINVAL;
2377}
2378
2379static int qed_ll2_stop(struct qed_dev *cdev)
2380{
2381 struct qed_ptt *p_ptt;
2382 int rc;
2383
2384 if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE)
2385 return 0;
2386
2387 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
2388 if (!p_ptt) {
2389 DP_INFO(cdev, "Failed to acquire PTT\n");
2390 goto fail;
2391 }
2392
2393 qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
2394 cdev->ll2_mac_address);
2395 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
2396 eth_zero_addr(cdev->ll2_mac_address);
2397
Tomer Tayarda090912017-12-27 19:30:07 +02002398 if (QED_LEADING_HWFN(cdev)->hw_info.personality == QED_PCI_ISCSI)
Yuval Mintz1d6cff42016-12-01 00:21:07 -08002399 qed_ll2_stop_ooo(cdev);
2400
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002401 rc = qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev),
2402 cdev->ll2->handle);
2403 if (rc)
2404 DP_INFO(cdev, "Failed to terminate LL2 connection\n");
2405
2406 qed_ll2_kill_buffers(cdev);
2407
2408 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2409 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2410
2411 return rc;
2412fail:
2413 return -EINVAL;
2414}
2415
Sudarsana Reddy Kallurucac6f692018-05-05 18:43:02 -07002416static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb,
2417 unsigned long xmit_flags)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002418{
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03002419 struct qed_ll2_tx_pkt_info pkt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002420 const skb_frag_t *frag;
2421 int rc = -EINVAL, i;
2422 dma_addr_t mapping;
2423 u16 vlan = 0;
2424 u8 flags = 0;
2425
2426 if (unlikely(skb->ip_summed != CHECKSUM_NONE)) {
Colin Ian Kingff81de72018-04-28 10:43:20 +01002427 DP_INFO(cdev, "Cannot transmit a checksummed packet\n");
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002428 return -EINVAL;
2429 }
2430
2431 if (1 + skb_shinfo(skb)->nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) {
2432 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n",
2433 1 + skb_shinfo(skb)->nr_frags);
2434 return -EINVAL;
2435 }
2436
2437 mapping = dma_map_single(&cdev->pdev->dev, skb->data,
2438 skb->len, DMA_TO_DEVICE);
2439 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2440 DP_NOTICE(cdev, "SKB mapping failed\n");
2441 return -EINVAL;
2442 }
2443
2444 /* Request HW to calculate IP csum */
2445 if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) &&
2446 ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02002447 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002448
2449 if (skb_vlan_tag_present(skb)) {
2450 vlan = skb_vlan_tag_get(skb);
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02002451 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002452 }
2453
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03002454 memset(&pkt, 0, sizeof(pkt));
2455 pkt.num_of_bds = 1 + skb_shinfo(skb)->nr_frags;
2456 pkt.vlan = vlan;
2457 pkt.bd_flags = flags;
2458 pkt.tx_dest = QED_LL2_TX_DEST_NW;
2459 pkt.first_frag = mapping;
2460 pkt.first_frag_len = skb->len;
2461 pkt.cookie = skb;
Sudarsana Reddy Kallurucac6f692018-05-05 18:43:02 -07002462 if (test_bit(QED_MF_UFP_SPECIFIC, &cdev->mf_bits) &&
2463 test_bit(QED_LL2_XMIT_FLAGS_FIP_DISCOVERY, &xmit_flags))
2464 pkt.remove_stag = true;
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03002465
2466 rc = qed_ll2_prepare_tx_packet(&cdev->hwfns[0], cdev->ll2->handle,
2467 &pkt, 1);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002468 if (rc)
2469 goto err;
2470
2471 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2472 frag = &skb_shinfo(skb)->frags[i];
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002473
Mintz, Yuvald2201a22017-06-09 17:13:23 +03002474 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0,
2475 skb_frag_size(frag), DMA_TO_DEVICE);
2476
2477 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2478 DP_NOTICE(cdev,
2479 "Unable to map frag - dropping packet\n");
2480 goto err;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002481 }
2482
2483 rc = qed_ll2_set_fragment_of_tx_packet(QED_LEADING_HWFN(cdev),
2484 cdev->ll2->handle,
2485 mapping,
2486 skb_frag_size(frag));
2487
2488 /* if failed not much to do here, partial packet has been posted
2489 * we can't free memory, will need to wait for completion.
2490 */
2491 if (rc)
2492 goto err2;
2493 }
2494
2495 return 0;
2496
2497err:
2498 dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE);
2499
2500err2:
2501 return rc;
2502}
2503
2504static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats)
2505{
2506 if (!cdev->ll2)
2507 return -EINVAL;
2508
2509 return qed_ll2_get_stats(QED_LEADING_HWFN(cdev),
2510 cdev->ll2->handle, stats);
2511}
2512
2513const struct qed_ll2_ops qed_ll2_ops_pass = {
2514 .start = &qed_ll2_start,
2515 .stop = &qed_ll2_stop,
2516 .start_xmit = &qed_ll2_start_xmit,
2517 .register_cb_ops = &qed_ll2_register_cb_ops,
2518 .get_stats = &qed_ll2_stats,
2519};
2520
2521int qed_ll2_alloc_if(struct qed_dev *cdev)
2522{
2523 cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL);
2524 return cdev->ll2 ? 0 : -ENOMEM;
2525}
2526
2527void qed_ll2_dealloc_if(struct qed_dev *cdev)
2528{
2529 kfree(cdev->ll2);
2530 cdev->ll2 = NULL;
2531}