Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Broadcom NetXtreme-E RoCE driver. |
| 3 | * |
| 4 | * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term |
| 5 | * Broadcom refers to Broadcom Limited and/or its subsidiaries. |
| 6 | * |
| 7 | * This software is available to you under a choice of one of two |
| 8 | * licenses. You may choose to be licensed under the terms of the GNU |
| 9 | * General Public License (GPL) Version 2, available from the file |
| 10 | * COPYING in the main directory of this source tree, or the |
| 11 | * BSD license below: |
| 12 | * |
| 13 | * Redistribution and use in source and binary forms, with or without |
| 14 | * modification, are permitted provided that the following conditions |
| 15 | * are met: |
| 16 | * |
| 17 | * 1. Redistributions of source code must retain the above copyright |
| 18 | * notice, this list of conditions and the following disclaimer. |
| 19 | * 2. Redistributions in binary form must reproduce the above copyright |
| 20 | * notice, this list of conditions and the following disclaimer in |
| 21 | * the documentation and/or other materials provided with the |
| 22 | * distribution. |
| 23 | * |
| 24 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' |
| 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, |
| 26 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 27 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS |
| 28 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 29 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 31 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 32 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 33 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 34 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 35 | * |
| 36 | * Description: Slow Path Operators |
| 37 | */ |
| 38 | |
| 39 | #include <linux/interrupt.h> |
| 40 | #include <linux/spinlock.h> |
| 41 | #include <linux/sched.h> |
| 42 | #include <linux/pci.h> |
| 43 | |
| 44 | #include "roce_hsi.h" |
| 45 | |
| 46 | #include "qplib_res.h" |
| 47 | #include "qplib_rcfw.h" |
| 48 | #include "qplib_sp.h" |
| 49 | |
| 50 | const struct bnxt_qplib_gid bnxt_qplib_gid_zero = {{ 0, 0, 0, 0, 0, 0, 0, 0, |
| 51 | 0, 0, 0, 0, 0, 0, 0, 0 } }; |
| 52 | |
| 53 | /* Device */ |
Devesh Sharma | 254cd25 | 2017-06-29 12:28:16 -0700 | [diff] [blame] | 54 | |
| 55 | static bool bnxt_qplib_is_atomic_cap(struct bnxt_qplib_rcfw *rcfw) |
| 56 | { |
| 57 | int rc; |
| 58 | u16 pcie_ctl2; |
| 59 | |
| 60 | rc = pcie_capability_read_word(rcfw->pdev, PCI_EXP_DEVCTL2, |
| 61 | &pcie_ctl2); |
| 62 | if (rc) |
| 63 | return false; |
| 64 | return !!(pcie_ctl2 & PCI_EXP_DEVCTL2_ATOMIC_REQ); |
| 65 | } |
| 66 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 67 | int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw, |
| 68 | struct bnxt_qplib_dev_attr *attr) |
| 69 | { |
| 70 | struct cmdq_query_func req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 71 | struct creq_query_func_resp resp; |
| 72 | struct bnxt_qplib_rcfw_sbuf *sbuf; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 73 | struct creq_query_func_resp_sb *sb; |
| 74 | u16 cmd_flags = 0; |
| 75 | u32 temp; |
| 76 | u8 *tqm_alloc; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 77 | int i, rc = 0; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 78 | |
| 79 | RCFW_CMD_PREP(req, QUERY_FUNC, cmd_flags); |
| 80 | |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 81 | sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb)); |
| 82 | if (!sbuf) { |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 83 | dev_err(&rcfw->pdev->dev, |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 84 | "QPLIB: SP: QUERY_FUNC alloc side buffer failed"); |
| 85 | return -ENOMEM; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 86 | } |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 87 | |
| 88 | sb = sbuf->sb; |
| 89 | req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS; |
| 90 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, |
| 91 | (void *)sbuf, 0); |
| 92 | if (rc) |
| 93 | goto bail; |
| 94 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 95 | /* Extract the context from the side buffer */ |
| 96 | attr->max_qp = le32_to_cpu(sb->max_qp); |
Selvin Xavier | 58d4a67 | 2017-06-29 12:28:12 -0700 | [diff] [blame] | 97 | /* max_qp value reported by FW for PF doesn't include the QP1 for PF */ |
| 98 | attr->max_qp += 1; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 99 | attr->max_qp_rd_atom = |
| 100 | sb->max_qp_rd_atom > BNXT_QPLIB_MAX_OUT_RD_ATOM ? |
| 101 | BNXT_QPLIB_MAX_OUT_RD_ATOM : sb->max_qp_rd_atom; |
| 102 | attr->max_qp_init_rd_atom = |
| 103 | sb->max_qp_init_rd_atom > BNXT_QPLIB_MAX_OUT_RD_ATOM ? |
| 104 | BNXT_QPLIB_MAX_OUT_RD_ATOM : sb->max_qp_init_rd_atom; |
| 105 | attr->max_qp_wqes = le16_to_cpu(sb->max_qp_wr); |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 106 | /* |
| 107 | * 128 WQEs needs to be reserved for the HW (8916). Prevent |
| 108 | * reporting the max number |
| 109 | */ |
| 110 | attr->max_qp_wqes -= BNXT_QPLIB_RESERVED_QP_WRS; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 111 | attr->max_qp_sges = sb->max_sge; |
| 112 | attr->max_cq = le32_to_cpu(sb->max_cq); |
| 113 | attr->max_cq_wqes = le32_to_cpu(sb->max_cqe); |
| 114 | attr->max_cq_sges = attr->max_qp_sges; |
| 115 | attr->max_mr = le32_to_cpu(sb->max_mr); |
| 116 | attr->max_mw = le32_to_cpu(sb->max_mw); |
| 117 | |
| 118 | attr->max_mr_size = le64_to_cpu(sb->max_mr_size); |
| 119 | attr->max_pd = 64 * 1024; |
| 120 | attr->max_raw_ethy_qp = le32_to_cpu(sb->max_raw_eth_qp); |
| 121 | attr->max_ah = le32_to_cpu(sb->max_ah); |
| 122 | |
| 123 | attr->max_fmr = le32_to_cpu(sb->max_fmr); |
| 124 | attr->max_map_per_fmr = sb->max_map_per_fmr; |
| 125 | |
| 126 | attr->max_srq = le16_to_cpu(sb->max_srq); |
| 127 | attr->max_srq_wqes = le32_to_cpu(sb->max_srq_wr) - 1; |
| 128 | attr->max_srq_sges = sb->max_srq_sge; |
| 129 | /* Bono only reports 1 PKEY for now, but it can support > 1 */ |
| 130 | attr->max_pkey = le32_to_cpu(sb->max_pkeys); |
| 131 | |
| 132 | attr->max_inline_data = le32_to_cpu(sb->max_inline_data); |
| 133 | attr->l2_db_size = (sb->l2_db_space_size + 1) * PAGE_SIZE; |
| 134 | attr->max_sgid = le32_to_cpu(sb->max_gid); |
| 135 | |
| 136 | strlcpy(attr->fw_ver, "20.6.28.0", sizeof(attr->fw_ver)); |
| 137 | |
| 138 | for (i = 0; i < MAX_TQM_ALLOC_REQ / 4; i++) { |
| 139 | temp = le32_to_cpu(sb->tqm_alloc_reqs[i]); |
| 140 | tqm_alloc = (u8 *)&temp; |
| 141 | attr->tqm_alloc_reqs[i * 4] = *tqm_alloc; |
| 142 | attr->tqm_alloc_reqs[i * 4 + 1] = *(++tqm_alloc); |
| 143 | attr->tqm_alloc_reqs[i * 4 + 2] = *(++tqm_alloc); |
| 144 | attr->tqm_alloc_reqs[i * 4 + 3] = *(++tqm_alloc); |
| 145 | } |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 146 | |
Devesh Sharma | 254cd25 | 2017-06-29 12:28:16 -0700 | [diff] [blame] | 147 | attr->is_atomic = bnxt_qplib_is_atomic_cap(rcfw); |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 148 | bail: |
| 149 | bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf); |
| 150 | return rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 151 | } |
| 152 | |
| 153 | /* SGID */ |
| 154 | int bnxt_qplib_get_sgid(struct bnxt_qplib_res *res, |
| 155 | struct bnxt_qplib_sgid_tbl *sgid_tbl, int index, |
| 156 | struct bnxt_qplib_gid *gid) |
| 157 | { |
| 158 | if (index > sgid_tbl->max) { |
| 159 | dev_err(&res->pdev->dev, |
| 160 | "QPLIB: Index %d exceeded SGID table max (%d)", |
| 161 | index, sgid_tbl->max); |
| 162 | return -EINVAL; |
| 163 | } |
| 164 | memcpy(gid, &sgid_tbl->tbl[index], sizeof(*gid)); |
| 165 | return 0; |
| 166 | } |
| 167 | |
| 168 | int bnxt_qplib_del_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, |
| 169 | struct bnxt_qplib_gid *gid, bool update) |
| 170 | { |
| 171 | struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl, |
| 172 | struct bnxt_qplib_res, |
| 173 | sgid_tbl); |
| 174 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 175 | int index; |
| 176 | |
| 177 | if (!sgid_tbl) { |
| 178 | dev_err(&res->pdev->dev, "QPLIB: SGID table not allocated"); |
| 179 | return -EINVAL; |
| 180 | } |
| 181 | /* Do we need a sgid_lock here? */ |
| 182 | if (!sgid_tbl->active) { |
| 183 | dev_err(&res->pdev->dev, |
| 184 | "QPLIB: SGID table has no active entries"); |
| 185 | return -ENOMEM; |
| 186 | } |
| 187 | for (index = 0; index < sgid_tbl->max; index++) { |
| 188 | if (!memcmp(&sgid_tbl->tbl[index], gid, sizeof(*gid))) |
| 189 | break; |
| 190 | } |
| 191 | if (index == sgid_tbl->max) { |
| 192 | dev_warn(&res->pdev->dev, "GID not found in the SGID table"); |
| 193 | return 0; |
| 194 | } |
| 195 | /* Remove GID from the SGID table */ |
| 196 | if (update) { |
| 197 | struct cmdq_delete_gid req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 198 | struct creq_delete_gid_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 199 | u16 cmd_flags = 0; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 200 | int rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 201 | |
| 202 | RCFW_CMD_PREP(req, DELETE_GID, cmd_flags); |
| 203 | if (sgid_tbl->hw_id[index] == 0xFFFF) { |
| 204 | dev_err(&res->pdev->dev, |
| 205 | "QPLIB: GID entry contains an invalid HW id"); |
| 206 | return -EINVAL; |
| 207 | } |
| 208 | req.gid_index = cpu_to_le16(sgid_tbl->hw_id[index]); |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 209 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 210 | (void *)&resp, NULL, 0); |
| 211 | if (rc) |
| 212 | return rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 213 | } |
| 214 | memcpy(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero, |
| 215 | sizeof(bnxt_qplib_gid_zero)); |
Kalesh AP | 5fac5b1 | 2017-06-29 12:28:10 -0700 | [diff] [blame^] | 216 | sgid_tbl->vlan[index] = 0; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 217 | sgid_tbl->active--; |
| 218 | dev_dbg(&res->pdev->dev, |
| 219 | "QPLIB: SGID deleted hw_id[0x%x] = 0x%x active = 0x%x", |
| 220 | index, sgid_tbl->hw_id[index], sgid_tbl->active); |
| 221 | sgid_tbl->hw_id[index] = (u16)-1; |
| 222 | |
| 223 | /* unlock */ |
| 224 | return 0; |
| 225 | } |
| 226 | |
| 227 | int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, |
| 228 | struct bnxt_qplib_gid *gid, u8 *smac, u16 vlan_id, |
| 229 | bool update, u32 *index) |
| 230 | { |
| 231 | struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl, |
| 232 | struct bnxt_qplib_res, |
| 233 | sgid_tbl); |
| 234 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 235 | int i, free_idx; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 236 | |
| 237 | if (!sgid_tbl) { |
| 238 | dev_err(&res->pdev->dev, "QPLIB: SGID table not allocated"); |
| 239 | return -EINVAL; |
| 240 | } |
| 241 | /* Do we need a sgid_lock here? */ |
| 242 | if (sgid_tbl->active == sgid_tbl->max) { |
| 243 | dev_err(&res->pdev->dev, "QPLIB: SGID table is full"); |
| 244 | return -ENOMEM; |
| 245 | } |
| 246 | free_idx = sgid_tbl->max; |
| 247 | for (i = 0; i < sgid_tbl->max; i++) { |
| 248 | if (!memcmp(&sgid_tbl->tbl[i], gid, sizeof(*gid))) { |
| 249 | dev_dbg(&res->pdev->dev, |
| 250 | "QPLIB: SGID entry already exist in entry %d!", |
| 251 | i); |
| 252 | *index = i; |
| 253 | return -EALREADY; |
| 254 | } else if (!memcmp(&sgid_tbl->tbl[i], &bnxt_qplib_gid_zero, |
| 255 | sizeof(bnxt_qplib_gid_zero)) && |
| 256 | free_idx == sgid_tbl->max) { |
| 257 | free_idx = i; |
| 258 | } |
| 259 | } |
| 260 | if (free_idx == sgid_tbl->max) { |
| 261 | dev_err(&res->pdev->dev, |
| 262 | "QPLIB: SGID table is FULL but count is not MAX??"); |
| 263 | return -ENOMEM; |
| 264 | } |
| 265 | if (update) { |
| 266 | struct cmdq_add_gid req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 267 | struct creq_add_gid_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 268 | u16 cmd_flags = 0; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 269 | int rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 270 | |
| 271 | RCFW_CMD_PREP(req, ADD_GID, cmd_flags); |
| 272 | |
Kalesh AP | 5fac5b1 | 2017-06-29 12:28:10 -0700 | [diff] [blame^] | 273 | req.gid[0] = cpu_to_be32(((u32 *)gid->data)[3]); |
| 274 | req.gid[1] = cpu_to_be32(((u32 *)gid->data)[2]); |
| 275 | req.gid[2] = cpu_to_be32(((u32 *)gid->data)[1]); |
| 276 | req.gid[3] = cpu_to_be32(((u32 *)gid->data)[0]); |
| 277 | /* |
| 278 | * driver should ensure that all RoCE traffic is always VLAN |
| 279 | * tagged if RoCE traffic is running on non-zero VLAN ID or |
| 280 | * RoCE traffic is running on non-zero Priority. |
| 281 | */ |
| 282 | if ((vlan_id != 0xFFFF) || res->prio) { |
| 283 | if (vlan_id != 0xFFFF) |
| 284 | req.vlan = cpu_to_le16 |
| 285 | (vlan_id & CMDQ_ADD_GID_VLAN_VLAN_ID_MASK); |
| 286 | req.vlan |= cpu_to_le16 |
| 287 | (CMDQ_ADD_GID_VLAN_TPID_TPID_8100 | |
| 288 | CMDQ_ADD_GID_VLAN_VLAN_EN); |
| 289 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 290 | |
| 291 | /* MAC in network format */ |
Kalesh AP | 5fac5b1 | 2017-06-29 12:28:10 -0700 | [diff] [blame^] | 292 | req.src_mac[0] = cpu_to_be16(((u16 *)smac)[0]); |
| 293 | req.src_mac[1] = cpu_to_be16(((u16 *)smac)[1]); |
| 294 | req.src_mac[2] = cpu_to_be16(((u16 *)smac)[2]); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 295 | |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 296 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 297 | (void *)&resp, NULL, 0); |
| 298 | if (rc) |
| 299 | return rc; |
| 300 | sgid_tbl->hw_id[free_idx] = le32_to_cpu(resp.xid); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 301 | } |
| 302 | /* Add GID to the sgid_tbl */ |
| 303 | memcpy(&sgid_tbl->tbl[free_idx], gid, sizeof(*gid)); |
| 304 | sgid_tbl->active++; |
Kalesh AP | 5fac5b1 | 2017-06-29 12:28:10 -0700 | [diff] [blame^] | 305 | if (vlan_id != 0xFFFF) |
| 306 | sgid_tbl->vlan[free_idx] = 1; |
| 307 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 308 | dev_dbg(&res->pdev->dev, |
| 309 | "QPLIB: SGID added hw_id[0x%x] = 0x%x active = 0x%x", |
| 310 | free_idx, sgid_tbl->hw_id[free_idx], sgid_tbl->active); |
| 311 | |
| 312 | *index = free_idx; |
| 313 | /* unlock */ |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 314 | return 0; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 315 | } |
| 316 | |
Kalesh AP | 5fac5b1 | 2017-06-29 12:28:10 -0700 | [diff] [blame^] | 317 | int bnxt_qplib_update_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, |
| 318 | struct bnxt_qplib_gid *gid, u16 gid_idx, |
| 319 | u8 *smac) |
| 320 | { |
| 321 | struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl, |
| 322 | struct bnxt_qplib_res, |
| 323 | sgid_tbl); |
| 324 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 325 | struct creq_modify_gid_resp resp; |
| 326 | struct cmdq_modify_gid req; |
| 327 | int rc; |
| 328 | u16 cmd_flags = 0; |
| 329 | |
| 330 | RCFW_CMD_PREP(req, MODIFY_GID, cmd_flags); |
| 331 | |
| 332 | req.gid[0] = cpu_to_be32(((u32 *)gid->data)[3]); |
| 333 | req.gid[1] = cpu_to_be32(((u32 *)gid->data)[2]); |
| 334 | req.gid[2] = cpu_to_be32(((u32 *)gid->data)[1]); |
| 335 | req.gid[3] = cpu_to_be32(((u32 *)gid->data)[0]); |
| 336 | if (res->prio) { |
| 337 | req.vlan |= cpu_to_le16 |
| 338 | (CMDQ_ADD_GID_VLAN_TPID_TPID_8100 | |
| 339 | CMDQ_ADD_GID_VLAN_VLAN_EN); |
| 340 | } |
| 341 | |
| 342 | /* MAC in network format */ |
| 343 | req.src_mac[0] = cpu_to_be16(((u16 *)smac)[0]); |
| 344 | req.src_mac[1] = cpu_to_be16(((u16 *)smac)[1]); |
| 345 | req.src_mac[2] = cpu_to_be16(((u16 *)smac)[2]); |
| 346 | |
| 347 | req.gid_index = cpu_to_le16(gid_idx); |
| 348 | |
| 349 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 350 | (void *)&resp, NULL, 0); |
| 351 | return rc; |
| 352 | } |
| 353 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 354 | /* pkeys */ |
| 355 | int bnxt_qplib_get_pkey(struct bnxt_qplib_res *res, |
| 356 | struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 index, |
| 357 | u16 *pkey) |
| 358 | { |
| 359 | if (index == 0xFFFF) { |
| 360 | *pkey = 0xFFFF; |
| 361 | return 0; |
| 362 | } |
| 363 | if (index > pkey_tbl->max) { |
| 364 | dev_err(&res->pdev->dev, |
| 365 | "QPLIB: Index %d exceeded PKEY table max (%d)", |
| 366 | index, pkey_tbl->max); |
| 367 | return -EINVAL; |
| 368 | } |
| 369 | memcpy(pkey, &pkey_tbl->tbl[index], sizeof(*pkey)); |
| 370 | return 0; |
| 371 | } |
| 372 | |
| 373 | int bnxt_qplib_del_pkey(struct bnxt_qplib_res *res, |
| 374 | struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 *pkey, |
| 375 | bool update) |
| 376 | { |
| 377 | int i, rc = 0; |
| 378 | |
| 379 | if (!pkey_tbl) { |
| 380 | dev_err(&res->pdev->dev, "QPLIB: PKEY table not allocated"); |
| 381 | return -EINVAL; |
| 382 | } |
| 383 | |
| 384 | /* Do we need a pkey_lock here? */ |
| 385 | if (!pkey_tbl->active) { |
| 386 | dev_err(&res->pdev->dev, |
| 387 | "QPLIB: PKEY table has no active entries"); |
| 388 | return -ENOMEM; |
| 389 | } |
| 390 | for (i = 0; i < pkey_tbl->max; i++) { |
| 391 | if (!memcmp(&pkey_tbl->tbl[i], pkey, sizeof(*pkey))) |
| 392 | break; |
| 393 | } |
| 394 | if (i == pkey_tbl->max) { |
| 395 | dev_err(&res->pdev->dev, |
| 396 | "QPLIB: PKEY 0x%04x not found in the pkey table", |
| 397 | *pkey); |
| 398 | return -ENOMEM; |
| 399 | } |
| 400 | memset(&pkey_tbl->tbl[i], 0, sizeof(*pkey)); |
| 401 | pkey_tbl->active--; |
| 402 | |
| 403 | /* unlock */ |
| 404 | return rc; |
| 405 | } |
| 406 | |
| 407 | int bnxt_qplib_add_pkey(struct bnxt_qplib_res *res, |
| 408 | struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 *pkey, |
| 409 | bool update) |
| 410 | { |
| 411 | int i, free_idx, rc = 0; |
| 412 | |
| 413 | if (!pkey_tbl) { |
| 414 | dev_err(&res->pdev->dev, "QPLIB: PKEY table not allocated"); |
| 415 | return -EINVAL; |
| 416 | } |
| 417 | |
| 418 | /* Do we need a pkey_lock here? */ |
| 419 | if (pkey_tbl->active == pkey_tbl->max) { |
| 420 | dev_err(&res->pdev->dev, "QPLIB: PKEY table is full"); |
| 421 | return -ENOMEM; |
| 422 | } |
| 423 | free_idx = pkey_tbl->max; |
| 424 | for (i = 0; i < pkey_tbl->max; i++) { |
| 425 | if (!memcmp(&pkey_tbl->tbl[i], pkey, sizeof(*pkey))) |
| 426 | return -EALREADY; |
| 427 | else if (!pkey_tbl->tbl[i] && free_idx == pkey_tbl->max) |
| 428 | free_idx = i; |
| 429 | } |
| 430 | if (free_idx == pkey_tbl->max) { |
| 431 | dev_err(&res->pdev->dev, |
| 432 | "QPLIB: PKEY table is FULL but count is not MAX??"); |
| 433 | return -ENOMEM; |
| 434 | } |
| 435 | /* Add PKEY to the pkey_tbl */ |
| 436 | memcpy(&pkey_tbl->tbl[free_idx], pkey, sizeof(*pkey)); |
| 437 | pkey_tbl->active++; |
| 438 | |
| 439 | /* unlock */ |
| 440 | return rc; |
| 441 | } |
| 442 | |
| 443 | /* AH */ |
| 444 | int bnxt_qplib_create_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah) |
| 445 | { |
| 446 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 447 | struct cmdq_create_ah req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 448 | struct creq_create_ah_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 449 | u16 cmd_flags = 0; |
| 450 | u32 temp32[4]; |
| 451 | u16 temp16[3]; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 452 | int rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 453 | |
| 454 | RCFW_CMD_PREP(req, CREATE_AH, cmd_flags); |
| 455 | |
| 456 | memcpy(temp32, ah->dgid.data, sizeof(struct bnxt_qplib_gid)); |
| 457 | req.dgid[0] = cpu_to_le32(temp32[0]); |
| 458 | req.dgid[1] = cpu_to_le32(temp32[1]); |
| 459 | req.dgid[2] = cpu_to_le32(temp32[2]); |
| 460 | req.dgid[3] = cpu_to_le32(temp32[3]); |
| 461 | |
| 462 | req.type = ah->nw_type; |
| 463 | req.hop_limit = ah->hop_limit; |
| 464 | req.sgid_index = cpu_to_le16(res->sgid_tbl.hw_id[ah->sgid_index]); |
| 465 | req.dest_vlan_id_flow_label = cpu_to_le32((ah->flow_label & |
| 466 | CMDQ_CREATE_AH_FLOW_LABEL_MASK) | |
| 467 | CMDQ_CREATE_AH_DEST_VLAN_ID_MASK); |
| 468 | req.pd_id = cpu_to_le32(ah->pd->id); |
| 469 | req.traffic_class = ah->traffic_class; |
| 470 | |
| 471 | /* MAC in network format */ |
| 472 | memcpy(temp16, ah->dmac, 6); |
| 473 | req.dest_mac[0] = cpu_to_le16(temp16[0]); |
| 474 | req.dest_mac[1] = cpu_to_le16(temp16[1]); |
| 475 | req.dest_mac[2] = cpu_to_le16(temp16[2]); |
| 476 | |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 477 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, |
| 478 | NULL, 1); |
| 479 | if (rc) |
| 480 | return rc; |
| 481 | |
| 482 | ah->id = le32_to_cpu(resp.xid); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 483 | return 0; |
| 484 | } |
| 485 | |
| 486 | int bnxt_qplib_destroy_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah) |
| 487 | { |
| 488 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 489 | struct cmdq_destroy_ah req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 490 | struct creq_destroy_ah_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 491 | u16 cmd_flags = 0; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 492 | int rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 493 | |
| 494 | /* Clean up the AH table in the device */ |
| 495 | RCFW_CMD_PREP(req, DESTROY_AH, cmd_flags); |
| 496 | |
| 497 | req.ah_cid = cpu_to_le32(ah->id); |
| 498 | |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 499 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, |
| 500 | NULL, 1); |
| 501 | if (rc) |
| 502 | return rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 503 | return 0; |
| 504 | } |
| 505 | |
| 506 | /* MRW */ |
| 507 | int bnxt_qplib_free_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw) |
| 508 | { |
| 509 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 510 | struct cmdq_deallocate_key req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 511 | struct creq_deallocate_key_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 512 | u16 cmd_flags = 0; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 513 | int rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 514 | |
| 515 | if (mrw->lkey == 0xFFFFFFFF) { |
| 516 | dev_info(&res->pdev->dev, |
| 517 | "QPLIB: SP: Free a reserved lkey MRW"); |
| 518 | return 0; |
| 519 | } |
| 520 | |
| 521 | RCFW_CMD_PREP(req, DEALLOCATE_KEY, cmd_flags); |
| 522 | |
| 523 | req.mrw_flags = mrw->type; |
| 524 | |
| 525 | if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE1) || |
| 526 | (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A) || |
| 527 | (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B)) |
| 528 | req.key = cpu_to_le32(mrw->rkey); |
| 529 | else |
| 530 | req.key = cpu_to_le32(mrw->lkey); |
| 531 | |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 532 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, |
| 533 | NULL, 0); |
| 534 | if (rc) |
| 535 | return rc; |
| 536 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 537 | /* Free the qplib's MRW memory */ |
| 538 | if (mrw->hwq.max_elements) |
| 539 | bnxt_qplib_free_hwq(res->pdev, &mrw->hwq); |
| 540 | |
| 541 | return 0; |
| 542 | } |
| 543 | |
| 544 | int bnxt_qplib_alloc_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw) |
| 545 | { |
| 546 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 547 | struct cmdq_allocate_mrw req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 548 | struct creq_allocate_mrw_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 549 | u16 cmd_flags = 0; |
| 550 | unsigned long tmp; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 551 | int rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 552 | |
| 553 | RCFW_CMD_PREP(req, ALLOCATE_MRW, cmd_flags); |
| 554 | |
| 555 | req.pd_id = cpu_to_le32(mrw->pd->id); |
| 556 | req.mrw_flags = mrw->type; |
| 557 | if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_PMR && |
| 558 | mrw->flags & BNXT_QPLIB_FR_PMR) || |
| 559 | mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A || |
| 560 | mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B) |
| 561 | req.access = CMDQ_ALLOCATE_MRW_ACCESS_CONSUMER_OWNED_KEY; |
| 562 | tmp = (unsigned long)mrw; |
| 563 | req.mrw_handle = cpu_to_le64(tmp); |
| 564 | |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 565 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 566 | (void *)&resp, NULL, 0); |
| 567 | if (rc) |
| 568 | return rc; |
| 569 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 570 | if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE1) || |
| 571 | (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A) || |
| 572 | (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B)) |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 573 | mrw->rkey = le32_to_cpu(resp.xid); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 574 | else |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 575 | mrw->lkey = le32_to_cpu(resp.xid); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 576 | return 0; |
| 577 | } |
| 578 | |
| 579 | int bnxt_qplib_dereg_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw, |
| 580 | bool block) |
| 581 | { |
| 582 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 583 | struct cmdq_deregister_mr req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 584 | struct creq_deregister_mr_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 585 | u16 cmd_flags = 0; |
| 586 | int rc; |
| 587 | |
| 588 | RCFW_CMD_PREP(req, DEREGISTER_MR, cmd_flags); |
| 589 | |
| 590 | req.lkey = cpu_to_le32(mrw->lkey); |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 591 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 592 | (void *)&resp, NULL, block); |
| 593 | if (rc) |
| 594 | return rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 595 | |
| 596 | /* Free the qplib's MR memory */ |
| 597 | if (mrw->hwq.max_elements) { |
| 598 | mrw->va = 0; |
| 599 | mrw->total_size = 0; |
| 600 | bnxt_qplib_free_hwq(res->pdev, &mrw->hwq); |
| 601 | } |
| 602 | |
| 603 | return 0; |
| 604 | } |
| 605 | |
| 606 | int bnxt_qplib_reg_mr(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr, |
| 607 | u64 *pbl_tbl, int num_pbls, bool block) |
| 608 | { |
| 609 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 610 | struct cmdq_register_mr req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 611 | struct creq_register_mr_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 612 | u16 cmd_flags = 0, level; |
| 613 | int pg_ptrs, pages, i, rc; |
| 614 | dma_addr_t **pbl_ptr; |
| 615 | u32 pg_size; |
| 616 | |
| 617 | if (num_pbls) { |
| 618 | pg_ptrs = roundup_pow_of_two(num_pbls); |
| 619 | pages = pg_ptrs >> MAX_PBL_LVL_1_PGS_SHIFT; |
| 620 | if (!pages) |
| 621 | pages++; |
| 622 | |
| 623 | if (pages > MAX_PBL_LVL_1_PGS) { |
| 624 | dev_err(&res->pdev->dev, "QPLIB: SP: Reg MR pages "); |
| 625 | dev_err(&res->pdev->dev, |
| 626 | "requested (0x%x) exceeded max (0x%x)", |
| 627 | pages, MAX_PBL_LVL_1_PGS); |
| 628 | return -ENOMEM; |
| 629 | } |
| 630 | /* Free the hwq if it already exist, must be a rereg */ |
| 631 | if (mr->hwq.max_elements) |
| 632 | bnxt_qplib_free_hwq(res->pdev, &mr->hwq); |
| 633 | |
| 634 | mr->hwq.max_elements = pages; |
| 635 | rc = bnxt_qplib_alloc_init_hwq(res->pdev, &mr->hwq, NULL, 0, |
| 636 | &mr->hwq.max_elements, |
| 637 | PAGE_SIZE, 0, PAGE_SIZE, |
| 638 | HWQ_TYPE_CTX); |
| 639 | if (rc) { |
| 640 | dev_err(&res->pdev->dev, |
| 641 | "SP: Reg MR memory allocation failed"); |
| 642 | return -ENOMEM; |
| 643 | } |
| 644 | /* Write to the hwq */ |
| 645 | pbl_ptr = (dma_addr_t **)mr->hwq.pbl_ptr; |
| 646 | for (i = 0; i < num_pbls; i++) |
| 647 | pbl_ptr[PTR_PG(i)][PTR_IDX(i)] = |
| 648 | (pbl_tbl[i] & PAGE_MASK) | PTU_PTE_VALID; |
| 649 | } |
| 650 | |
| 651 | RCFW_CMD_PREP(req, REGISTER_MR, cmd_flags); |
| 652 | |
| 653 | /* Configure the request */ |
| 654 | if (mr->hwq.level == PBL_LVL_MAX) { |
| 655 | level = 0; |
| 656 | req.pbl = 0; |
| 657 | pg_size = PAGE_SIZE; |
| 658 | } else { |
| 659 | level = mr->hwq.level + 1; |
| 660 | req.pbl = cpu_to_le64(mr->hwq.pbl[PBL_LVL_0].pg_map_arr[0]); |
| 661 | pg_size = mr->hwq.pbl[PBL_LVL_0].pg_size; |
| 662 | } |
| 663 | req.log2_pg_size_lvl = (level << CMDQ_REGISTER_MR_LVL_SFT) | |
| 664 | ((ilog2(pg_size) << |
| 665 | CMDQ_REGISTER_MR_LOG2_PG_SIZE_SFT) & |
| 666 | CMDQ_REGISTER_MR_LOG2_PG_SIZE_MASK); |
| 667 | req.access = (mr->flags & 0xFFFF); |
| 668 | req.va = cpu_to_le64(mr->va); |
| 669 | req.key = cpu_to_le32(mr->lkey); |
| 670 | req.mr_size = cpu_to_le64(mr->total_size); |
| 671 | |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 672 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 673 | (void *)&resp, NULL, block); |
| 674 | if (rc) |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 675 | goto fail; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 676 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 677 | return 0; |
| 678 | |
| 679 | fail: |
| 680 | if (mr->hwq.max_elements) |
| 681 | bnxt_qplib_free_hwq(res->pdev, &mr->hwq); |
| 682 | return rc; |
| 683 | } |
| 684 | |
| 685 | int bnxt_qplib_alloc_fast_reg_page_list(struct bnxt_qplib_res *res, |
| 686 | struct bnxt_qplib_frpl *frpl, |
| 687 | int max_pg_ptrs) |
| 688 | { |
| 689 | int pg_ptrs, pages, rc; |
| 690 | |
| 691 | /* Re-calculate the max to fit the HWQ allocation model */ |
| 692 | pg_ptrs = roundup_pow_of_two(max_pg_ptrs); |
| 693 | pages = pg_ptrs >> MAX_PBL_LVL_1_PGS_SHIFT; |
| 694 | if (!pages) |
| 695 | pages++; |
| 696 | |
| 697 | if (pages > MAX_PBL_LVL_1_PGS) |
| 698 | return -ENOMEM; |
| 699 | |
| 700 | frpl->hwq.max_elements = pages; |
| 701 | rc = bnxt_qplib_alloc_init_hwq(res->pdev, &frpl->hwq, NULL, 0, |
| 702 | &frpl->hwq.max_elements, PAGE_SIZE, 0, |
| 703 | PAGE_SIZE, HWQ_TYPE_CTX); |
| 704 | if (!rc) |
| 705 | frpl->max_pg_ptrs = pg_ptrs; |
| 706 | |
| 707 | return rc; |
| 708 | } |
| 709 | |
| 710 | int bnxt_qplib_free_fast_reg_page_list(struct bnxt_qplib_res *res, |
| 711 | struct bnxt_qplib_frpl *frpl) |
| 712 | { |
| 713 | bnxt_qplib_free_hwq(res->pdev, &frpl->hwq); |
| 714 | return 0; |
| 715 | } |
| 716 | |
| 717 | int bnxt_qplib_map_tc2cos(struct bnxt_qplib_res *res, u16 *cids) |
| 718 | { |
| 719 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 720 | struct cmdq_map_tc_to_cos req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 721 | struct creq_map_tc_to_cos_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 722 | u16 cmd_flags = 0; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 723 | int rc = 0; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 724 | |
| 725 | RCFW_CMD_PREP(req, MAP_TC_TO_COS, cmd_flags); |
| 726 | req.cos0 = cpu_to_le16(cids[0]); |
| 727 | req.cos1 = cpu_to_le16(cids[1]); |
| 728 | |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 729 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 730 | (void *)&resp, NULL, 0); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 731 | return 0; |
| 732 | } |