blob: 4decc305a79f1ffd510171add99187f13ae21a6e [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/types.h>
39#include <linux/netdevice.h>
40#include <linux/etherdevice.h>
41#include <linux/slab.h>
42#include <linux/device.h>
43#include <linux/skbuff.h>
44#include <linux/if_vlan.h>
45#include <linux/if_bridge.h>
46#include <linux/workqueue.h>
47#include <linux/jiffies.h>
Ido Schimmel4f2c6ae2016-01-27 15:16:43 +010048#include <linux/rtnetlink.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020049#include <net/switchdev.h>
50
51#include "spectrum.h"
52#include "core.h"
53#include "reg.h"
54
Elad Raze4b6f692016-01-10 21:06:27 +010055static u16 mlxsw_sp_port_vid_to_fid_get(struct mlxsw_sp_port *mlxsw_sp_port,
56 u16 vid)
57{
Ido Schimmel56918b62016-06-20 23:04:18 +020058 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_port);
Elad Raze4b6f692016-01-10 21:06:27 +010059 u16 fid = vid;
60
Ido Schimmel56918b62016-06-20 23:04:18 +020061 fid = f ? f->fid : fid;
Elad Raze4b6f692016-01-10 21:06:27 +010062
63 if (!fid)
64 fid = mlxsw_sp_port->pvid;
65
66 return fid;
67}
68
Ido Schimmel54a73202015-12-15 16:03:41 +010069static struct mlxsw_sp_port *
70mlxsw_sp_port_orig_get(struct net_device *dev,
71 struct mlxsw_sp_port *mlxsw_sp_port)
72{
73 struct mlxsw_sp_port *mlxsw_sp_vport;
74 u16 vid;
75
76 if (!is_vlan_dev(dev))
77 return mlxsw_sp_port;
78
79 vid = vlan_dev_vlan_id(dev);
80 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
81 WARN_ON(!mlxsw_sp_vport);
82
83 return mlxsw_sp_vport;
84}
85
Jiri Pirko56ade8f2015-10-16 14:01:37 +020086static int mlxsw_sp_port_attr_get(struct net_device *dev,
87 struct switchdev_attr *attr)
88{
89 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
90 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
91
Ido Schimmel54a73202015-12-15 16:03:41 +010092 mlxsw_sp_port = mlxsw_sp_port_orig_get(attr->orig_dev, mlxsw_sp_port);
93 if (!mlxsw_sp_port)
94 return -EINVAL;
95
Jiri Pirko56ade8f2015-10-16 14:01:37 +020096 switch (attr->id) {
97 case SWITCHDEV_ATTR_ID_PORT_PARENT_ID:
98 attr->u.ppid.id_len = sizeof(mlxsw_sp->base_mac);
99 memcpy(&attr->u.ppid.id, &mlxsw_sp->base_mac,
100 attr->u.ppid.id_len);
101 break;
102 case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
103 attr->u.brport_flags =
104 (mlxsw_sp_port->learning ? BR_LEARNING : 0) |
Ido Schimmel02930382015-10-28 10:16:58 +0100105 (mlxsw_sp_port->learning_sync ? BR_LEARNING_SYNC : 0) |
106 (mlxsw_sp_port->uc_flood ? BR_FLOOD : 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200107 break;
108 default:
109 return -EOPNOTSUPP;
110 }
111
112 return 0;
113}
114
115static int mlxsw_sp_port_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
116 u8 state)
117{
118 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
119 enum mlxsw_reg_spms_state spms_state;
120 char *spms_pl;
121 u16 vid;
122 int err;
123
124 switch (state) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200125 case BR_STATE_FORWARDING:
126 spms_state = MLXSW_REG_SPMS_STATE_FORWARDING;
127 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200128 case BR_STATE_LEARNING:
129 spms_state = MLXSW_REG_SPMS_STATE_LEARNING;
130 break;
Ido Schimmel45491132016-01-27 15:20:20 +0100131 case BR_STATE_LISTENING: /* fall-through */
Ido Schimmel9cb026e2016-01-27 15:20:19 +0100132 case BR_STATE_DISABLED: /* fall-through */
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200133 case BR_STATE_BLOCKING:
134 spms_state = MLXSW_REG_SPMS_STATE_DISCARDING;
135 break;
136 default:
137 BUG();
138 }
139
140 spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
141 if (!spms_pl)
142 return -ENOMEM;
143 mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
Ido Schimmel54a73202015-12-15 16:03:41 +0100144
145 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
146 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200147 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
Ido Schimmel54a73202015-12-15 16:03:41 +0100148 } else {
149 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID)
150 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
151 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200152
153 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
154 kfree(spms_pl);
155 return err;
156}
157
158static int mlxsw_sp_port_attr_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
159 struct switchdev_trans *trans,
160 u8 state)
161{
162 if (switchdev_trans_ph_prepare(trans))
163 return 0;
164
165 mlxsw_sp_port->stp_state = state;
166 return mlxsw_sp_port_stp_state_set(mlxsw_sp_port, state);
167}
168
Ido Schimmel26f0e7f2015-12-15 16:03:44 +0100169static bool mlxsw_sp_vfid_is_vport_br(u16 vfid)
170{
171 return vfid >= MLXSW_SP_VFID_PORT_MAX;
172}
173
Ido Schimmel02930382015-10-28 10:16:58 +0100174static int __mlxsw_sp_port_flood_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmelc06a94e2015-12-15 16:03:38 +0100175 u16 idx_begin, u16 idx_end, bool set,
Ido Schimmel02930382015-10-28 10:16:58 +0100176 bool only_uc)
177{
178 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100179 u16 local_port = mlxsw_sp_port->local_port;
180 enum mlxsw_flood_table_type table_type;
Ido Schimmelc06a94e2015-12-15 16:03:38 +0100181 u16 range = idx_end - idx_begin + 1;
Ido Schimmel02930382015-10-28 10:16:58 +0100182 char *sftr_pl;
183 int err;
184
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100185 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
186 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +0100187 if (mlxsw_sp_vfid_is_vport_br(idx_begin))
188 local_port = mlxsw_sp_port->local_port;
189 else
190 local_port = MLXSW_PORT_CPU_PORT;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100191 } else {
192 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
193 }
194
Ido Schimmel02930382015-10-28 10:16:58 +0100195 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
196 if (!sftr_pl)
197 return -ENOMEM;
198
Ido Schimmelc06a94e2015-12-15 16:03:38 +0100199 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_UC, idx_begin,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100200 table_type, range, local_port, set);
Ido Schimmel02930382015-10-28 10:16:58 +0100201 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
202 if (err)
203 goto buffer_out;
204
205 /* Flooding control allows one to decide whether a given port will
206 * flood unicast traffic for which there is no FDB entry.
207 */
208 if (only_uc)
209 goto buffer_out;
210
Ido Schimmelc06a94e2015-12-15 16:03:38 +0100211 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, idx_begin,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100212 table_type, range, local_port, set);
Ido Schimmel02930382015-10-28 10:16:58 +0100213 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
Ido Schimmel28892862016-05-06 22:18:40 +0200214 if (err)
215 goto err_flood_bm_set;
216 else
217 goto buffer_out;
Ido Schimmel02930382015-10-28 10:16:58 +0100218
Ido Schimmel28892862016-05-06 22:18:40 +0200219err_flood_bm_set:
220 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_UC, idx_begin,
221 table_type, range, local_port, !set);
222 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
Ido Schimmel02930382015-10-28 10:16:58 +0100223buffer_out:
224 kfree(sftr_pl);
225 return err;
226}
227
228static int mlxsw_sp_port_uc_flood_set(struct mlxsw_sp_port *mlxsw_sp_port,
229 bool set)
230{
231 struct net_device *dev = mlxsw_sp_port->dev;
232 u16 vid, last_visited_vid;
233 int err;
234
Ido Schimmel54a73202015-12-15 16:03:41 +0100235 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
Ido Schimmel41b996c2016-06-20 23:04:17 +0200236 u16 fid = mlxsw_sp_vport_fid_get(mlxsw_sp_port)->fid;
237 u16 vfid = mlxsw_sp_fid_to_vfid(fid);
Ido Schimmel54a73202015-12-15 16:03:41 +0100238
239 return __mlxsw_sp_port_flood_set(mlxsw_sp_port, vfid, vfid,
240 set, true);
241 }
242
Ido Schimmel02930382015-10-28 10:16:58 +0100243 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
244 err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid, vid, set,
245 true);
246 if (err) {
247 last_visited_vid = vid;
248 goto err_port_flood_set;
249 }
250 }
251
252 return 0;
253
254err_port_flood_set:
255 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
256 __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid, vid, !set, true);
257 netdev_err(dev, "Failed to configure unicast flooding\n");
258 return err;
259}
260
Ido Schimmele6060022016-06-20 23:04:11 +0200261int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
Ido Schimmel47a0a9e2016-06-20 23:04:08 +0200262 bool set)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100263{
Ido Schimmele6060022016-06-20 23:04:11 +0200264 u16 vfid;
265
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100266 /* In case of vFIDs, index into the flooding table is relative to
267 * the start of the vFIDs range.
268 */
Ido Schimmele6060022016-06-20 23:04:11 +0200269 vfid = mlxsw_sp_fid_to_vfid(fid);
Ido Schimmel19ae6122015-12-15 16:03:39 +0100270 return __mlxsw_sp_port_flood_set(mlxsw_sp_vport, vfid, vfid, set,
Ido Schimmel47a0a9e2016-06-20 23:04:08 +0200271 false);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100272}
273
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200274static int mlxsw_sp_port_attr_br_flags_set(struct mlxsw_sp_port *mlxsw_sp_port,
275 struct switchdev_trans *trans,
276 unsigned long brport_flags)
277{
Ido Schimmel02930382015-10-28 10:16:58 +0100278 unsigned long uc_flood = mlxsw_sp_port->uc_flood ? BR_FLOOD : 0;
279 bool set;
280 int err;
281
Ido Schimmel6c72a3d2016-01-04 10:42:26 +0100282 if (!mlxsw_sp_port->bridged)
283 return -EINVAL;
284
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200285 if (switchdev_trans_ph_prepare(trans))
286 return 0;
287
Ido Schimmel02930382015-10-28 10:16:58 +0100288 if ((uc_flood ^ brport_flags) & BR_FLOOD) {
289 set = mlxsw_sp_port->uc_flood ? false : true;
290 err = mlxsw_sp_port_uc_flood_set(mlxsw_sp_port, set);
291 if (err)
292 return err;
293 }
294
295 mlxsw_sp_port->uc_flood = brport_flags & BR_FLOOD ? 1 : 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200296 mlxsw_sp_port->learning = brport_flags & BR_LEARNING ? 1 : 0;
297 mlxsw_sp_port->learning_sync = brport_flags & BR_LEARNING_SYNC ? 1 : 0;
Ido Schimmel02930382015-10-28 10:16:58 +0100298
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200299 return 0;
300}
301
302static int mlxsw_sp_ageing_set(struct mlxsw_sp *mlxsw_sp, u32 ageing_time)
303{
304 char sfdat_pl[MLXSW_REG_SFDAT_LEN];
305 int err;
306
307 mlxsw_reg_sfdat_pack(sfdat_pl, ageing_time);
308 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdat), sfdat_pl);
309 if (err)
310 return err;
311 mlxsw_sp->ageing_time = ageing_time;
312 return 0;
313}
314
315static int mlxsw_sp_port_attr_br_ageing_set(struct mlxsw_sp_port *mlxsw_sp_port,
316 struct switchdev_trans *trans,
Jiri Pirko135f9ec2015-10-28 10:17:02 +0100317 unsigned long ageing_clock_t)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200318{
319 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko135f9ec2015-10-28 10:17:02 +0100320 unsigned long ageing_jiffies = clock_t_to_jiffies(ageing_clock_t);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200321 u32 ageing_time = jiffies_to_msecs(ageing_jiffies) / 1000;
322
Ido Schimmel869f63a2016-03-08 12:59:33 -0800323 if (switchdev_trans_ph_prepare(trans)) {
324 if (ageing_time < MLXSW_SP_MIN_AGEING_TIME ||
325 ageing_time > MLXSW_SP_MAX_AGEING_TIME)
326 return -ERANGE;
327 else
328 return 0;
329 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200330
331 return mlxsw_sp_ageing_set(mlxsw_sp, ageing_time);
332}
333
Elad Raz26a4ea02016-01-06 13:01:10 +0100334static int mlxsw_sp_port_attr_br_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port,
335 struct switchdev_trans *trans,
336 struct net_device *orig_dev,
337 bool vlan_enabled)
338{
339 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
340
341 /* SWITCHDEV_TRANS_PREPARE phase */
342 if ((!vlan_enabled) && (mlxsw_sp->master_bridge.dev == orig_dev)) {
343 netdev_err(mlxsw_sp_port->dev, "Bridge must be vlan-aware\n");
344 return -EINVAL;
345 }
346
347 return 0;
348}
349
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200350static int mlxsw_sp_port_attr_set(struct net_device *dev,
351 const struct switchdev_attr *attr,
352 struct switchdev_trans *trans)
353{
354 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
355 int err = 0;
356
Ido Schimmel54a73202015-12-15 16:03:41 +0100357 mlxsw_sp_port = mlxsw_sp_port_orig_get(attr->orig_dev, mlxsw_sp_port);
358 if (!mlxsw_sp_port)
359 return -EINVAL;
360
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200361 switch (attr->id) {
362 case SWITCHDEV_ATTR_ID_PORT_STP_STATE:
363 err = mlxsw_sp_port_attr_stp_state_set(mlxsw_sp_port, trans,
364 attr->u.stp_state);
365 break;
366 case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
367 err = mlxsw_sp_port_attr_br_flags_set(mlxsw_sp_port, trans,
368 attr->u.brport_flags);
369 break;
370 case SWITCHDEV_ATTR_ID_BRIDGE_AGEING_TIME:
371 err = mlxsw_sp_port_attr_br_ageing_set(mlxsw_sp_port, trans,
372 attr->u.ageing_time);
373 break;
Elad Raz26a4ea02016-01-06 13:01:10 +0100374 case SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING:
375 err = mlxsw_sp_port_attr_br_vlan_set(mlxsw_sp_port, trans,
376 attr->orig_dev,
377 attr->u.vlan_filtering);
378 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200379 default:
380 err = -EOPNOTSUPP;
381 break;
382 }
383
384 return err;
385}
386
Ido Schimmel14d39462016-06-20 23:04:15 +0200387static struct mlxsw_sp_fid *mlxsw_sp_fid_find(struct mlxsw_sp *mlxsw_sp,
388 u16 fid)
389{
390 struct mlxsw_sp_fid *f;
391
392 list_for_each_entry(f, &mlxsw_sp->fids, list)
393 if (f->fid == fid)
394 return f;
395
396 return NULL;
397}
398
399static int mlxsw_sp_fid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
400{
401 char sfmr_pl[MLXSW_REG_SFMR_LEN];
402
403 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, fid);
404 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
405}
406
407static int mlxsw_sp_fid_map(struct mlxsw_sp *mlxsw_sp, u16 fid, bool valid)
408{
409 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_VID_TO_FID;
410 char svfa_pl[MLXSW_REG_SVFA_LEN];
411
412 mlxsw_reg_svfa_pack(svfa_pl, 0, mt, valid, fid, fid);
413 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
414}
415
416static struct mlxsw_sp_fid *mlxsw_sp_fid_alloc(u16 fid)
417{
418 struct mlxsw_sp_fid *f;
419
420 f = kzalloc(sizeof(*f), GFP_KERNEL);
421 if (!f)
422 return NULL;
423
424 f->fid = fid;
425
426 return f;
427}
428
429static struct mlxsw_sp_fid *mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp,
430 u16 fid)
431{
432 struct mlxsw_sp_fid *f;
433 int err;
434
435 err = mlxsw_sp_fid_op(mlxsw_sp, fid, true);
436 if (err)
437 return ERR_PTR(err);
438
439 /* Although all the ports member in the FID might be using a
440 * {Port, VID} to FID mapping, we create a global VID-to-FID
441 * mapping. This allows a port to transition to VLAN mode,
442 * knowing the global mapping exists.
443 */
444 err = mlxsw_sp_fid_map(mlxsw_sp, fid, true);
445 if (err)
446 goto err_fid_map;
447
448 f = mlxsw_sp_fid_alloc(fid);
449 if (!f) {
450 err = -ENOMEM;
451 goto err_allocate_fid;
452 }
453
454 list_add(&f->list, &mlxsw_sp->fids);
455
456 return f;
457
458err_allocate_fid:
459 mlxsw_sp_fid_map(mlxsw_sp, fid, false);
460err_fid_map:
461 mlxsw_sp_fid_op(mlxsw_sp, fid, false);
462 return ERR_PTR(err);
463}
464
465static void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp,
466 struct mlxsw_sp_fid *f)
467{
468 u16 fid = f->fid;
469
470 list_del(&f->list);
471
472 kfree(f);
473
474 mlxsw_sp_fid_op(mlxsw_sp, fid, false);
475}
476
477static int __mlxsw_sp_port_fid_join(struct mlxsw_sp_port *mlxsw_sp_port,
478 u16 fid)
479{
480 struct mlxsw_sp_fid *f;
481
482 f = mlxsw_sp_fid_find(mlxsw_sp_port->mlxsw_sp, fid);
483 if (!f) {
484 f = mlxsw_sp_fid_create(mlxsw_sp_port->mlxsw_sp, fid);
485 if (IS_ERR(f))
486 return PTR_ERR(f);
487 }
488
489 f->ref_count++;
490
Ido Schimmel22305372016-06-20 23:04:21 +0200491 netdev_dbg(mlxsw_sp_port->dev, "Joined FID=%d\n", fid);
492
Ido Schimmel14d39462016-06-20 23:04:15 +0200493 return 0;
494}
495
496static void __mlxsw_sp_port_fid_leave(struct mlxsw_sp_port *mlxsw_sp_port,
497 u16 fid)
498{
499 struct mlxsw_sp_fid *f;
500
501 f = mlxsw_sp_fid_find(mlxsw_sp_port->mlxsw_sp, fid);
502 if (WARN_ON(!f))
503 return;
504
Ido Schimmel22305372016-06-20 23:04:21 +0200505 netdev_dbg(mlxsw_sp_port->dev, "Left FID=%d\n", fid);
506
Ido Schimmelfe3f6d12016-06-20 23:04:19 +0200507 mlxsw_sp_port_fdb_flush(mlxsw_sp_port, fid);
508
Ido Schimmel14d39462016-06-20 23:04:15 +0200509 if (--f->ref_count == 0)
510 mlxsw_sp_fid_destroy(mlxsw_sp_port->mlxsw_sp, f);
511}
512
513static int mlxsw_sp_port_fid_map(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid,
514 bool valid)
515{
516 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
517
518 /* If port doesn't have vPorts, then it can use the global
519 * VID-to-FID mapping.
520 */
521 if (list_empty(&mlxsw_sp_port->vports_list))
522 return 0;
523
524 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, valid, fid, fid);
525}
526
527static int mlxsw_sp_port_fid_join(struct mlxsw_sp_port *mlxsw_sp_port,
528 u16 fid_begin, u16 fid_end)
529{
530 int fid, err;
531
532 for (fid = fid_begin; fid <= fid_end; fid++) {
533 err = __mlxsw_sp_port_fid_join(mlxsw_sp_port, fid);
534 if (err)
535 goto err_port_fid_join;
536 }
537
538 err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, fid_begin, fid_end,
539 true, false);
540 if (err)
541 goto err_port_flood_set;
542
543 for (fid = fid_begin; fid <= fid_end; fid++) {
544 err = mlxsw_sp_port_fid_map(mlxsw_sp_port, fid, true);
545 if (err)
546 goto err_port_fid_map;
547 }
548
549 return 0;
550
551err_port_fid_map:
552 for (fid--; fid >= fid_begin; fid--)
553 mlxsw_sp_port_fid_map(mlxsw_sp_port, fid, false);
554 __mlxsw_sp_port_flood_set(mlxsw_sp_port, fid_begin, fid_end, false,
555 false);
556err_port_flood_set:
557 fid = fid_end;
558err_port_fid_join:
559 for (fid--; fid >= fid_begin; fid--)
560 __mlxsw_sp_port_fid_leave(mlxsw_sp_port, fid);
561 return err;
562}
563
564static void mlxsw_sp_port_fid_leave(struct mlxsw_sp_port *mlxsw_sp_port,
565 u16 fid_begin, u16 fid_end)
566{
567 int fid;
568
569 for (fid = fid_begin; fid <= fid_end; fid++)
570 mlxsw_sp_port_fid_map(mlxsw_sp_port, fid, false);
571
572 __mlxsw_sp_port_flood_set(mlxsw_sp_port, fid_begin, fid_end, false,
573 false);
574
575 for (fid = fid_begin; fid <= fid_end; fid++)
576 __mlxsw_sp_port_fid_leave(mlxsw_sp_port, fid);
577}
578
Ido Schimmel28a01d22016-02-18 11:30:02 +0100579static int __mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port,
580 u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200581{
582 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
583 char spvid_pl[MLXSW_REG_SPVID_LEN];
584
585 mlxsw_reg_spvid_pack(spvid_pl, mlxsw_sp_port->local_port, vid);
586 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl);
587}
588
Ido Schimmel28a01d22016-02-18 11:30:02 +0100589static int mlxsw_sp_port_allow_untagged_set(struct mlxsw_sp_port *mlxsw_sp_port,
590 bool allow)
591{
592 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
593 char spaft_pl[MLXSW_REG_SPAFT_LEN];
594
595 mlxsw_reg_spaft_pack(spaft_pl, mlxsw_sp_port->local_port, allow);
596 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spaft), spaft_pl);
597}
598
599int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
600{
601 struct net_device *dev = mlxsw_sp_port->dev;
602 int err;
603
604 if (!vid) {
605 err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port, false);
606 if (err) {
607 netdev_err(dev, "Failed to disallow untagged traffic\n");
608 return err;
609 }
610 } else {
611 err = __mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid);
612 if (err) {
613 netdev_err(dev, "Failed to set PVID\n");
614 return err;
615 }
616
617 /* Only allow if not already allowed. */
618 if (!mlxsw_sp_port->pvid) {
619 err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port,
620 true);
621 if (err) {
622 netdev_err(dev, "Failed to allow untagged traffic\n");
623 goto err_port_allow_untagged_set;
624 }
625 }
626 }
627
628 mlxsw_sp_port->pvid = vid;
629 return 0;
630
631err_port_allow_untagged_set:
632 __mlxsw_sp_port_pvid_set(mlxsw_sp_port, mlxsw_sp_port->pvid);
633 return err;
634}
635
Ido Schimmel3b7ad5e2015-11-19 12:27:39 +0100636static int __mlxsw_sp_port_vlans_set(struct mlxsw_sp_port *mlxsw_sp_port,
637 u16 vid_begin, u16 vid_end, bool is_member,
638 bool untagged)
639{
640 u16 vid, vid_e;
641 int err;
642
643 for (vid = vid_begin; vid <= vid_end;
644 vid += MLXSW_REG_SPVM_REC_MAX_COUNT) {
645 vid_e = min((u16) (vid + MLXSW_REG_SPVM_REC_MAX_COUNT - 1),
646 vid_end);
647
648 err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid_e,
649 is_member, untagged);
650 if (err)
651 return err;
652 }
653
654 return 0;
655}
656
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200657static int __mlxsw_sp_port_vlans_add(struct mlxsw_sp_port *mlxsw_sp_port,
658 u16 vid_begin, u16 vid_end,
659 bool flag_untagged, bool flag_pvid)
660{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200661 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel14d39462016-06-20 23:04:15 +0200662 u16 vid, old_pvid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200663 int err;
664
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200665 if (!mlxsw_sp_port->bridged)
Ido Schimmel32d863f2016-07-02 11:00:10 +0200666 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200667
Ido Schimmel14d39462016-06-20 23:04:15 +0200668 err = mlxsw_sp_port_fid_join(mlxsw_sp_port, vid_begin, vid_end);
Ido Schimmel1b3433a2015-10-28 10:16:57 +0100669 if (err) {
Ido Schimmel14d39462016-06-20 23:04:15 +0200670 netdev_err(dev, "Failed to join FIDs\n");
671 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200672 }
673
Ido Schimmel3b7ad5e2015-11-19 12:27:39 +0100674 err = __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end,
675 true, flag_untagged);
676 if (err) {
677 netdev_err(dev, "Unable to add VIDs %d-%d\n", vid_begin,
678 vid_end);
Ido Schimmelb07a9662015-11-19 12:27:40 +0100679 goto err_port_vlans_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200680 }
681
Ido Schimmelb07a9662015-11-19 12:27:40 +0100682 old_pvid = mlxsw_sp_port->pvid;
683 if (flag_pvid && old_pvid != vid_begin) {
684 err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid_begin);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200685 if (err) {
Ido Schimmelb07a9662015-11-19 12:27:40 +0100686 netdev_err(dev, "Unable to add PVID %d\n", vid_begin);
687 goto err_port_pvid_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200688 }
Ido Schimmel28a01d22016-02-18 11:30:02 +0100689 } else if (!flag_pvid && old_pvid >= vid_begin && old_pvid <= vid_end) {
690 err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, 0);
691 if (err) {
692 netdev_err(dev, "Unable to del PVID\n");
693 goto err_port_pvid_set;
694 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200695 }
696
697 /* Changing activity bits only if HW operation succeded */
Elad Razfc1273a2016-01-06 13:01:11 +0100698 for (vid = vid_begin; vid <= vid_end; vid++) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200699 set_bit(vid, mlxsw_sp_port->active_vlans);
Elad Razfc1273a2016-01-06 13:01:11 +0100700 if (flag_untagged)
701 set_bit(vid, mlxsw_sp_port->untagged_vlans);
702 else
703 clear_bit(vid, mlxsw_sp_port->untagged_vlans);
704 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200705
Ido Schimmelb07a9662015-11-19 12:27:40 +0100706 /* STP state change must be done after we set active VLANs */
707 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_port,
708 mlxsw_sp_port->stp_state);
709 if (err) {
710 netdev_err(dev, "Failed to set STP state\n");
711 goto err_port_stp_state_set;
712 }
713
714 return 0;
715
Ido Schimmelb07a9662015-11-19 12:27:40 +0100716err_port_stp_state_set:
717 for (vid = vid_begin; vid <= vid_end; vid++)
718 clear_bit(vid, mlxsw_sp_port->active_vlans);
719 if (old_pvid != mlxsw_sp_port->pvid)
720 mlxsw_sp_port_pvid_set(mlxsw_sp_port, old_pvid);
721err_port_pvid_set:
722 __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end, false,
723 false);
724err_port_vlans_set:
Ido Schimmel14d39462016-06-20 23:04:15 +0200725 mlxsw_sp_port_fid_leave(mlxsw_sp_port, vid_begin, vid_end);
Ido Schimmelb07a9662015-11-19 12:27:40 +0100726 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200727}
728
729static int mlxsw_sp_port_vlans_add(struct mlxsw_sp_port *mlxsw_sp_port,
730 const struct switchdev_obj_port_vlan *vlan,
731 struct switchdev_trans *trans)
732{
Elad Raze4a13052016-01-06 13:01:09 +0100733 bool flag_untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
734 bool flag_pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200735
736 if (switchdev_trans_ph_prepare(trans))
737 return 0;
738
739 return __mlxsw_sp_port_vlans_add(mlxsw_sp_port,
740 vlan->vid_begin, vlan->vid_end,
Elad Raze4a13052016-01-06 13:01:09 +0100741 flag_untagged, flag_pvid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200742}
743
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100744static enum mlxsw_reg_sfd_rec_policy mlxsw_sp_sfd_rec_policy(bool dynamic)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200745{
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100746 return dynamic ? MLXSW_REG_SFD_REC_POLICY_DYNAMIC_ENTRY_INGRESS :
747 MLXSW_REG_SFD_REC_POLICY_STATIC_ENTRY;
748}
749
750static enum mlxsw_reg_sfd_op mlxsw_sp_sfd_op(bool adding)
751{
752 return adding ? MLXSW_REG_SFD_OP_WRITE_EDIT :
753 MLXSW_REG_SFD_OP_WRITE_REMOVE;
754}
755
Jiri Pirko2fa9d452016-01-07 11:50:29 +0100756static int mlxsw_sp_port_fdb_uc_op(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmel9de6a802015-12-15 16:03:40 +0100757 const char *mac, u16 fid, bool adding,
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100758 bool dynamic)
759{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200760 char *sfd_pl;
761 int err;
762
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200763 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
764 if (!sfd_pl)
765 return -ENOMEM;
766
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100767 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
768 mlxsw_reg_sfd_uc_pack(sfd_pl, 0, mlxsw_sp_sfd_rec_policy(dynamic),
Ido Schimmel9de6a802015-12-15 16:03:40 +0100769 mac, fid, MLXSW_REG_SFD_REC_ACTION_NOP,
Jiri Pirko2fa9d452016-01-07 11:50:29 +0100770 local_port);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100771 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
772 kfree(sfd_pl);
773
774 return err;
775}
776
777static int mlxsw_sp_port_fdb_uc_lag_op(struct mlxsw_sp *mlxsw_sp, u16 lag_id,
Ido Schimmel64771e32015-12-15 16:03:46 +0100778 const char *mac, u16 fid, u16 lag_vid,
779 bool adding, bool dynamic)
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100780{
781 char *sfd_pl;
782 int err;
783
784 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
785 if (!sfd_pl)
786 return -ENOMEM;
787
788 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
789 mlxsw_reg_sfd_uc_lag_pack(sfd_pl, 0, mlxsw_sp_sfd_rec_policy(dynamic),
Ido Schimmel64771e32015-12-15 16:03:46 +0100790 mac, fid, MLXSW_REG_SFD_REC_ACTION_NOP,
791 lag_vid, lag_id);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100792 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200793 kfree(sfd_pl);
794
795 return err;
796}
797
798static int
799mlxsw_sp_port_fdb_static_add(struct mlxsw_sp_port *mlxsw_sp_port,
800 const struct switchdev_obj_port_fdb *fdb,
801 struct switchdev_trans *trans)
802{
Elad Raze4b6f692016-01-10 21:06:27 +0100803 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, fdb->vid);
Ido Schimmel64771e32015-12-15 16:03:46 +0100804 u16 lag_vid = 0;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100805
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200806 if (switchdev_trans_ph_prepare(trans))
807 return 0;
808
Ido Schimmel54a73202015-12-15 16:03:41 +0100809 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
Ido Schimmel64771e32015-12-15 16:03:46 +0100810 lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
Ido Schimmel54a73202015-12-15 16:03:41 +0100811 }
812
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100813 if (!mlxsw_sp_port->lagged)
Jiri Pirko2fa9d452016-01-07 11:50:29 +0100814 return mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port->mlxsw_sp,
815 mlxsw_sp_port->local_port,
Ido Schimmel9de6a802015-12-15 16:03:40 +0100816 fdb->addr, fid, true, false);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100817 else
818 return mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp_port->mlxsw_sp,
819 mlxsw_sp_port->lag_id,
Ido Schimmel64771e32015-12-15 16:03:46 +0100820 fdb->addr, fid, lag_vid,
821 true, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200822}
823
Elad Raz3a49b4f2016-01-10 21:06:28 +0100824static int mlxsw_sp_port_mdb_op(struct mlxsw_sp *mlxsw_sp, const char *addr,
825 u16 fid, u16 mid, bool adding)
826{
827 char *sfd_pl;
828 int err;
829
830 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
831 if (!sfd_pl)
832 return -ENOMEM;
833
834 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
835 mlxsw_reg_sfd_mc_pack(sfd_pl, 0, addr, fid,
836 MLXSW_REG_SFD_REC_ACTION_NOP, mid);
837 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
838 kfree(sfd_pl);
839 return err;
840}
841
842static int mlxsw_sp_port_smid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mid,
843 bool add, bool clear_all_ports)
844{
845 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
846 char *smid_pl;
847 int err, i;
848
849 smid_pl = kmalloc(MLXSW_REG_SMID_LEN, GFP_KERNEL);
850 if (!smid_pl)
851 return -ENOMEM;
852
853 mlxsw_reg_smid_pack(smid_pl, mid, mlxsw_sp_port->local_port, add);
854 if (clear_all_ports) {
855 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
856 if (mlxsw_sp->ports[i])
857 mlxsw_reg_smid_port_mask_set(smid_pl, i, 1);
858 }
859 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid), smid_pl);
860 kfree(smid_pl);
861 return err;
862}
863
864static struct mlxsw_sp_mid *__mlxsw_sp_mc_get(struct mlxsw_sp *mlxsw_sp,
865 const unsigned char *addr,
866 u16 vid)
867{
868 struct mlxsw_sp_mid *mid;
869
870 list_for_each_entry(mid, &mlxsw_sp->br_mids.list, list) {
871 if (ether_addr_equal(mid->addr, addr) && mid->vid == vid)
872 return mid;
873 }
874 return NULL;
875}
876
877static struct mlxsw_sp_mid *__mlxsw_sp_mc_alloc(struct mlxsw_sp *mlxsw_sp,
878 const unsigned char *addr,
879 u16 vid)
880{
881 struct mlxsw_sp_mid *mid;
882 u16 mid_idx;
883
884 mid_idx = find_first_zero_bit(mlxsw_sp->br_mids.mapped,
885 MLXSW_SP_MID_MAX);
886 if (mid_idx == MLXSW_SP_MID_MAX)
887 return NULL;
888
889 mid = kzalloc(sizeof(*mid), GFP_KERNEL);
890 if (!mid)
891 return NULL;
892
893 set_bit(mid_idx, mlxsw_sp->br_mids.mapped);
894 ether_addr_copy(mid->addr, addr);
895 mid->vid = vid;
896 mid->mid = mid_idx;
897 mid->ref_count = 0;
898 list_add_tail(&mid->list, &mlxsw_sp->br_mids.list);
899
900 return mid;
901}
902
903static int __mlxsw_sp_mc_dec_ref(struct mlxsw_sp *mlxsw_sp,
904 struct mlxsw_sp_mid *mid)
905{
906 if (--mid->ref_count == 0) {
907 list_del(&mid->list);
908 clear_bit(mid->mid, mlxsw_sp->br_mids.mapped);
909 kfree(mid);
910 return 1;
911 }
912 return 0;
913}
914
915static int mlxsw_sp_port_mdb_add(struct mlxsw_sp_port *mlxsw_sp_port,
916 const struct switchdev_obj_port_mdb *mdb,
917 struct switchdev_trans *trans)
918{
919 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
920 struct net_device *dev = mlxsw_sp_port->dev;
921 struct mlxsw_sp_mid *mid;
922 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, mdb->vid);
923 int err = 0;
924
925 if (switchdev_trans_ph_prepare(trans))
926 return 0;
927
928 mid = __mlxsw_sp_mc_get(mlxsw_sp, mdb->addr, mdb->vid);
929 if (!mid) {
930 mid = __mlxsw_sp_mc_alloc(mlxsw_sp, mdb->addr, mdb->vid);
931 if (!mid) {
932 netdev_err(dev, "Unable to allocate MC group\n");
933 return -ENOMEM;
934 }
935 }
936 mid->ref_count++;
937
938 err = mlxsw_sp_port_smid_set(mlxsw_sp_port, mid->mid, true,
939 mid->ref_count == 1);
940 if (err) {
941 netdev_err(dev, "Unable to set SMID\n");
942 goto err_out;
943 }
944
945 if (mid->ref_count == 1) {
946 err = mlxsw_sp_port_mdb_op(mlxsw_sp, mdb->addr, fid, mid->mid,
947 true);
948 if (err) {
949 netdev_err(dev, "Unable to set MC SFD\n");
950 goto err_out;
951 }
952 }
953
954 return 0;
955
956err_out:
957 __mlxsw_sp_mc_dec_ref(mlxsw_sp, mid);
958 return err;
959}
960
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200961static int mlxsw_sp_port_obj_add(struct net_device *dev,
962 const struct switchdev_obj *obj,
963 struct switchdev_trans *trans)
964{
965 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
966 int err = 0;
967
Ido Schimmel54a73202015-12-15 16:03:41 +0100968 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
969 if (!mlxsw_sp_port)
970 return -EINVAL;
971
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200972 switch (obj->id) {
973 case SWITCHDEV_OBJ_ID_PORT_VLAN:
Ido Schimmel54a73202015-12-15 16:03:41 +0100974 if (mlxsw_sp_port_is_vport(mlxsw_sp_port))
975 return 0;
976
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200977 err = mlxsw_sp_port_vlans_add(mlxsw_sp_port,
978 SWITCHDEV_OBJ_PORT_VLAN(obj),
979 trans);
980 break;
Jiri Pirko61c503f2016-07-04 08:23:11 +0200981 case SWITCHDEV_OBJ_ID_IPV4_FIB:
982 err = mlxsw_sp_router_fib4_add(mlxsw_sp_port,
983 SWITCHDEV_OBJ_IPV4_FIB(obj),
984 trans);
985 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200986 case SWITCHDEV_OBJ_ID_PORT_FDB:
987 err = mlxsw_sp_port_fdb_static_add(mlxsw_sp_port,
988 SWITCHDEV_OBJ_PORT_FDB(obj),
989 trans);
990 break;
Elad Raz3a49b4f2016-01-10 21:06:28 +0100991 case SWITCHDEV_OBJ_ID_PORT_MDB:
992 err = mlxsw_sp_port_mdb_add(mlxsw_sp_port,
993 SWITCHDEV_OBJ_PORT_MDB(obj),
994 trans);
995 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200996 default:
997 err = -EOPNOTSUPP;
998 break;
999 }
1000
1001 return err;
1002}
1003
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001004static int __mlxsw_sp_port_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port,
1005 u16 vid_begin, u16 vid_end, bool init)
1006{
1007 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel3b7ad5e2015-11-19 12:27:39 +01001008 u16 vid, pvid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001009 int err;
1010
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001011 if (!init && !mlxsw_sp_port->bridged)
Ido Schimmel32d863f2016-07-02 11:00:10 +02001012 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001013
Ido Schimmel3b7ad5e2015-11-19 12:27:39 +01001014 err = __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end,
1015 false, false);
1016 if (err) {
1017 netdev_err(dev, "Unable to del VIDs %d-%d\n", vid_begin,
1018 vid_end);
1019 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001020 }
1021
Ido Schimmel28a01d22016-02-18 11:30:02 +01001022 if (init)
1023 goto out;
1024
Ido Schimmel06c071f2015-11-19 12:27:38 +01001025 pvid = mlxsw_sp_port->pvid;
Ido Schimmel28a01d22016-02-18 11:30:02 +01001026 if (pvid >= vid_begin && pvid <= vid_end) {
1027 err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001028 if (err) {
Ido Schimmel06c071f2015-11-19 12:27:38 +01001029 netdev_err(dev, "Unable to del PVID %d\n", pvid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001030 return err;
1031 }
1032 }
1033
Ido Schimmel14d39462016-06-20 23:04:15 +02001034 mlxsw_sp_port_fid_leave(mlxsw_sp_port, vid_begin, vid_end);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001035
1036out:
1037 /* Changing activity bits only if HW operation succeded */
1038 for (vid = vid_begin; vid <= vid_end; vid++)
1039 clear_bit(vid, mlxsw_sp_port->active_vlans);
1040
1041 return 0;
1042}
1043
1044static int mlxsw_sp_port_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port,
1045 const struct switchdev_obj_port_vlan *vlan)
1046{
1047 return __mlxsw_sp_port_vlans_del(mlxsw_sp_port,
1048 vlan->vid_begin, vlan->vid_end, false);
1049}
1050
Ido Schimmel4dc236c2016-01-27 15:20:16 +01001051void mlxsw_sp_port_active_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port)
1052{
1053 u16 vid;
1054
1055 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID)
1056 __mlxsw_sp_port_vlans_del(mlxsw_sp_port, vid, vid, false);
1057}
1058
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001059static int
1060mlxsw_sp_port_fdb_static_del(struct mlxsw_sp_port *mlxsw_sp_port,
1061 const struct switchdev_obj_port_fdb *fdb)
1062{
Elad Raze4b6f692016-01-10 21:06:27 +01001063 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, fdb->vid);
Ido Schimmel64771e32015-12-15 16:03:46 +01001064 u16 lag_vid = 0;
Ido Schimmel9de6a802015-12-15 16:03:40 +01001065
Ido Schimmel54a73202015-12-15 16:03:41 +01001066 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
Ido Schimmel64771e32015-12-15 16:03:46 +01001067 lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
Ido Schimmel54a73202015-12-15 16:03:41 +01001068 }
1069
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001070 if (!mlxsw_sp_port->lagged)
Jiri Pirko2fa9d452016-01-07 11:50:29 +01001071 return mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port->mlxsw_sp,
1072 mlxsw_sp_port->local_port,
Ido Schimmel9de6a802015-12-15 16:03:40 +01001073 fdb->addr, fid,
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001074 false, false);
1075 else
1076 return mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp_port->mlxsw_sp,
1077 mlxsw_sp_port->lag_id,
Ido Schimmel64771e32015-12-15 16:03:46 +01001078 fdb->addr, fid, lag_vid,
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001079 false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001080}
1081
Elad Raz3a49b4f2016-01-10 21:06:28 +01001082static int mlxsw_sp_port_mdb_del(struct mlxsw_sp_port *mlxsw_sp_port,
1083 const struct switchdev_obj_port_mdb *mdb)
1084{
1085 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1086 struct net_device *dev = mlxsw_sp_port->dev;
1087 struct mlxsw_sp_mid *mid;
1088 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, mdb->vid);
1089 u16 mid_idx;
1090 int err = 0;
1091
1092 mid = __mlxsw_sp_mc_get(mlxsw_sp, mdb->addr, mdb->vid);
1093 if (!mid) {
1094 netdev_err(dev, "Unable to remove port from MC DB\n");
1095 return -EINVAL;
1096 }
1097
1098 err = mlxsw_sp_port_smid_set(mlxsw_sp_port, mid->mid, false, false);
1099 if (err)
1100 netdev_err(dev, "Unable to remove port from SMID\n");
1101
1102 mid_idx = mid->mid;
1103 if (__mlxsw_sp_mc_dec_ref(mlxsw_sp, mid)) {
1104 err = mlxsw_sp_port_mdb_op(mlxsw_sp, mdb->addr, fid, mid_idx,
1105 false);
1106 if (err)
1107 netdev_err(dev, "Unable to remove MC SFD\n");
1108 }
1109
1110 return err;
1111}
1112
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001113static int mlxsw_sp_port_obj_del(struct net_device *dev,
1114 const struct switchdev_obj *obj)
1115{
1116 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1117 int err = 0;
1118
Ido Schimmel54a73202015-12-15 16:03:41 +01001119 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
1120 if (!mlxsw_sp_port)
1121 return -EINVAL;
1122
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001123 switch (obj->id) {
1124 case SWITCHDEV_OBJ_ID_PORT_VLAN:
Ido Schimmel54a73202015-12-15 16:03:41 +01001125 if (mlxsw_sp_port_is_vport(mlxsw_sp_port))
1126 return 0;
1127
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001128 err = mlxsw_sp_port_vlans_del(mlxsw_sp_port,
1129 SWITCHDEV_OBJ_PORT_VLAN(obj));
1130 break;
Jiri Pirko61c503f2016-07-04 08:23:11 +02001131 case SWITCHDEV_OBJ_ID_IPV4_FIB:
1132 err = mlxsw_sp_router_fib4_del(mlxsw_sp_port,
1133 SWITCHDEV_OBJ_IPV4_FIB(obj));
1134 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001135 case SWITCHDEV_OBJ_ID_PORT_FDB:
1136 err = mlxsw_sp_port_fdb_static_del(mlxsw_sp_port,
1137 SWITCHDEV_OBJ_PORT_FDB(obj));
1138 break;
Elad Raz3a49b4f2016-01-10 21:06:28 +01001139 case SWITCHDEV_OBJ_ID_PORT_MDB:
1140 err = mlxsw_sp_port_mdb_del(mlxsw_sp_port,
1141 SWITCHDEV_OBJ_PORT_MDB(obj));
Dan Carpenter00ae40e2016-01-13 15:28:23 +03001142 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001143 default:
1144 err = -EOPNOTSUPP;
1145 break;
1146 }
1147
1148 return err;
1149}
1150
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001151static struct mlxsw_sp_port *mlxsw_sp_lag_rep_port(struct mlxsw_sp *mlxsw_sp,
1152 u16 lag_id)
1153{
1154 struct mlxsw_sp_port *mlxsw_sp_port;
1155 int i;
1156
1157 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
1158 mlxsw_sp_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
1159 if (mlxsw_sp_port)
1160 return mlxsw_sp_port;
1161 }
1162 return NULL;
1163}
1164
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001165static int mlxsw_sp_port_fdb_dump(struct mlxsw_sp_port *mlxsw_sp_port,
1166 struct switchdev_obj_port_fdb *fdb,
Ido Schimmel304f5152016-01-27 15:20:24 +01001167 switchdev_obj_dump_cb_t *cb,
1168 struct net_device *orig_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001169{
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001170 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel3f47f862016-01-27 15:20:25 +01001171 struct mlxsw_sp_port *tmp;
Ido Schimmel56918b62016-06-20 23:04:18 +02001172 struct mlxsw_sp_fid *f;
1173 u16 vport_fid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001174 char *sfd_pl;
1175 char mac[ETH_ALEN];
Ido Schimmel9de6a802015-12-15 16:03:40 +01001176 u16 fid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001177 u8 local_port;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001178 u16 lag_id;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001179 u8 num_rec;
1180 int stored_err = 0;
1181 int i;
1182 int err;
1183
1184 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
1185 if (!sfd_pl)
1186 return -ENOMEM;
1187
Ido Schimmel56918b62016-06-20 23:04:18 +02001188 f = mlxsw_sp_vport_fid_get(mlxsw_sp_port);
1189 vport_fid = f ? f->fid : 0;
Ido Schimmel54a73202015-12-15 16:03:41 +01001190
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001191 mlxsw_reg_sfd_pack(sfd_pl, MLXSW_REG_SFD_OP_QUERY_DUMP, 0);
1192 do {
1193 mlxsw_reg_sfd_num_rec_set(sfd_pl, MLXSW_REG_SFD_REC_MAX_COUNT);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001194 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001195 if (err)
1196 goto out;
1197
1198 num_rec = mlxsw_reg_sfd_num_rec_get(sfd_pl);
1199
1200 /* Even in case of error, we have to run the dump to the end
1201 * so the session in firmware is finished.
1202 */
1203 if (stored_err)
1204 continue;
1205
1206 for (i = 0; i < num_rec; i++) {
1207 switch (mlxsw_reg_sfd_rec_type_get(sfd_pl, i)) {
1208 case MLXSW_REG_SFD_REC_TYPE_UNICAST:
Ido Schimmel9de6a802015-12-15 16:03:40 +01001209 mlxsw_reg_sfd_uc_unpack(sfd_pl, i, mac, &fid,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001210 &local_port);
1211 if (local_port == mlxsw_sp_port->local_port) {
Ido Schimmel004f85e2016-01-27 15:20:22 +01001212 if (vport_fid && vport_fid == fid)
1213 fdb->vid = 0;
1214 else if (!vport_fid &&
1215 !mlxsw_sp_fid_is_vfid(fid))
Ido Schimmel54a73202015-12-15 16:03:41 +01001216 fdb->vid = fid;
Ido Schimmel004f85e2016-01-27 15:20:22 +01001217 else
1218 continue;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001219 ether_addr_copy(fdb->addr, mac);
1220 fdb->ndm_state = NUD_REACHABLE;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001221 err = cb(&fdb->obj);
1222 if (err)
1223 stored_err = err;
1224 }
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001225 break;
1226 case MLXSW_REG_SFD_REC_TYPE_UNICAST_LAG:
1227 mlxsw_reg_sfd_uc_lag_unpack(sfd_pl, i,
Ido Schimmel9de6a802015-12-15 16:03:40 +01001228 mac, &fid, &lag_id);
Ido Schimmel3f47f862016-01-27 15:20:25 +01001229 tmp = mlxsw_sp_lag_rep_port(mlxsw_sp, lag_id);
1230 if (tmp && tmp->local_port ==
1231 mlxsw_sp_port->local_port) {
Ido Schimmel304f5152016-01-27 15:20:24 +01001232 /* LAG records can only point to LAG
1233 * devices or VLAN devices on top.
1234 */
1235 if (!netif_is_lag_master(orig_dev) &&
1236 !is_vlan_dev(orig_dev))
1237 continue;
Ido Schimmel004f85e2016-01-27 15:20:22 +01001238 if (vport_fid && vport_fid == fid)
1239 fdb->vid = 0;
1240 else if (!vport_fid &&
1241 !mlxsw_sp_fid_is_vfid(fid))
Ido Schimmel54a73202015-12-15 16:03:41 +01001242 fdb->vid = fid;
Ido Schimmel004f85e2016-01-27 15:20:22 +01001243 else
1244 continue;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001245 ether_addr_copy(fdb->addr, mac);
1246 fdb->ndm_state = NUD_REACHABLE;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001247 err = cb(&fdb->obj);
1248 if (err)
1249 stored_err = err;
1250 }
1251 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001252 }
1253 }
1254 } while (num_rec == MLXSW_REG_SFD_REC_MAX_COUNT);
1255
1256out:
1257 kfree(sfd_pl);
1258 return stored_err ? stored_err : err;
1259}
1260
1261static int mlxsw_sp_port_vlan_dump(struct mlxsw_sp_port *mlxsw_sp_port,
1262 struct switchdev_obj_port_vlan *vlan,
1263 switchdev_obj_dump_cb_t *cb)
1264{
1265 u16 vid;
1266 int err = 0;
1267
Ido Schimmel54a73202015-12-15 16:03:41 +01001268 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
1269 vlan->flags = 0;
1270 vlan->vid_begin = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
1271 vlan->vid_end = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
1272 return cb(&vlan->obj);
1273 }
1274
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001275 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1276 vlan->flags = 0;
1277 if (vid == mlxsw_sp_port->pvid)
1278 vlan->flags |= BRIDGE_VLAN_INFO_PVID;
Elad Razfc1273a2016-01-06 13:01:11 +01001279 if (test_bit(vid, mlxsw_sp_port->untagged_vlans))
1280 vlan->flags |= BRIDGE_VLAN_INFO_UNTAGGED;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001281 vlan->vid_begin = vid;
1282 vlan->vid_end = vid;
1283 err = cb(&vlan->obj);
1284 if (err)
1285 break;
1286 }
1287 return err;
1288}
1289
1290static int mlxsw_sp_port_obj_dump(struct net_device *dev,
1291 struct switchdev_obj *obj,
1292 switchdev_obj_dump_cb_t *cb)
1293{
1294 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1295 int err = 0;
1296
Ido Schimmel54a73202015-12-15 16:03:41 +01001297 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
1298 if (!mlxsw_sp_port)
1299 return -EINVAL;
1300
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001301 switch (obj->id) {
1302 case SWITCHDEV_OBJ_ID_PORT_VLAN:
1303 err = mlxsw_sp_port_vlan_dump(mlxsw_sp_port,
1304 SWITCHDEV_OBJ_PORT_VLAN(obj), cb);
1305 break;
1306 case SWITCHDEV_OBJ_ID_PORT_FDB:
1307 err = mlxsw_sp_port_fdb_dump(mlxsw_sp_port,
Ido Schimmel304f5152016-01-27 15:20:24 +01001308 SWITCHDEV_OBJ_PORT_FDB(obj), cb,
1309 obj->orig_dev);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001310 break;
1311 default:
1312 err = -EOPNOTSUPP;
1313 break;
1314 }
1315
1316 return err;
1317}
1318
Jiri Pirkoc7070fc2015-10-28 10:17:05 +01001319static const struct switchdev_ops mlxsw_sp_port_switchdev_ops = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001320 .switchdev_port_attr_get = mlxsw_sp_port_attr_get,
1321 .switchdev_port_attr_set = mlxsw_sp_port_attr_set,
1322 .switchdev_port_obj_add = mlxsw_sp_port_obj_add,
1323 .switchdev_port_obj_del = mlxsw_sp_port_obj_del,
1324 .switchdev_port_obj_dump = mlxsw_sp_port_obj_dump,
1325};
1326
Ido Schimmel45827d72016-01-27 15:20:21 +01001327static void mlxsw_sp_fdb_call_notifiers(bool learning_sync, bool adding,
1328 char *mac, u16 vid,
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001329 struct net_device *dev)
1330{
1331 struct switchdev_notifier_fdb_info info;
1332 unsigned long notifier_type;
1333
Ido Schimmel45827d72016-01-27 15:20:21 +01001334 if (learning_sync) {
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001335 info.addr = mac;
1336 info.vid = vid;
1337 notifier_type = adding ? SWITCHDEV_FDB_ADD : SWITCHDEV_FDB_DEL;
1338 call_switchdev_notifiers(notifier_type, dev, &info.info);
1339 }
1340}
1341
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001342static void mlxsw_sp_fdb_notify_mac_process(struct mlxsw_sp *mlxsw_sp,
1343 char *sfn_pl, int rec_index,
1344 bool adding)
1345{
1346 struct mlxsw_sp_port *mlxsw_sp_port;
1347 char mac[ETH_ALEN];
1348 u8 local_port;
Ido Schimmel9de6a802015-12-15 16:03:40 +01001349 u16 vid, fid;
Jiri Pirko12f15012016-01-07 11:50:30 +01001350 bool do_notification = true;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001351 int err;
1352
Ido Schimmel9de6a802015-12-15 16:03:40 +01001353 mlxsw_reg_sfn_mac_unpack(sfn_pl, rec_index, mac, &fid, &local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001354 mlxsw_sp_port = mlxsw_sp->ports[local_port];
1355 if (!mlxsw_sp_port) {
1356 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Incorrect local port in FDB notification\n");
Jiri Pirko12f15012016-01-07 11:50:30 +01001357 goto just_remove;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001358 }
1359
Ido Schimmelaac78a42015-12-15 16:03:42 +01001360 if (mlxsw_sp_fid_is_vfid(fid)) {
Ido Schimmelaac78a42015-12-15 16:03:42 +01001361 struct mlxsw_sp_port *mlxsw_sp_vport;
1362
Ido Schimmeld0ec8752016-06-20 23:04:12 +02001363 mlxsw_sp_vport = mlxsw_sp_port_vport_find_by_fid(mlxsw_sp_port,
1364 fid);
Ido Schimmelaac78a42015-12-15 16:03:42 +01001365 if (!mlxsw_sp_vport) {
1366 netdev_err(mlxsw_sp_port->dev, "Failed to find a matching vPort following FDB notification\n");
Jiri Pirko12f15012016-01-07 11:50:30 +01001367 goto just_remove;
Ido Schimmelaac78a42015-12-15 16:03:42 +01001368 }
Ido Schimmel004f85e2016-01-27 15:20:22 +01001369 vid = 0;
Ido Schimmelaac78a42015-12-15 16:03:42 +01001370 /* Override the physical port with the vPort. */
1371 mlxsw_sp_port = mlxsw_sp_vport;
1372 } else {
1373 vid = fid;
1374 }
1375
Jiri Pirko12f15012016-01-07 11:50:30 +01001376 adding = adding && mlxsw_sp_port->learning;
1377
1378do_fdb_op:
Jiri Pirko2fa9d452016-01-07 11:50:29 +01001379 err = mlxsw_sp_port_fdb_uc_op(mlxsw_sp, local_port, mac, fid,
Jiri Pirko12f15012016-01-07 11:50:30 +01001380 adding, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001381 if (err) {
1382 if (net_ratelimit())
1383 netdev_err(mlxsw_sp_port->dev, "Failed to set FDB entry\n");
1384 return;
1385 }
1386
Jiri Pirko12f15012016-01-07 11:50:30 +01001387 if (!do_notification)
1388 return;
Ido Schimmel45827d72016-01-27 15:20:21 +01001389 mlxsw_sp_fdb_call_notifiers(mlxsw_sp_port->learning_sync,
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001390 adding, mac, vid, mlxsw_sp_port->dev);
Jiri Pirko12f15012016-01-07 11:50:30 +01001391 return;
1392
1393just_remove:
1394 adding = false;
1395 do_notification = false;
1396 goto do_fdb_op;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001397}
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001398
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001399static void mlxsw_sp_fdb_notify_mac_lag_process(struct mlxsw_sp *mlxsw_sp,
1400 char *sfn_pl, int rec_index,
1401 bool adding)
1402{
1403 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmele43aca22016-01-27 15:20:23 +01001404 struct net_device *dev;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001405 char mac[ETH_ALEN];
Ido Schimmel64771e32015-12-15 16:03:46 +01001406 u16 lag_vid = 0;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001407 u16 lag_id;
Ido Schimmel9de6a802015-12-15 16:03:40 +01001408 u16 vid, fid;
Jiri Pirko12f15012016-01-07 11:50:30 +01001409 bool do_notification = true;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001410 int err;
1411
Ido Schimmel9de6a802015-12-15 16:03:40 +01001412 mlxsw_reg_sfn_mac_lag_unpack(sfn_pl, rec_index, mac, &fid, &lag_id);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001413 mlxsw_sp_port = mlxsw_sp_lag_rep_port(mlxsw_sp, lag_id);
1414 if (!mlxsw_sp_port) {
1415 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Cannot find port representor for LAG\n");
Jiri Pirko12f15012016-01-07 11:50:30 +01001416 goto just_remove;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001417 }
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001418
Ido Schimmelaac78a42015-12-15 16:03:42 +01001419 if (mlxsw_sp_fid_is_vfid(fid)) {
Ido Schimmelaac78a42015-12-15 16:03:42 +01001420 struct mlxsw_sp_port *mlxsw_sp_vport;
1421
Ido Schimmeld0ec8752016-06-20 23:04:12 +02001422 mlxsw_sp_vport = mlxsw_sp_port_vport_find_by_fid(mlxsw_sp_port,
1423 fid);
Ido Schimmelaac78a42015-12-15 16:03:42 +01001424 if (!mlxsw_sp_vport) {
1425 netdev_err(mlxsw_sp_port->dev, "Failed to find a matching vPort following FDB notification\n");
Jiri Pirko12f15012016-01-07 11:50:30 +01001426 goto just_remove;
Ido Schimmelaac78a42015-12-15 16:03:42 +01001427 }
1428
Ido Schimmel004f85e2016-01-27 15:20:22 +01001429 lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmele43aca22016-01-27 15:20:23 +01001430 dev = mlxsw_sp_vport->dev;
Ido Schimmel004f85e2016-01-27 15:20:22 +01001431 vid = 0;
Ido Schimmelaac78a42015-12-15 16:03:42 +01001432 /* Override the physical port with the vPort. */
1433 mlxsw_sp_port = mlxsw_sp_vport;
1434 } else {
Ido Schimmele43aca22016-01-27 15:20:23 +01001435 dev = mlxsw_sp_lag_get(mlxsw_sp, lag_id)->dev;
Ido Schimmelaac78a42015-12-15 16:03:42 +01001436 vid = fid;
1437 }
1438
Jiri Pirko12f15012016-01-07 11:50:30 +01001439 adding = adding && mlxsw_sp_port->learning;
1440
1441do_fdb_op:
Ido Schimmel64771e32015-12-15 16:03:46 +01001442 err = mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp, lag_id, mac, fid, lag_vid,
Jiri Pirko12f15012016-01-07 11:50:30 +01001443 adding, true);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001444 if (err) {
1445 if (net_ratelimit())
1446 netdev_err(mlxsw_sp_port->dev, "Failed to set FDB entry\n");
1447 return;
1448 }
1449
Jiri Pirko12f15012016-01-07 11:50:30 +01001450 if (!do_notification)
1451 return;
Ido Schimmel45827d72016-01-27 15:20:21 +01001452 mlxsw_sp_fdb_call_notifiers(mlxsw_sp_port->learning_sync, adding, mac,
Ido Schimmele43aca22016-01-27 15:20:23 +01001453 vid, dev);
Jiri Pirko12f15012016-01-07 11:50:30 +01001454 return;
1455
1456just_remove:
1457 adding = false;
1458 do_notification = false;
1459 goto do_fdb_op;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001460}
1461
1462static void mlxsw_sp_fdb_notify_rec_process(struct mlxsw_sp *mlxsw_sp,
1463 char *sfn_pl, int rec_index)
1464{
1465 switch (mlxsw_reg_sfn_rec_type_get(sfn_pl, rec_index)) {
1466 case MLXSW_REG_SFN_REC_TYPE_LEARNED_MAC:
1467 mlxsw_sp_fdb_notify_mac_process(mlxsw_sp, sfn_pl,
1468 rec_index, true);
1469 break;
1470 case MLXSW_REG_SFN_REC_TYPE_AGED_OUT_MAC:
1471 mlxsw_sp_fdb_notify_mac_process(mlxsw_sp, sfn_pl,
1472 rec_index, false);
1473 break;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001474 case MLXSW_REG_SFN_REC_TYPE_LEARNED_MAC_LAG:
1475 mlxsw_sp_fdb_notify_mac_lag_process(mlxsw_sp, sfn_pl,
1476 rec_index, true);
1477 break;
1478 case MLXSW_REG_SFN_REC_TYPE_AGED_OUT_MAC_LAG:
1479 mlxsw_sp_fdb_notify_mac_lag_process(mlxsw_sp, sfn_pl,
1480 rec_index, false);
1481 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001482 }
1483}
1484
1485static void mlxsw_sp_fdb_notify_work_schedule(struct mlxsw_sp *mlxsw_sp)
1486{
Jiri Pirkodd9bdb02016-04-14 18:19:28 +02001487 mlxsw_core_schedule_dw(&mlxsw_sp->fdb_notify.dw,
1488 msecs_to_jiffies(mlxsw_sp->fdb_notify.interval));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001489}
1490
1491static void mlxsw_sp_fdb_notify_work(struct work_struct *work)
1492{
1493 struct mlxsw_sp *mlxsw_sp;
1494 char *sfn_pl;
1495 u8 num_rec;
1496 int i;
1497 int err;
1498
1499 sfn_pl = kmalloc(MLXSW_REG_SFN_LEN, GFP_KERNEL);
1500 if (!sfn_pl)
1501 return;
1502
1503 mlxsw_sp = container_of(work, struct mlxsw_sp, fdb_notify.dw.work);
1504
Ido Schimmel4f2c6ae2016-01-27 15:16:43 +01001505 rtnl_lock();
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001506 do {
1507 mlxsw_reg_sfn_pack(sfn_pl);
1508 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(sfn), sfn_pl);
1509 if (err) {
1510 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Failed to get FDB notifications\n");
1511 break;
1512 }
1513 num_rec = mlxsw_reg_sfn_num_rec_get(sfn_pl);
1514 for (i = 0; i < num_rec; i++)
1515 mlxsw_sp_fdb_notify_rec_process(mlxsw_sp, sfn_pl, i);
1516
1517 } while (num_rec);
Ido Schimmel4f2c6ae2016-01-27 15:16:43 +01001518 rtnl_unlock();
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001519
1520 kfree(sfn_pl);
1521 mlxsw_sp_fdb_notify_work_schedule(mlxsw_sp);
1522}
1523
1524static int mlxsw_sp_fdb_init(struct mlxsw_sp *mlxsw_sp)
1525{
1526 int err;
1527
1528 err = mlxsw_sp_ageing_set(mlxsw_sp, MLXSW_SP_DEFAULT_AGEING_TIME);
1529 if (err) {
1530 dev_err(mlxsw_sp->bus_info->dev, "Failed to set default ageing time\n");
1531 return err;
1532 }
1533 INIT_DELAYED_WORK(&mlxsw_sp->fdb_notify.dw, mlxsw_sp_fdb_notify_work);
1534 mlxsw_sp->fdb_notify.interval = MLXSW_SP_DEFAULT_LEARNING_INTERVAL;
1535 mlxsw_sp_fdb_notify_work_schedule(mlxsw_sp);
1536 return 0;
1537}
1538
1539static void mlxsw_sp_fdb_fini(struct mlxsw_sp *mlxsw_sp)
1540{
1541 cancel_delayed_work_sync(&mlxsw_sp->fdb_notify.dw);
1542}
1543
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001544int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp)
1545{
1546 return mlxsw_sp_fdb_init(mlxsw_sp);
1547}
1548
1549void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp)
1550{
1551 mlxsw_sp_fdb_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001552}
1553
1554int mlxsw_sp_port_vlan_init(struct mlxsw_sp_port *mlxsw_sp_port)
1555{
1556 struct net_device *dev = mlxsw_sp_port->dev;
1557 int err;
1558
1559 /* Allow only untagged packets to ingress and tag them internally
1560 * with VID 1.
1561 */
1562 mlxsw_sp_port->pvid = 1;
Elad Raz29edf442016-01-06 13:01:08 +01001563 err = __mlxsw_sp_port_vlans_del(mlxsw_sp_port, 0, VLAN_N_VID - 1,
1564 true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001565 if (err) {
1566 netdev_err(dev, "Unable to init VLANs\n");
1567 return err;
1568 }
1569
1570 /* Add implicit VLAN interface in the device, so that untagged
1571 * packets will be classified to the default vFID.
1572 */
1573 err = mlxsw_sp_port_add_vid(dev, 0, 1);
1574 if (err)
1575 netdev_err(dev, "Failed to configure default vFID\n");
1576
1577 return err;
1578}
1579
1580void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port)
1581{
1582 mlxsw_sp_port->dev->switchdev_ops = &mlxsw_sp_port_switchdev_ops;
1583}
1584
1585void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port)
1586{
1587}