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Dinh Nguyen30f9f2f2012-09-27 10:58:06 -06001/*
2 * NAND Flash Controller Device Driver for DT
3 *
4 * Copyright © 2011, Picochip.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
Masahiro Yamadada4734b2017-09-22 12:46:40 +090015
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -060016#include <linux/clk.h>
17#include <linux/err.h>
18#include <linux/io.h>
19#include <linux/ioport.h>
20#include <linux/kernel.h>
21#include <linux/module.h>
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -060022#include <linux/of.h>
23#include <linux/of_device.h>
Masahiro Yamadada4734b2017-09-22 12:46:40 +090024#include <linux/platform_device.h>
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -060025
26#include "denali.h"
27
28struct denali_dt {
29 struct denali_nand_info denali;
30 struct clk *clk;
31};
32
Masahiro Yamadabe72a4a2017-03-23 05:07:07 +090033struct denali_dt_data {
Masahiro Yamadae7beeee2017-03-30 15:45:57 +090034 unsigned int revision;
Masahiro Yamadabe72a4a2017-03-23 05:07:07 +090035 unsigned int caps;
Masahiro Yamada7de117f2017-06-07 20:52:12 +090036 const struct nand_ecc_caps *ecc_caps;
Masahiro Yamadabe72a4a2017-03-23 05:07:07 +090037};
38
Masahiro Yamada7de117f2017-06-07 20:52:12 +090039NAND_ECC_CAPS_SINGLE(denali_socfpga_ecc_caps, denali_calc_ecc_bytes,
40 512, 8, 15);
Masahiro Yamadaa56609c2017-03-30 15:45:53 +090041static const struct denali_dt_data denali_socfpga_data = {
42 .caps = DENALI_CAP_HW_ECC_FIXUP,
Masahiro Yamada7de117f2017-06-07 20:52:12 +090043 .ecc_caps = &denali_socfpga_ecc_caps,
Masahiro Yamadaa56609c2017-03-30 15:45:53 +090044};
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -060045
Masahiro Yamada91300dd2017-06-07 20:52:14 +090046NAND_ECC_CAPS_SINGLE(denali_uniphier_v5a_ecc_caps, denali_calc_ecc_bytes,
47 1024, 8, 16, 24);
48static const struct denali_dt_data denali_uniphier_v5a_data = {
49 .caps = DENALI_CAP_HW_ECC_FIXUP |
50 DENALI_CAP_DMA_64BIT,
51 .ecc_caps = &denali_uniphier_v5a_ecc_caps,
52};
53
54NAND_ECC_CAPS_SINGLE(denali_uniphier_v5b_ecc_caps, denali_calc_ecc_bytes,
55 1024, 8, 16);
56static const struct denali_dt_data denali_uniphier_v5b_data = {
57 .revision = 0x0501,
58 .caps = DENALI_CAP_HW_ECC_FIXUP |
59 DENALI_CAP_DMA_64BIT,
60 .ecc_caps = &denali_uniphier_v5b_ecc_caps,
61};
62
Masahiro Yamadaa56609c2017-03-30 15:45:53 +090063static const struct of_device_id denali_nand_dt_ids[] = {
64 {
65 .compatible = "altr,socfpga-denali-nand",
66 .data = &denali_socfpga_data,
67 },
Masahiro Yamada91300dd2017-06-07 20:52:14 +090068 {
69 .compatible = "socionext,uniphier-denali-nand-v5a",
70 .data = &denali_uniphier_v5a_data,
71 },
72 {
73 .compatible = "socionext,uniphier-denali-nand-v5b",
74 .data = &denali_uniphier_v5b_data,
75 },
Masahiro Yamadaa56609c2017-03-30 15:45:53 +090076 { /* sentinel */ }
77};
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -060078MODULE_DEVICE_TABLE(of, denali_nand_dt_ids);
79
Masahiro Yamada3f5c3582017-03-30 15:45:56 +090080static int denali_dt_probe(struct platform_device *pdev)
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -060081{
Masahiro Yamada2b8c92b2017-06-06 08:21:40 +090082 struct resource *res;
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -060083 struct denali_dt *dt;
Masahiro Yamadabe72a4a2017-03-23 05:07:07 +090084 const struct denali_dt_data *data;
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -060085 struct denali_nand_info *denali;
86 int ret;
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -060087
Masahiro Yamada3f5c3582017-03-30 15:45:56 +090088 dt = devm_kzalloc(&pdev->dev, sizeof(*dt), GFP_KERNEL);
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -060089 if (!dt)
90 return -ENOMEM;
91 denali = &dt->denali;
92
Masahiro Yamada3f5c3582017-03-30 15:45:56 +090093 data = of_device_get_match_data(&pdev->dev);
Masahiro Yamadae7beeee2017-03-30 15:45:57 +090094 if (data) {
95 denali->revision = data->revision;
Masahiro Yamadabe72a4a2017-03-23 05:07:07 +090096 denali->caps = data->caps;
Masahiro Yamada7de117f2017-06-07 20:52:12 +090097 denali->ecc_caps = data->ecc_caps;
Masahiro Yamadae7beeee2017-03-30 15:45:57 +090098 }
Masahiro Yamadabe72a4a2017-03-23 05:07:07 +090099
Masahiro Yamada3f5c3582017-03-30 15:45:56 +0900100 denali->dev = &pdev->dev;
101 denali->irq = platform_get_irq(pdev, 0);
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600102 if (denali->irq < 0) {
Masahiro Yamada3f5c3582017-03-30 15:45:56 +0900103 dev_err(&pdev->dev, "no irq defined\n");
Sachin Kamat2f2ff142013-03-18 15:11:13 +0530104 return denali->irq;
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600105 }
106
Masahiro Yamada2b8c92b2017-06-06 08:21:40 +0900107 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "denali_reg");
Masahiro Yamada0d3a9662017-06-16 14:36:39 +0900108 denali->reg = devm_ioremap_resource(&pdev->dev, res);
109 if (IS_ERR(denali->reg))
110 return PTR_ERR(denali->reg);
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600111
Masahiro Yamada2b8c92b2017-06-06 08:21:40 +0900112 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand_data");
Masahiro Yamada0d3a9662017-06-16 14:36:39 +0900113 denali->host = devm_ioremap_resource(&pdev->dev, res);
114 if (IS_ERR(denali->host))
115 return PTR_ERR(denali->host);
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600116
Masahiro Yamada3f5c3582017-03-30 15:45:56 +0900117 dt->clk = devm_clk_get(&pdev->dev, NULL);
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600118 if (IS_ERR(dt->clk)) {
Masahiro Yamada3f5c3582017-03-30 15:45:56 +0900119 dev_err(&pdev->dev, "no clk available\n");
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600120 return PTR_ERR(dt->clk);
121 }
Arvind Yadavc0441792017-08-01 17:05:09 +0530122 ret = clk_prepare_enable(dt->clk);
123 if (ret)
124 return ret;
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600125
Masahiro Yamada3f6e6982018-06-23 01:06:34 +0900126 /*
127 * Hardcode the clock rate for the backward compatibility.
128 * This works for both SOCFPGA and UniPhier.
129 */
130 denali->clk_x_rate = 200000000;
Masahiro Yamada1bb88662017-06-13 22:45:37 +0900131
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600132 ret = denali_init(denali);
133 if (ret)
134 goto out_disable_clk;
135
Masahiro Yamada3f5c3582017-03-30 15:45:56 +0900136 platform_set_drvdata(pdev, dt);
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600137 return 0;
138
139out_disable_clk:
140 clk_disable_unprepare(dt->clk);
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600141
142 return ret;
143}
144
Masahiro Yamada3f5c3582017-03-30 15:45:56 +0900145static int denali_dt_remove(struct platform_device *pdev)
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600146{
Masahiro Yamada3f5c3582017-03-30 15:45:56 +0900147 struct denali_dt *dt = platform_get_drvdata(pdev);
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600148
149 denali_remove(&dt->denali);
Masahiro Yamadaa1a26172016-11-03 02:21:04 +0900150 clk_disable_unprepare(dt->clk);
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600151
152 return 0;
153}
154
155static struct platform_driver denali_dt_driver = {
156 .probe = denali_dt_probe,
Bill Pemberton5153b882012-11-19 13:21:24 -0500157 .remove = denali_dt_remove,
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600158 .driver = {
159 .name = "denali-nand-dt",
Sachin Kamatef54f872013-03-18 15:11:14 +0530160 .of_match_table = denali_nand_dt_ids,
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600161 },
162};
Sachin Kamat82fc8122013-03-18 15:11:12 +0530163module_platform_driver(denali_dt_driver);
Dinh Nguyen30f9f2f2012-09-27 10:58:06 -0600164
165MODULE_LICENSE("GPL");
166MODULE_AUTHOR("Jamie Iles");
167MODULE_DESCRIPTION("DT driver for Denali NAND controller");