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Adit Ranadive29c8d9e2016-10-02 19:10:22 -07001/*
2 * Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of EITHER the GNU General Public License
6 * version 2 as published by the Free Software Foundation or the BSD
7 * 2-Clause License. This program is distributed in the hope that it
8 * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
9 * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
10 * See the GNU General Public License version 2 for more details at
11 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program available in the file COPYING in the main
15 * directory of this source tree.
16 *
17 * The BSD 2-Clause License
18 *
19 * Redistribution and use in source and binary forms, with or
20 * without modification, are permitted provided that the following
21 * conditions are met:
22 *
23 * - Redistributions of source code must retain the above
24 * copyright notice, this list of conditions and the following
25 * disclaimer.
26 *
27 * - Redistributions in binary form must reproduce the above
28 * copyright notice, this list of conditions and the following
29 * disclaimer in the documentation and/or other materials
30 * provided with the distribution.
31 *
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
34 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
35 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
36 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
37 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
38 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
39 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
41 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
43 * OF THE POSSIBILITY OF SUCH DAMAGE.
44 */
45
46#ifndef __PVRDMA_H__
47#define __PVRDMA_H__
48
49#include <linux/compiler.h>
50#include <linux/interrupt.h>
51#include <linux/list.h>
52#include <linux/mutex.h>
53#include <linux/pci.h>
54#include <linux/semaphore.h>
55#include <linux/workqueue.h>
56#include <rdma/ib_umem.h>
57#include <rdma/ib_verbs.h>
58#include <rdma/vmw_pvrdma-abi.h>
59
60#include "pvrdma_ring.h"
61#include "pvrdma_dev_api.h"
62#include "pvrdma_verbs.h"
63
64/* NOT the same as BIT_MASK(). */
65#define PVRDMA_MASK(n) ((n << 1) - 1)
66
67/*
68 * VMware PVRDMA PCI device id.
69 */
70#define PCI_DEVICE_ID_VMWARE_PVRDMA 0x0820
71
Adit Ranadive6332dee2017-02-22 17:22:56 -080072#define PVRDMA_NUM_RING_PAGES 4
73
Adit Ranadive29c8d9e2016-10-02 19:10:22 -070074struct pvrdma_dev;
75
76struct pvrdma_page_dir {
77 dma_addr_t dir_dma;
78 u64 *dir;
79 int ntables;
80 u64 **tables;
81 u64 npages;
82 void **pages;
83};
84
85struct pvrdma_cq {
86 struct ib_cq ibcq;
87 int offset;
88 spinlock_t cq_lock; /* Poll lock. */
89 struct pvrdma_uar_map *uar;
90 struct ib_umem *umem;
91 struct pvrdma_ring_state *ring_state;
92 struct pvrdma_page_dir pdir;
93 u32 cq_handle;
94 bool is_kernel;
95 atomic_t refcnt;
96 wait_queue_head_t wait;
97};
98
99struct pvrdma_id_table {
100 u32 last;
101 u32 top;
102 u32 max;
103 u32 mask;
104 spinlock_t lock; /* Table lock. */
105 unsigned long *table;
106};
107
108struct pvrdma_uar_map {
109 unsigned long pfn;
110 void __iomem *map;
111 int index;
112};
113
114struct pvrdma_uar_table {
115 struct pvrdma_id_table tbl;
116 int size;
117};
118
119struct pvrdma_ucontext {
120 struct ib_ucontext ibucontext;
121 struct pvrdma_dev *dev;
122 struct pvrdma_uar_map uar;
123 u64 ctx_handle;
124};
125
126struct pvrdma_pd {
127 struct ib_pd ibpd;
128 u32 pdn;
129 u32 pd_handle;
130 int privileged;
131};
132
133struct pvrdma_mr {
134 u32 mr_handle;
135 u64 iova;
136 u64 size;
137};
138
139struct pvrdma_user_mr {
140 struct ib_mr ibmr;
141 struct ib_umem *umem;
142 struct pvrdma_mr mmr;
143 struct pvrdma_page_dir pdir;
144 u64 *pages;
145 u32 npages;
146 u32 max_pages;
147 u32 page_shift;
148};
149
150struct pvrdma_wq {
151 struct pvrdma_ring *ring;
152 spinlock_t lock; /* Work queue lock. */
153 int wqe_cnt;
154 int wqe_size;
155 int max_sg;
156 int offset;
157};
158
159struct pvrdma_ah {
160 struct ib_ah ibah;
161 struct pvrdma_av av;
162};
163
164struct pvrdma_qp {
165 struct ib_qp ibqp;
166 u32 qp_handle;
167 u32 qkey;
168 struct pvrdma_wq sq;
169 struct pvrdma_wq rq;
170 struct ib_umem *rumem;
171 struct ib_umem *sumem;
172 struct pvrdma_page_dir pdir;
173 int npages;
174 int npages_send;
175 int npages_recv;
176 u32 flags;
177 u8 port;
178 u8 state;
179 bool is_kernel;
180 struct mutex mutex; /* QP state mutex. */
181 atomic_t refcnt;
182 wait_queue_head_t wait;
183};
184
185struct pvrdma_dev {
186 /* PCI device-related information. */
187 struct ib_device ib_dev;
188 struct pci_dev *pdev;
189 void __iomem *regs;
190 struct pvrdma_device_shared_region *dsr; /* Shared region pointer */
191 dma_addr_t dsrbase; /* Shared region base address */
192 void *cmd_slot;
193 void *resp_slot;
194 unsigned long flags;
195 struct list_head device_link;
196
197 /* Locking and interrupt information. */
198 spinlock_t cmd_lock; /* Command lock. */
199 struct semaphore cmd_sema;
200 struct completion cmd_done;
Christoph Hellwig7bf39762017-02-15 08:47:04 +0100201 unsigned int nr_vectors;
Adit Ranadive29c8d9e2016-10-02 19:10:22 -0700202
203 /* RDMA-related device information. */
204 union ib_gid *sgid_tbl;
205 struct pvrdma_ring_state *async_ring_state;
206 struct pvrdma_page_dir async_pdir;
207 struct pvrdma_ring_state *cq_ring_state;
208 struct pvrdma_page_dir cq_pdir;
209 struct pvrdma_cq **cq_tbl;
210 spinlock_t cq_tbl_lock;
211 struct pvrdma_qp **qp_tbl;
212 spinlock_t qp_tbl_lock;
213 struct pvrdma_uar_table uar_table;
214 struct pvrdma_uar_map driver_uar;
215 __be64 sys_image_guid;
216 spinlock_t desc_lock; /* Device modification lock. */
217 u32 port_cap_mask;
218 struct mutex port_mutex; /* Port modification mutex. */
219 bool ib_active;
220 atomic_t num_qps;
221 atomic_t num_cqs;
222 atomic_t num_pds;
223 atomic_t num_ahs;
224
225 /* Network device information. */
226 struct net_device *netdev;
227 struct notifier_block nb_netdev;
228};
229
230struct pvrdma_netdevice_work {
231 struct work_struct work;
232 struct net_device *event_netdev;
233 unsigned long event;
234};
235
236static inline struct pvrdma_dev *to_vdev(struct ib_device *ibdev)
237{
238 return container_of(ibdev, struct pvrdma_dev, ib_dev);
239}
240
241static inline struct
242pvrdma_ucontext *to_vucontext(struct ib_ucontext *ibucontext)
243{
244 return container_of(ibucontext, struct pvrdma_ucontext, ibucontext);
245}
246
247static inline struct pvrdma_pd *to_vpd(struct ib_pd *ibpd)
248{
249 return container_of(ibpd, struct pvrdma_pd, ibpd);
250}
251
252static inline struct pvrdma_cq *to_vcq(struct ib_cq *ibcq)
253{
254 return container_of(ibcq, struct pvrdma_cq, ibcq);
255}
256
257static inline struct pvrdma_user_mr *to_vmr(struct ib_mr *ibmr)
258{
259 return container_of(ibmr, struct pvrdma_user_mr, ibmr);
260}
261
262static inline struct pvrdma_qp *to_vqp(struct ib_qp *ibqp)
263{
264 return container_of(ibqp, struct pvrdma_qp, ibqp);
265}
266
267static inline struct pvrdma_ah *to_vah(struct ib_ah *ibah)
268{
269 return container_of(ibah, struct pvrdma_ah, ibah);
270}
271
272static inline void pvrdma_write_reg(struct pvrdma_dev *dev, u32 reg, u32 val)
273{
274 writel(cpu_to_le32(val), dev->regs + reg);
275}
276
277static inline u32 pvrdma_read_reg(struct pvrdma_dev *dev, u32 reg)
278{
279 return le32_to_cpu(readl(dev->regs + reg));
280}
281
282static inline void pvrdma_write_uar_cq(struct pvrdma_dev *dev, u32 val)
283{
284 writel(cpu_to_le32(val), dev->driver_uar.map + PVRDMA_UAR_CQ_OFFSET);
285}
286
287static inline void pvrdma_write_uar_qp(struct pvrdma_dev *dev, u32 val)
288{
289 writel(cpu_to_le32(val), dev->driver_uar.map + PVRDMA_UAR_QP_OFFSET);
290}
291
292static inline void *pvrdma_page_dir_get_ptr(struct pvrdma_page_dir *pdir,
293 u64 offset)
294{
295 return pdir->pages[offset / PAGE_SIZE] + (offset % PAGE_SIZE);
296}
297
298static inline enum pvrdma_mtu ib_mtu_to_pvrdma(enum ib_mtu mtu)
299{
300 return (enum pvrdma_mtu)mtu;
301}
302
303static inline enum ib_mtu pvrdma_mtu_to_ib(enum pvrdma_mtu mtu)
304{
305 return (enum ib_mtu)mtu;
306}
307
308static inline enum pvrdma_port_state ib_port_state_to_pvrdma(
309 enum ib_port_state state)
310{
311 return (enum pvrdma_port_state)state;
312}
313
314static inline enum ib_port_state pvrdma_port_state_to_ib(
315 enum pvrdma_port_state state)
316{
317 return (enum ib_port_state)state;
318}
319
320static inline int ib_port_cap_flags_to_pvrdma(int flags)
321{
322 return flags & PVRDMA_MASK(PVRDMA_PORT_CAP_FLAGS_MAX);
323}
324
325static inline int pvrdma_port_cap_flags_to_ib(int flags)
326{
327 return flags;
328}
329
330static inline enum pvrdma_port_width ib_port_width_to_pvrdma(
331 enum ib_port_width width)
332{
333 return (enum pvrdma_port_width)width;
334}
335
336static inline enum ib_port_width pvrdma_port_width_to_ib(
337 enum pvrdma_port_width width)
338{
339 return (enum ib_port_width)width;
340}
341
342static inline enum pvrdma_port_speed ib_port_speed_to_pvrdma(
343 enum ib_port_speed speed)
344{
345 return (enum pvrdma_port_speed)speed;
346}
347
348static inline enum ib_port_speed pvrdma_port_speed_to_ib(
349 enum pvrdma_port_speed speed)
350{
351 return (enum ib_port_speed)speed;
352}
353
354static inline int pvrdma_qp_attr_mask_to_ib(int attr_mask)
355{
356 return attr_mask;
357}
358
359static inline int ib_qp_attr_mask_to_pvrdma(int attr_mask)
360{
361 return attr_mask & PVRDMA_MASK(PVRDMA_QP_ATTR_MASK_MAX);
362}
363
364static inline enum pvrdma_mig_state ib_mig_state_to_pvrdma(
365 enum ib_mig_state state)
366{
367 return (enum pvrdma_mig_state)state;
368}
369
370static inline enum ib_mig_state pvrdma_mig_state_to_ib(
371 enum pvrdma_mig_state state)
372{
373 return (enum ib_mig_state)state;
374}
375
376static inline int ib_access_flags_to_pvrdma(int flags)
377{
378 return flags;
379}
380
381static inline int pvrdma_access_flags_to_ib(int flags)
382{
383 return flags & PVRDMA_MASK(PVRDMA_ACCESS_FLAGS_MAX);
384}
385
386static inline enum pvrdma_qp_type ib_qp_type_to_pvrdma(enum ib_qp_type type)
387{
388 return (enum pvrdma_qp_type)type;
389}
390
391static inline enum ib_qp_type pvrdma_qp_type_to_ib(enum pvrdma_qp_type type)
392{
393 return (enum ib_qp_type)type;
394}
395
396static inline enum pvrdma_qp_state ib_qp_state_to_pvrdma(enum ib_qp_state state)
397{
398 return (enum pvrdma_qp_state)state;
399}
400
401static inline enum ib_qp_state pvrdma_qp_state_to_ib(enum pvrdma_qp_state state)
402{
403 return (enum ib_qp_state)state;
404}
405
406static inline enum pvrdma_wr_opcode ib_wr_opcode_to_pvrdma(enum ib_wr_opcode op)
407{
408 return (enum pvrdma_wr_opcode)op;
409}
410
411static inline enum ib_wc_status pvrdma_wc_status_to_ib(
412 enum pvrdma_wc_status status)
413{
414 return (enum ib_wc_status)status;
415}
416
417static inline int pvrdma_wc_opcode_to_ib(int opcode)
418{
419 return opcode;
420}
421
422static inline int pvrdma_wc_flags_to_ib(int flags)
423{
424 return flags;
425}
426
427static inline int ib_send_flags_to_pvrdma(int flags)
428{
429 return flags & PVRDMA_MASK(PVRDMA_SEND_FLAGS_MAX);
430}
431
432void pvrdma_qp_cap_to_ib(struct ib_qp_cap *dst,
433 const struct pvrdma_qp_cap *src);
434void ib_qp_cap_to_pvrdma(struct pvrdma_qp_cap *dst,
435 const struct ib_qp_cap *src);
436void pvrdma_gid_to_ib(union ib_gid *dst, const union pvrdma_gid *src);
437void ib_gid_to_pvrdma(union pvrdma_gid *dst, const union ib_gid *src);
438void pvrdma_global_route_to_ib(struct ib_global_route *dst,
439 const struct pvrdma_global_route *src);
440void ib_global_route_to_pvrdma(struct pvrdma_global_route *dst,
441 const struct ib_global_route *src);
442void pvrdma_ah_attr_to_ib(struct ib_ah_attr *dst,
443 const struct pvrdma_ah_attr *src);
444void ib_ah_attr_to_pvrdma(struct pvrdma_ah_attr *dst,
445 const struct ib_ah_attr *src);
446
447int pvrdma_uar_table_init(struct pvrdma_dev *dev);
448void pvrdma_uar_table_cleanup(struct pvrdma_dev *dev);
449
450int pvrdma_uar_alloc(struct pvrdma_dev *dev, struct pvrdma_uar_map *uar);
451void pvrdma_uar_free(struct pvrdma_dev *dev, struct pvrdma_uar_map *uar);
452
453void _pvrdma_flush_cqe(struct pvrdma_qp *qp, struct pvrdma_cq *cq);
454
455int pvrdma_page_dir_init(struct pvrdma_dev *dev, struct pvrdma_page_dir *pdir,
456 u64 npages, bool alloc_pages);
457void pvrdma_page_dir_cleanup(struct pvrdma_dev *dev,
458 struct pvrdma_page_dir *pdir);
459int pvrdma_page_dir_insert_dma(struct pvrdma_page_dir *pdir, u64 idx,
460 dma_addr_t daddr);
461int pvrdma_page_dir_insert_umem(struct pvrdma_page_dir *pdir,
462 struct ib_umem *umem, u64 offset);
463dma_addr_t pvrdma_page_dir_get_dma(struct pvrdma_page_dir *pdir, u64 idx);
464int pvrdma_page_dir_insert_page_list(struct pvrdma_page_dir *pdir,
465 u64 *page_list, int num_pages);
466
467int pvrdma_cmd_post(struct pvrdma_dev *dev, union pvrdma_cmd_req *req,
468 union pvrdma_cmd_resp *rsp, unsigned resp_code);
469
470#endif /* __PVRDMA_H__ */