blob: df279a31e189ddeb58aaf982d4780e4bce32ab08 [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include "core.h"
19#include "txrx.h"
20#include "htt.h"
21#include "mac.h"
22#include "debug.h"
23
24static void ath10k_report_offchan_tx(struct ath10k *ar, struct sk_buff *skb)
25{
26 if (!ATH10K_SKB_CB(skb)->htt.is_offchan)
27 return;
28
29 /* If the original wait_for_completion() timed out before
30 * {data,mgmt}_tx_completed() was called then we could complete
31 * offchan_tx_completed for a different skb. Prevent this by using
32 * offchan_tx_skb. */
33 spin_lock_bh(&ar->data_lock);
34 if (ar->offchan_tx_skb != skb) {
35 ath10k_warn("completed old offchannel frame\n");
36 goto out;
37 }
38
39 complete(&ar->offchan_tx_completed);
40 ar->offchan_tx_skb = NULL; /* just for sanity */
41
42 ath10k_dbg(ATH10K_DBG_HTT, "completed offchannel skb %p\n", skb);
43out:
44 spin_unlock_bh(&ar->data_lock);
45}
46
Michal Kazior0a89f8a2013-09-18 14:43:20 +020047void ath10k_txrx_tx_unref(struct ath10k_htt *htt,
48 const struct htt_tx_done *tx_done)
Kalle Valo5e3dd152013-06-12 20:52:10 +030049{
50 struct device *dev = htt->ar->dev;
51 struct ieee80211_tx_info *info;
Michal Kazior1f8bb152013-09-18 14:43:22 +020052 struct ath10k_skb_cb *skb_cb;
53 struct sk_buff *msdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +030054 int ret;
55
Michal Kazior0a89f8a2013-09-18 14:43:20 +020056 ath10k_dbg(ATH10K_DBG_HTT, "htt tx completion msdu_id %u discard %d no_ack %d\n",
57 tx_done->msdu_id, !!tx_done->discard, !!tx_done->no_ack);
Kalle Valo5e3dd152013-06-12 20:52:10 +030058
Michal Kazior0a89f8a2013-09-18 14:43:20 +020059 if (tx_done->msdu_id >= htt->max_num_pending_tx) {
60 ath10k_warn("warning: msdu_id %d too big, ignoring\n",
61 tx_done->msdu_id);
Kalle Valo5e3dd152013-06-12 20:52:10 +030062 return;
Michal Kazior0a89f8a2013-09-18 14:43:20 +020063 }
64
65 msdu = htt->pending_tx[tx_done->msdu_id];
Michal Kazior1f8bb152013-09-18 14:43:22 +020066 skb_cb = ATH10K_SKB_CB(msdu);
Kalle Valo5e3dd152013-06-12 20:52:10 +030067
68 ret = ath10k_skb_unmap(dev, msdu);
69 if (ret)
70 ath10k_warn("data skb unmap failed (%d)\n", ret);
71
Michal Kazior1f8bb152013-09-18 14:43:22 +020072 if (skb_cb->htt.frag_len)
73 skb_pull(msdu, skb_cb->htt.frag_len + skb_cb->htt.pad_len);
74
Kalle Valo5e3dd152013-06-12 20:52:10 +030075 ath10k_report_offchan_tx(htt->ar, msdu);
76
77 info = IEEE80211_SKB_CB(msdu);
Kalle Valo5e3dd152013-06-12 20:52:10 +030078
Michal Kazior0a89f8a2013-09-18 14:43:20 +020079 if (tx_done->discard) {
Kalle Valo5e3dd152013-06-12 20:52:10 +030080 ieee80211_free_txskb(htt->ar->hw, msdu);
81 goto exit;
82 }
83
84 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK))
85 info->flags |= IEEE80211_TX_STAT_ACK;
86
Michal Kazior0a89f8a2013-09-18 14:43:20 +020087 if (tx_done->no_ack)
Kalle Valo5e3dd152013-06-12 20:52:10 +030088 info->flags &= ~IEEE80211_TX_STAT_ACK;
89
90 ieee80211_tx_status(htt->ar->hw, msdu);
91 /* we do not own the msdu anymore */
92
93exit:
94 spin_lock_bh(&htt->tx_lock);
Michal Kazior0a89f8a2013-09-18 14:43:20 +020095 htt->pending_tx[tx_done->msdu_id] = NULL;
96 ath10k_htt_tx_free_msdu_id(htt, tx_done->msdu_id);
Kalle Valo5e3dd152013-06-12 20:52:10 +030097 __ath10k_htt_tx_dec_pending(htt);
Michal Kazior0945baf2013-09-18 14:43:18 +020098 if (htt->num_pending_tx == 0)
Kalle Valo5e3dd152013-06-12 20:52:10 +030099 wake_up(&htt->empty_tx_wq);
100 spin_unlock_bh(&htt->tx_lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300101}
102
103static const u8 rx_legacy_rate_idx[] = {
104 3, /* 0x00 - 11Mbps */
105 2, /* 0x01 - 5.5Mbps */
106 1, /* 0x02 - 2Mbps */
107 0, /* 0x03 - 1Mbps */
108 3, /* 0x04 - 11Mbps */
109 2, /* 0x05 - 5.5Mbps */
110 1, /* 0x06 - 2Mbps */
111 0, /* 0x07 - 1Mbps */
112 10, /* 0x08 - 48Mbps */
113 8, /* 0x09 - 24Mbps */
114 6, /* 0x0A - 12Mbps */
115 4, /* 0x0B - 6Mbps */
116 11, /* 0x0C - 54Mbps */
117 9, /* 0x0D - 36Mbps */
118 7, /* 0x0E - 18Mbps */
119 5, /* 0x0F - 9Mbps */
120};
121
122static void process_rx_rates(struct ath10k *ar, struct htt_rx_info *info,
123 enum ieee80211_band band,
124 struct ieee80211_rx_status *status)
125{
126 u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
127 u8 info0 = info->rate.info0;
128 u32 info1 = info->rate.info1;
129 u32 info2 = info->rate.info2;
130 u8 preamble = 0;
131
132 /* Check if valid fields */
133 if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
134 return;
135
136 preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
137
138 switch (preamble) {
139 case HTT_RX_LEGACY:
140 cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
141 rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
142 rate_idx = 0;
143
144 if (rate < 0x08 || rate > 0x0F)
145 break;
146
147 switch (band) {
148 case IEEE80211_BAND_2GHZ:
149 if (cck)
150 rate &= ~BIT(3);
151 rate_idx = rx_legacy_rate_idx[rate];
152 break;
153 case IEEE80211_BAND_5GHZ:
154 rate_idx = rx_legacy_rate_idx[rate];
155 /* We are using same rate table registering
156 HW - ath10k_rates[]. In case of 5GHz skip
157 CCK rates, so -4 here */
158 rate_idx -= 4;
159 break;
160 default:
161 break;
162 }
163
164 status->rate_idx = rate_idx;
165 break;
166 case HTT_RX_HT:
167 case HTT_RX_HT_WITH_TXBF:
168 /* HT-SIG - Table 20-11 in info1 and info2 */
169 mcs = info1 & 0x1F;
170 nss = mcs >> 3;
171 bw = (info1 >> 7) & 1;
172 sgi = (info2 >> 7) & 1;
173
174 status->rate_idx = mcs;
175 status->flag |= RX_FLAG_HT;
176 if (sgi)
177 status->flag |= RX_FLAG_SHORT_GI;
178 if (bw)
179 status->flag |= RX_FLAG_40MHZ;
180 break;
181 case HTT_RX_VHT:
182 case HTT_RX_VHT_WITH_TXBF:
183 /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
184 TODO check this */
185 mcs = (info2 >> 4) & 0x0F;
Michal Kaziorc4340c22013-10-16 16:45:59 +0300186 nss = ((info1 >> 10) & 0x07) + 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300187 bw = info1 & 3;
188 sgi = info2 & 1;
189
190 status->rate_idx = mcs;
191 status->vht_nss = nss;
192
193 if (sgi)
194 status->flag |= RX_FLAG_SHORT_GI;
195
196 switch (bw) {
197 /* 20MHZ */
198 case 0:
199 break;
200 /* 40MHZ */
201 case 1:
202 status->flag |= RX_FLAG_40MHZ;
203 break;
204 /* 80MHZ */
205 case 2:
206 status->flag |= RX_FLAG_80MHZ;
207 }
208
209 status->flag |= RX_FLAG_VHT;
210 break;
211 default:
212 break;
213 }
214}
215
216void ath10k_process_rx(struct ath10k *ar, struct htt_rx_info *info)
217{
218 struct ieee80211_rx_status *status;
219 struct ieee80211_channel *ch;
220 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)info->skb->data;
221
222 status = IEEE80211_SKB_RXCB(info->skb);
223 memset(status, 0, sizeof(*status));
224
225 if (info->encrypt_type != HTT_RX_MPDU_ENCRYPT_NONE) {
226 status->flag |= RX_FLAG_DECRYPTED | RX_FLAG_IV_STRIPPED |
227 RX_FLAG_MMIC_STRIPPED;
228 hdr->frame_control = __cpu_to_le16(
229 __le16_to_cpu(hdr->frame_control) &
230 ~IEEE80211_FCTL_PROTECTED);
231 }
232
233 if (info->status == HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR)
234 status->flag |= RX_FLAG_MMIC_ERROR;
235
236 if (info->fcs_err)
237 status->flag |= RX_FLAG_FAILED_FCS_CRC;
238
Kalle Valo652de352013-11-13 15:23:30 +0200239 if (info->amsdu_more)
240 status->flag |= RX_FLAG_AMSDU_MORE;
241
Kalle Valo5e3dd152013-06-12 20:52:10 +0300242 status->signal = info->signal;
243
244 spin_lock_bh(&ar->data_lock);
245 ch = ar->scan_channel;
246 if (!ch)
247 ch = ar->rx_channel;
248 spin_unlock_bh(&ar->data_lock);
249
250 if (!ch) {
251 ath10k_warn("no channel configured; ignoring frame!\n");
252 dev_kfree_skb_any(info->skb);
253 return;
254 }
255
256 process_rx_rates(ar, info, ch->band, status);
257 status->band = ch->band;
258 status->freq = ch->center_freq;
259
260 ath10k_dbg(ATH10K_DBG_DATA,
261 "rx skb %p len %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u\n",
262 info->skb,
263 info->skb->len,
264 status->flag == 0 ? "legacy" : "",
265 status->flag & RX_FLAG_HT ? "ht" : "",
266 status->flag & RX_FLAG_VHT ? "vht" : "",
267 status->flag & RX_FLAG_40MHZ ? "40" : "",
268 status->flag & RX_FLAG_80MHZ ? "80" : "",
269 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
270 status->rate_idx,
271 status->vht_nss,
272 status->freq,
273 status->band);
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300274 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
275 info->skb->data, info->skb->len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300276
277 ieee80211_rx(ar->hw, info->skb);
278}
279
280struct ath10k_peer *ath10k_peer_find(struct ath10k *ar, int vdev_id,
281 const u8 *addr)
282{
283 struct ath10k_peer *peer;
284
285 lockdep_assert_held(&ar->data_lock);
286
287 list_for_each_entry(peer, &ar->peers, list) {
288 if (peer->vdev_id != vdev_id)
289 continue;
290 if (memcmp(peer->addr, addr, ETH_ALEN))
291 continue;
292
293 return peer;
294 }
295
296 return NULL;
297}
298
299static struct ath10k_peer *ath10k_peer_find_by_id(struct ath10k *ar,
300 int peer_id)
301{
302 struct ath10k_peer *peer;
303
304 lockdep_assert_held(&ar->data_lock);
305
306 list_for_each_entry(peer, &ar->peers, list)
307 if (test_bit(peer_id, peer->peer_ids))
308 return peer;
309
310 return NULL;
311}
312
313static int ath10k_wait_for_peer_common(struct ath10k *ar, int vdev_id,
314 const u8 *addr, bool expect_mapped)
315{
316 int ret;
317
318 ret = wait_event_timeout(ar->peer_mapping_wq, ({
319 bool mapped;
320
321 spin_lock_bh(&ar->data_lock);
322 mapped = !!ath10k_peer_find(ar, vdev_id, addr);
323 spin_unlock_bh(&ar->data_lock);
324
325 mapped == expect_mapped;
326 }), 3*HZ);
327
328 if (ret <= 0)
329 return -ETIMEDOUT;
330
331 return 0;
332}
333
334int ath10k_wait_for_peer_created(struct ath10k *ar, int vdev_id, const u8 *addr)
335{
336 return ath10k_wait_for_peer_common(ar, vdev_id, addr, true);
337}
338
339int ath10k_wait_for_peer_deleted(struct ath10k *ar, int vdev_id, const u8 *addr)
340{
341 return ath10k_wait_for_peer_common(ar, vdev_id, addr, false);
342}
343
344void ath10k_peer_map_event(struct ath10k_htt *htt,
345 struct htt_peer_map_event *ev)
346{
347 struct ath10k *ar = htt->ar;
348 struct ath10k_peer *peer;
349
350 spin_lock_bh(&ar->data_lock);
351 peer = ath10k_peer_find(ar, ev->vdev_id, ev->addr);
352 if (!peer) {
353 peer = kzalloc(sizeof(*peer), GFP_ATOMIC);
354 if (!peer)
355 goto exit;
356
357 peer->vdev_id = ev->vdev_id;
358 memcpy(peer->addr, ev->addr, ETH_ALEN);
359 list_add(&peer->list, &ar->peers);
360 wake_up(&ar->peer_mapping_wq);
361 }
362
363 ath10k_dbg(ATH10K_DBG_HTT, "htt peer map vdev %d peer %pM id %d\n",
364 ev->vdev_id, ev->addr, ev->peer_id);
365
366 set_bit(ev->peer_id, peer->peer_ids);
367exit:
368 spin_unlock_bh(&ar->data_lock);
369}
370
371void ath10k_peer_unmap_event(struct ath10k_htt *htt,
372 struct htt_peer_unmap_event *ev)
373{
374 struct ath10k *ar = htt->ar;
375 struct ath10k_peer *peer;
376
377 spin_lock_bh(&ar->data_lock);
378 peer = ath10k_peer_find_by_id(ar, ev->peer_id);
379 if (!peer) {
380 ath10k_warn("unknown peer id %d\n", ev->peer_id);
381 goto exit;
382 }
383
384 ath10k_dbg(ATH10K_DBG_HTT, "htt peer unmap vdev %d peer %pM id %d\n",
385 peer->vdev_id, peer->addr, ev->peer_id);
386
387 clear_bit(ev->peer_id, peer->peer_ids);
388
389 if (bitmap_empty(peer->peer_ids, ATH10K_MAX_NUM_PEER_IDS)) {
390 list_del(&peer->list);
391 kfree(peer);
392 wake_up(&ar->peer_mapping_wq);
393 }
394
395exit:
396 spin_unlock_bh(&ar->data_lock);
397}