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Shawn Guo95ceafd2012-09-06 07:09:11 +00001/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
4 * The OPP code in function cpu0_set_target() is reused from
5 * drivers/cpufreq/omap-cpufreq.c
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
14#include <linux/clk.h>
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +010015#include <linux/cpu.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000016#include <linux/cpufreq.h>
17#include <linux/err.h>
18#include <linux/module.h>
19#include <linux/of.h>
Nishanth Menone4db1c72013-09-19 16:03:52 -050020#include <linux/pm_opp.h>
Shawn Guo5553f9e2013-01-30 14:27:49 +000021#include <linux/platform_device.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000022#include <linux/regulator/consumer.h>
23#include <linux/slab.h>
24
25static unsigned int transition_latency;
26static unsigned int voltage_tolerance; /* in percentage */
27
28static struct device *cpu_dev;
29static struct clk *cpu_clk;
30static struct regulator *cpu_reg;
31static struct cpufreq_frequency_table *freq_table;
32
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +053033static int cpu0_set_target(struct cpufreq_policy *policy, unsigned int index)
Shawn Guo95ceafd2012-09-06 07:09:11 +000034{
Nishanth Menon47d43ba2013-09-19 16:03:51 -050035 struct dev_pm_opp *opp;
jhbird.choi@samsung.com5df60552013-03-18 08:09:42 +000036 unsigned long volt = 0, volt_old = 0, tol = 0;
Viresh Kumard4019f02013-08-14 19:38:24 +053037 unsigned int old_freq, new_freq;
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +010038 long freq_Hz, freq_exact;
Shawn Guo95ceafd2012-09-06 07:09:11 +000039 int ret;
40
Shawn Guo95ceafd2012-09-06 07:09:11 +000041 freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
Paul Walmsley2209b0c2013-11-25 18:01:18 -080042 if (freq_Hz <= 0)
Shawn Guo95ceafd2012-09-06 07:09:11 +000043 freq_Hz = freq_table[index].frequency * 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000044
Viresh Kumard4019f02013-08-14 19:38:24 +053045 freq_exact = freq_Hz;
46 new_freq = freq_Hz / 1000;
47 old_freq = clk_get_rate(cpu_clk) / 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000048
Mark Brown4a511de2013-08-13 14:58:24 +020049 if (!IS_ERR(cpu_reg)) {
Nishanth Menon78e8eb82013-01-18 19:52:33 +000050 rcu_read_lock();
Nishanth Menon5d4879c2013-09-19 16:03:50 -050051 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
Shawn Guo95ceafd2012-09-06 07:09:11 +000052 if (IS_ERR(opp)) {
Nishanth Menon78e8eb82013-01-18 19:52:33 +000053 rcu_read_unlock();
Shawn Guo95ceafd2012-09-06 07:09:11 +000054 pr_err("failed to find OPP for %ld\n", freq_Hz);
Viresh Kumard4019f02013-08-14 19:38:24 +053055 return PTR_ERR(opp);
Shawn Guo95ceafd2012-09-06 07:09:11 +000056 }
Nishanth Menon5d4879c2013-09-19 16:03:50 -050057 volt = dev_pm_opp_get_voltage(opp);
Nishanth Menon78e8eb82013-01-18 19:52:33 +000058 rcu_read_unlock();
Shawn Guo95ceafd2012-09-06 07:09:11 +000059 tol = volt * voltage_tolerance / 100;
60 volt_old = regulator_get_voltage(cpu_reg);
61 }
62
63 pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
Viresh Kumard4019f02013-08-14 19:38:24 +053064 old_freq / 1000, volt_old ? volt_old / 1000 : -1,
65 new_freq / 1000, volt ? volt / 1000 : -1);
Shawn Guo95ceafd2012-09-06 07:09:11 +000066
67 /* scaling up? scale voltage before frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053068 if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +000069 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
70 if (ret) {
71 pr_err("failed to scale voltage up: %d\n", ret);
Viresh Kumard4019f02013-08-14 19:38:24 +053072 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +000073 }
74 }
75
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +010076 ret = clk_set_rate(cpu_clk, freq_exact);
Shawn Guo95ceafd2012-09-06 07:09:11 +000077 if (ret) {
78 pr_err("failed to set clock rate: %d\n", ret);
Mark Brown4a511de2013-08-13 14:58:24 +020079 if (!IS_ERR(cpu_reg))
Shawn Guo95ceafd2012-09-06 07:09:11 +000080 regulator_set_voltage_tol(cpu_reg, volt_old, tol);
Viresh Kumard4019f02013-08-14 19:38:24 +053081 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +000082 }
83
84 /* scaling down? scale voltage after frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053085 if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +000086 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
87 if (ret) {
88 pr_err("failed to scale voltage down: %d\n", ret);
Viresh Kumard4019f02013-08-14 19:38:24 +053089 clk_set_rate(cpu_clk, old_freq * 1000);
Shawn Guo95ceafd2012-09-06 07:09:11 +000090 }
91 }
92
Viresh Kumarfd143b42013-04-01 12:57:44 +000093 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +000094}
95
96static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
97{
Viresh Kumar652ed952014-01-09 20:38:43 +053098 policy->clk = cpu_clk;
Viresh Kumar78b3d102013-10-03 20:29:09 +053099 return cpufreq_generic_init(policy, freq_table, transition_latency);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000100}
101
Shawn Guo95ceafd2012-09-06 07:09:11 +0000102static struct cpufreq_driver cpu0_cpufreq_driver = {
103 .flags = CPUFREQ_STICKY,
Viresh Kumarf793d792013-10-03 20:28:00 +0530104 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530105 .target_index = cpu0_set_target,
Viresh Kumar652ed952014-01-09 20:38:43 +0530106 .get = cpufreq_generic_get,
Shawn Guo95ceafd2012-09-06 07:09:11 +0000107 .init = cpu0_cpufreq_init,
Viresh Kumarf793d792013-10-03 20:28:00 +0530108 .exit = cpufreq_generic_exit,
Shawn Guo95ceafd2012-09-06 07:09:11 +0000109 .name = "generic_cpu0",
Viresh Kumarf793d792013-10-03 20:28:00 +0530110 .attr = cpufreq_generic_attr,
Shawn Guo95ceafd2012-09-06 07:09:11 +0000111};
112
Shawn Guo5553f9e2013-01-30 14:27:49 +0000113static int cpu0_cpufreq_probe(struct platform_device *pdev)
Shawn Guo95ceafd2012-09-06 07:09:11 +0000114{
Sudeep KarkadaNageshaf837a9b2013-06-17 15:04:19 +0100115 struct device_node *np;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000116 int ret;
117
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +0100118 cpu_dev = get_cpu_device(0);
119 if (!cpu_dev) {
120 pr_err("failed to get cpu0 device\n");
121 return -ENODEV;
122 }
Paolo Pisatif5c3ef22013-03-28 09:24:29 +0000123
Sudeep KarkadaNageshaf837a9b2013-06-17 15:04:19 +0100124 np = of_node_get(cpu_dev->of_node);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000125 if (!np) {
126 pr_err("failed to find cpu0 node\n");
Sudeep KarkadaNageshaf837a9b2013-06-17 15:04:19 +0100127 return -ENOENT;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000128 }
129
Mark Brown7d748972013-08-09 19:07:12 +0100130 cpu_reg = devm_regulator_get_optional(cpu_dev, "cpu0");
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000131 if (IS_ERR(cpu_reg)) {
132 /*
133 * If cpu0 regulator supply node is present, but regulator is
134 * not yet registered, we should try defering probe.
135 */
136 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
137 dev_err(cpu_dev, "cpu0 regulator not ready, retry\n");
138 ret = -EPROBE_DEFER;
139 goto out_put_node;
140 }
141 pr_warn("failed to get cpu0 regulator: %ld\n",
142 PTR_ERR(cpu_reg));
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000143 }
144
Shawn Guo5553f9e2013-01-30 14:27:49 +0000145 cpu_clk = devm_clk_get(cpu_dev, NULL);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000146 if (IS_ERR(cpu_clk)) {
147 ret = PTR_ERR(cpu_clk);
148 pr_err("failed to get cpu0 clock: %d\n", ret);
149 goto out_put_node;
150 }
151
Shawn Guo95ceafd2012-09-06 07:09:11 +0000152 ret = of_init_opp_table(cpu_dev);
153 if (ret) {
154 pr_err("failed to init OPP table: %d\n", ret);
155 goto out_put_node;
156 }
157
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500158 ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000159 if (ret) {
160 pr_err("failed to init cpufreq table: %d\n", ret);
161 goto out_put_node;
162 }
163
164 of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
165
166 if (of_property_read_u32(np, "clock-latency", &transition_latency))
167 transition_latency = CPUFREQ_ETERNAL;
168
Philipp Zabel43c638e2013-09-26 11:19:37 +0200169 if (!IS_ERR(cpu_reg)) {
Nishanth Menon47d43ba2013-09-19 16:03:51 -0500170 struct dev_pm_opp *opp;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000171 unsigned long min_uV, max_uV;
172 int i;
173
174 /*
175 * OPP is maintained in order of increasing frequency, and
176 * freq_table initialised from OPP is therefore sorted in the
177 * same order.
178 */
179 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
180 ;
Nishanth Menon78e8eb82013-01-18 19:52:33 +0000181 rcu_read_lock();
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500182 opp = dev_pm_opp_find_freq_exact(cpu_dev,
Shawn Guo95ceafd2012-09-06 07:09:11 +0000183 freq_table[0].frequency * 1000, true);
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500184 min_uV = dev_pm_opp_get_voltage(opp);
185 opp = dev_pm_opp_find_freq_exact(cpu_dev,
Shawn Guo95ceafd2012-09-06 07:09:11 +0000186 freq_table[i-1].frequency * 1000, true);
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500187 max_uV = dev_pm_opp_get_voltage(opp);
Nishanth Menon78e8eb82013-01-18 19:52:33 +0000188 rcu_read_unlock();
Shawn Guo95ceafd2012-09-06 07:09:11 +0000189 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
190 if (ret > 0)
191 transition_latency += ret * 1000;
192 }
193
194 ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
195 if (ret) {
196 pr_err("failed register driver: %d\n", ret);
197 goto out_free_table;
198 }
199
200 of_node_put(np);
201 return 0;
202
203out_free_table:
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500204 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000205out_put_node:
206 of_node_put(np);
207 return ret;
208}
Shawn Guo5553f9e2013-01-30 14:27:49 +0000209
210static int cpu0_cpufreq_remove(struct platform_device *pdev)
211{
212 cpufreq_unregister_driver(&cpu0_cpufreq_driver);
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500213 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
Shawn Guo5553f9e2013-01-30 14:27:49 +0000214
215 return 0;
216}
217
218static struct platform_driver cpu0_cpufreq_platdrv = {
219 .driver = {
220 .name = "cpufreq-cpu0",
221 .owner = THIS_MODULE,
222 },
223 .probe = cpu0_cpufreq_probe,
224 .remove = cpu0_cpufreq_remove,
225};
226module_platform_driver(cpu0_cpufreq_platdrv);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000227
228MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
229MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
230MODULE_LICENSE("GPL");