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Sujith394cf0a2009-02-09 13:26:54 +05301/*
Sujith Manoharan5b681382011-05-17 13:36:18 +05302 * Copyright (c) 2008-2011 Atheros Communications Inc.
Sujith394cf0a2009-02-09 13:26:54 +05303 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef ANI_H
18#define ANI_H
19
Vasanthakumar Thiagarajan22e66a42009-08-19 16:23:40 +053020#define BEACON_RSSI(ahp) (ahp->stats.avgbrssi)
Sujith394cf0a2009-02-09 13:26:54 +053021
Luis R. Rodrigueze36b27a2010-06-12 00:33:45 -040022/* units are errors per second */
Sujith Manoharan55fee982013-06-17 14:24:36 +053023#define ATH9K_ANI_OFDM_TRIG_HIGH 3500
24#define ATH9K_ANI_OFDM_TRIG_HIGH_BELOW_INI 1000
25
Felix Fietkau465dce62012-06-15 15:25:24 +020026#define ATH9K_ANI_OFDM_TRIG_LOW 400
Sujith Manoharan55fee982013-06-17 14:24:36 +053027#define ATH9K_ANI_OFDM_TRIG_LOW_ABOVE_INI 900
28
Felix Fietkau465dce62012-06-15 15:25:24 +020029#define ATH9K_ANI_CCK_TRIG_HIGH 600
Felix Fietkau465dce62012-06-15 15:25:24 +020030#define ATH9K_ANI_CCK_TRIG_LOW 300
Luis R. Rodrigueze36b27a2010-06-12 00:33:45 -040031
Felix Fietkau465dce62012-06-15 15:25:24 +020032#define ATH9K_ANI_SPUR_IMMUNE_LVL 3
Felix Fietkau465dce62012-06-15 15:25:24 +020033#define ATH9K_ANI_FIRSTEP_LVL 2
Luis R. Rodrigueze36b27a2010-06-12 00:33:45 -040034
Sujith394cf0a2009-02-09 13:26:54 +053035#define ATH9K_ANI_RSSI_THR_HIGH 40
36#define ATH9K_ANI_RSSI_THR_LOW 7
Luis R. Rodrigueze36b27a2010-06-12 00:33:45 -040037
Felix Fietkau465dce62012-06-15 15:25:24 +020038#define ATH9K_ANI_PERIOD 300
Luis R. Rodrigueze36b27a2010-06-12 00:33:45 -040039
40/* in ms */
Felix Fietkau465dce62012-06-15 15:25:24 +020041#define ATH9K_ANI_POLLINTERVAL 1000
Sujith394cf0a2009-02-09 13:26:54 +053042
Luis R. Rodrigueze36b27a2010-06-12 00:33:45 -040043#define ATH9K_SIG_FIRSTEP_SETTING_MIN 0
44#define ATH9K_SIG_FIRSTEP_SETTING_MAX 20
45#define ATH9K_SIG_SPUR_IMM_SETTING_MIN 0
46#define ATH9K_SIG_SPUR_IMM_SETTING_MAX 22
47
Luis R. Rodrigueze36b27a2010-06-12 00:33:45 -040048/* values here are relative to the INI */
49
Sujith394cf0a2009-02-09 13:26:54 +053050enum ath9k_ani_cmd {
Sujith Manoharan65c1a4d2013-08-27 11:34:26 +053051 ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION = 0x1,
52 ATH9K_ANI_FIRSTEP_LEVEL = 0x2,
53 ATH9K_ANI_SPUR_IMMUNITY_LEVEL = 0x4,
54 ATH9K_ANI_MRC_CCK = 0x8,
Luis R. Rodrigueze36b27a2010-06-12 00:33:45 -040055 ATH9K_ANI_ALL = 0xfff
Sujith394cf0a2009-02-09 13:26:54 +053056};
57
58struct ath9k_mib_stats {
59 u32 ackrcv_bad;
60 u32 rts_bad;
61 u32 rts_good;
62 u32 fcs_bad;
63 u32 beacons;
64};
65
Luis R. Rodrigueze36b27a2010-06-12 00:33:45 -040066/* INI default values for ANI registers */
67struct ath9k_ani_default {
68 u16 m1ThreshLow;
69 u16 m2ThreshLow;
70 u16 m1Thresh;
71 u16 m2Thresh;
72 u16 m2CountThr;
73 u16 m2CountThrLow;
74 u16 m1ThreshLowExt;
75 u16 m2ThreshLowExt;
76 u16 m1ThreshExt;
77 u16 m2ThreshExt;
78 u16 firstep;
79 u16 firstepLow;
80 u16 cycpwrThr1;
81 u16 cycpwrThr1Ext;
82};
83
Sujithee6e8d12009-02-09 13:29:49 +053084struct ar5416AniState {
Sujithee6e8d12009-02-09 13:29:49 +053085 u8 noiseImmunityLevel;
Luis R. Rodrigueze36b27a2010-06-12 00:33:45 -040086 u8 ofdmNoiseImmunityLevel;
87 u8 cckNoiseImmunityLevel;
88 bool ofdmsTurn;
Rajkumar Manoharan81b67fd62012-06-21 20:33:59 +053089 u8 mrcCCK;
Sujithee6e8d12009-02-09 13:29:49 +053090 u8 spurImmunityLevel;
91 u8 firstepLevel;
Sujith Manoharan4f4395c2013-06-03 09:19:27 +053092 bool ofdmWeakSigDetect;
Sujithee6e8d12009-02-09 13:29:49 +053093 u32 listenTime;
Sujithee6e8d12009-02-09 13:29:49 +053094 u32 ofdmPhyErrCount;
95 u32 cckPhyErrCount;
Luis R. Rodrigueze36b27a2010-06-12 00:33:45 -040096 struct ath9k_ani_default iniDef;
Sujithee6e8d12009-02-09 13:29:49 +053097};
98
Sujith394cf0a2009-02-09 13:26:54 +053099struct ar5416Stats {
Sujith394cf0a2009-02-09 13:26:54 +0530100 u32 ast_ani_spurup;
101 u32 ast_ani_spurdown;
102 u32 ast_ani_ofdmon;
103 u32 ast_ani_ofdmoff;
104 u32 ast_ani_cckhigh;
105 u32 ast_ani_ccklow;
106 u32 ast_ani_stepup;
107 u32 ast_ani_stepdown;
108 u32 ast_ani_ofdmerrs;
109 u32 ast_ani_cckerrs;
110 u32 ast_ani_reset;
Mohammed Shafi Shajakhan107021c2011-08-26 11:19:57 +0530111 u32 ast_ani_lneg_or_lzero;
Vasanthakumar Thiagarajan22e66a42009-08-19 16:23:40 +0530112 u32 avgbrssi;
Sujith394cf0a2009-02-09 13:26:54 +0530113 struct ath9k_mib_stats ast_mibstats;
Sujith394cf0a2009-02-09 13:26:54 +0530114};
Sujith2660b812009-02-09 13:27:26 +0530115#define ah_mibStats stats.ast_mibstats
Sujith394cf0a2009-02-09 13:26:54 +0530116
Sujithcbe61d82009-02-09 13:27:12 +0530117void ath9k_enable_mib_counters(struct ath_hw *ah);
118void ath9k_hw_disable_mib_counters(struct ath_hw *ah);
Luis R. Rodriguezf637cfd2009-08-03 12:24:46 -0700119void ath9k_hw_ani_init(struct ath_hw *ah);
Sujith394cf0a2009-02-09 13:26:54 +0530120
121#endif /* ANI_H */