blob: 368e88de146cdbc7a7a66210c6ff9b1302867a8f [file] [log] [blame]
Yuval Mintzfe56b9e2015-10-26 11:02:25 +02001/* QLogic qed NIC Driver
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02002 * Copyright (c) 2015-2017 QLogic Corporation
Yuval Mintzfe56b9e2015-10-26 11:02:25 +02003 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020031 */
32
33#ifndef _QED_MCP_H
34#define _QED_MCP_H
35
36#include <linux/types.h>
37#include <linux/delay.h>
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020038#include <linux/slab.h>
Tomer Tayar5529bad2016-03-09 09:16:24 +020039#include <linux/spinlock.h>
Arun Easi1e128c82017-02-15 06:28:22 -080040#include <linux/qed/qed_fcoe_if.h>
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020041#include "qed_hsi.h"
42
Yuval Mintzcc875c22015-10-26 11:02:31 +020043struct qed_mcp_link_speed_params {
44 bool autoneg;
45 u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */
46 u32 forced_speed; /* In Mb/s */
47};
48
49struct qed_mcp_link_pause_params {
50 bool autoneg;
51 bool forced_rx;
52 bool forced_tx;
53};
54
55struct qed_mcp_link_params {
56 struct qed_mcp_link_speed_params speed;
57 struct qed_mcp_link_pause_params pause;
58 u32 loopback_mode;
59};
60
61struct qed_mcp_link_capabilities {
62 u32 speed_capabilities;
63};
64
65struct qed_mcp_link_state {
66 bool link_up;
67
Manish Chopraa64b02d2016-04-26 10:56:10 -040068 u32 min_pf_rate;
69
Manish Chopra4b01e512016-04-26 10:56:09 -040070 /* Actual link speed in Mb/s */
71 u32 line_speed;
72
73 /* PF max speed in Mb/s, deduced from line_speed
74 * according to PF max bandwidth configuration.
75 */
76 u32 speed;
Yuval Mintzcc875c22015-10-26 11:02:31 +020077 bool full_duplex;
78
79 bool an;
80 bool an_complete;
81 bool parallel_detection;
82 bool pfc_enabled;
83
84#define QED_LINK_PARTNER_SPEED_1G_HD BIT(0)
85#define QED_LINK_PARTNER_SPEED_1G_FD BIT(1)
86#define QED_LINK_PARTNER_SPEED_10G BIT(2)
87#define QED_LINK_PARTNER_SPEED_20G BIT(3)
Sudarsana Reddy Kalluru054c67d2016-08-09 03:51:23 -040088#define QED_LINK_PARTNER_SPEED_25G BIT(4)
89#define QED_LINK_PARTNER_SPEED_40G BIT(5)
90#define QED_LINK_PARTNER_SPEED_50G BIT(6)
91#define QED_LINK_PARTNER_SPEED_100G BIT(7)
Yuval Mintzcc875c22015-10-26 11:02:31 +020092 u32 partner_adv_speed;
93
94 bool partner_tx_flow_ctrl_en;
95 bool partner_rx_flow_ctrl_en;
96
97#define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
98#define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
99#define QED_LINK_PARTNER_BOTH_PAUSE (3)
100 u8 partner_adv_pause;
101
102 bool sfp_tx_fault;
103};
104
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200105struct qed_mcp_function_info {
106 u8 pause_on_host;
107
108 enum qed_pci_personality protocol;
109
110 u8 bandwidth_min;
111 u8 bandwidth_max;
112
113 u8 mac[ETH_ALEN];
114
115 u64 wwn_port;
116 u64 wwn_node;
117
118#define QED_MCP_VLAN_UNSET (0xffff)
119 u16 ovlan;
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +0200120
121 u16 mtu;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200122};
123
124struct qed_mcp_nvm_common {
125 u32 offset;
126 u32 param;
127 u32 resp;
128 u32 cmd;
129};
130
131struct qed_mcp_drv_version {
132 u32 version;
133 u8 name[MCP_DRV_VER_STR_SIZE - 4];
134};
135
Sudarsana Reddy Kalluru6c754242016-08-16 10:51:03 -0400136struct qed_mcp_lan_stats {
137 u64 ucast_rx_pkts;
138 u64 ucast_tx_pkts;
139 u32 fcs_err;
140};
141
142struct qed_mcp_fcoe_stats {
143 u64 rx_pkts;
144 u64 tx_pkts;
145 u32 fcs_err;
146 u32 login_failure;
147};
148
149struct qed_mcp_iscsi_stats {
150 u64 rx_pdus;
151 u64 tx_pdus;
152 u64 rx_bytes;
153 u64 tx_bytes;
154};
155
156struct qed_mcp_rdma_stats {
157 u64 rx_pkts;
158 u64 tx_pkts;
159 u64 rx_bytes;
160 u64 tx_byts;
161};
162
163enum qed_mcp_protocol_type {
164 QED_MCP_LAN_STATS,
165 QED_MCP_FCOE_STATS,
166 QED_MCP_ISCSI_STATS,
167 QED_MCP_RDMA_STATS
168};
169
170union qed_mcp_protocol_stats {
171 struct qed_mcp_lan_stats lan_stats;
172 struct qed_mcp_fcoe_stats fcoe_stats;
173 struct qed_mcp_iscsi_stats iscsi_stats;
174 struct qed_mcp_rdma_stats rdma_stats;
175};
176
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +0200177enum qed_ov_eswitch {
178 QED_OV_ESWITCH_NONE,
179 QED_OV_ESWITCH_VEB,
180 QED_OV_ESWITCH_VEPA
181};
182
183enum qed_ov_client {
184 QED_OV_CLIENT_DRV,
185 QED_OV_CLIENT_USER,
186 QED_OV_CLIENT_VENDOR_SPEC
187};
188
189enum qed_ov_driver_state {
190 QED_OV_DRIVER_STATE_NOT_LOADED,
191 QED_OV_DRIVER_STATE_DISABLED,
192 QED_OV_DRIVER_STATE_ACTIVE
193};
194
195enum qed_ov_wol {
196 QED_OV_WOL_DEFAULT,
197 QED_OV_WOL_DISABLED,
198 QED_OV_WOL_ENABLED
199};
200
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200201/**
Yuval Mintzcc875c22015-10-26 11:02:31 +0200202 * @brief - returns the link params of the hw function
203 *
204 * @param p_hwfn
205 *
206 * @returns pointer to link params
207 */
208struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *);
209
210/**
211 * @brief - return the link state of the hw function
212 *
213 * @param p_hwfn
214 *
215 * @returns pointer to link state
216 */
217struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *);
218
219/**
220 * @brief - return the link capabilities of the hw function
221 *
222 * @param p_hwfn
223 *
224 * @returns pointer to link capabilities
225 */
226struct qed_mcp_link_capabilities
227 *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
228
229/**
230 * @brief Request the MFW to set the the link according to 'link_input'.
231 *
232 * @param p_hwfn
233 * @param p_ptt
234 * @param b_up - raise link if `true'. Reset link if `false'.
235 *
236 * @return int
237 */
238int qed_mcp_set_link(struct qed_hwfn *p_hwfn,
239 struct qed_ptt *p_ptt,
240 bool b_up);
241
242/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200243 * @brief Get the management firmware version value
244 *
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300245 * @param p_hwfn
246 * @param p_ptt
247 * @param p_mfw_ver - mfw version value
248 * @param p_running_bundle_id - image id in nvram; Optional.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200249 *
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300250 * @return int - 0 - operation was successful.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200251 */
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300252int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
253 struct qed_ptt *p_ptt,
254 u32 *p_mfw_ver, u32 *p_running_bundle_id);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200255
256/**
Yuval Mintzcc875c22015-10-26 11:02:31 +0200257 * @brief Get media type value of the port.
258 *
259 * @param cdev - qed dev pointer
260 * @param mfw_ver - media type value
261 *
262 * @return int -
263 * 0 - Operation was successul.
264 * -EBUSY - Operation failed
265 */
266int qed_mcp_get_media_type(struct qed_dev *cdev,
267 u32 *media_type);
268
269/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200270 * @brief General function for sending commands to the MCP
271 * mailbox. It acquire mutex lock for the entire
272 * operation, from sending the request until the MCP
273 * response. Waiting for MCP response will be checked up
274 * to 5 seconds every 5ms.
275 *
276 * @param p_hwfn - hw function
277 * @param p_ptt - PTT required for register access
278 * @param cmd - command to be sent to the MCP.
279 * @param param - Optional param
280 * @param o_mcp_resp - The MCP response code (exclude sequence).
281 * @param o_mcp_param- Optional parameter provided by the MCP
282 * response
283 * @return int - 0 - operation
284 * was successul.
285 */
286int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
287 struct qed_ptt *p_ptt,
288 u32 cmd,
289 u32 param,
290 u32 *o_mcp_resp,
291 u32 *o_mcp_param);
292
293/**
294 * @brief - drains the nig, allowing completion to pass in case of pauses.
295 * (Should be called only from sleepable context)
296 *
297 * @param p_hwfn
298 * @param p_ptt
299 */
300int qed_mcp_drain(struct qed_hwfn *p_hwfn,
301 struct qed_ptt *p_ptt);
302
303/**
Manish Chopracee4d262015-10-26 11:02:28 +0200304 * @brief Get the flash size value
305 *
306 * @param p_hwfn
307 * @param p_ptt
308 * @param p_flash_size - flash size in bytes to be filled.
309 *
310 * @return int - 0 - operation was successul.
311 */
312int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn,
313 struct qed_ptt *p_ptt,
314 u32 *p_flash_size);
315
316/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200317 * @brief Send driver version to MFW
318 *
319 * @param p_hwfn
320 * @param p_ptt
321 * @param version - Version value
322 * @param name - Protocol driver name
323 *
324 * @return int - 0 - operation was successul.
325 */
326int
327qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
328 struct qed_ptt *p_ptt,
329 struct qed_mcp_drv_version *p_ver);
330
Sudarsana Kalluru91420b82015-11-30 12:25:03 +0200331/**
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +0200332 * @brief Notify MFW about the change in base device properties
333 *
334 * @param p_hwfn
335 * @param p_ptt
336 * @param client - qed client type
337 *
338 * @return int - 0 - operation was successful.
339 */
340int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
341 struct qed_ptt *p_ptt,
342 enum qed_ov_client client);
343
344/**
345 * @brief Notify MFW about the driver state
346 *
347 * @param p_hwfn
348 * @param p_ptt
349 * @param drv_state - Driver state
350 *
351 * @return int - 0 - operation was successful.
352 */
353int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
354 struct qed_ptt *p_ptt,
355 enum qed_ov_driver_state drv_state);
356
357/**
358 * @brief Send MTU size to MFW
359 *
360 * @param p_hwfn
361 * @param p_ptt
362 * @param mtu - MTU size
363 *
364 * @return int - 0 - operation was successful.
365 */
366int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
367 struct qed_ptt *p_ptt, u16 mtu);
368
369/**
370 * @brief Send MAC address to MFW
371 *
372 * @param p_hwfn
373 * @param p_ptt
374 * @param mac - MAC address
375 *
376 * @return int - 0 - operation was successful.
377 */
378int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
379 struct qed_ptt *p_ptt, u8 *mac);
380
381/**
382 * @brief Send WOL mode to MFW
383 *
384 * @param p_hwfn
385 * @param p_ptt
386 * @param wol - WOL mode
387 *
388 * @return int - 0 - operation was successful.
389 */
390int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
391 struct qed_ptt *p_ptt,
392 enum qed_ov_wol wol);
393
394/**
Sudarsana Kalluru91420b82015-11-30 12:25:03 +0200395 * @brief Set LED status
396 *
397 * @param p_hwfn
398 * @param p_ptt
399 * @param mode - LED mode
400 *
401 * @return int - 0 - operation was successful.
402 */
403int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
404 struct qed_ptt *p_ptt,
405 enum qed_led_mode mode);
406
Sudarsana Reddy Kalluru03dc76c2016-04-28 20:20:52 -0400407/**
Mintz, Yuval7a4b21b2016-10-31 07:14:22 +0200408 * @brief Read from nvm
409 *
410 * @param cdev
411 * @param addr - nvm offset
412 * @param p_buf - nvm read buffer
413 * @param len - buffer len
414 *
415 * @return int - 0 - operation was successful.
416 */
417int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len);
418
419/**
Sudarsana Reddy Kalluru03dc76c2016-04-28 20:20:52 -0400420 * @brief Bist register test
421 *
422 * @param p_hwfn - hw function
423 * @param p_ptt - PTT required for register access
424 *
425 * @return int - 0 - operation was successful.
426 */
427int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
428 struct qed_ptt *p_ptt);
429
430/**
431 * @brief Bist clock test
432 *
433 * @param p_hwfn - hw function
434 * @param p_ptt - PTT required for register access
435 *
436 * @return int - 0 - operation was successful.
437 */
438int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
439 struct qed_ptt *p_ptt);
440
Mintz, Yuval7a4b21b2016-10-31 07:14:22 +0200441/**
442 * @brief Bist nvm test - get number of images
443 *
444 * @param p_hwfn - hw function
445 * @param p_ptt - PTT required for register access
446 * @param num_images - number of images if operation was
447 * successful. 0 if not.
448 *
449 * @return int - 0 - operation was successful.
450 */
451int qed_mcp_bist_nvm_test_get_num_images(struct qed_hwfn *p_hwfn,
452 struct qed_ptt *p_ptt,
453 u32 *num_images);
454
455/**
456 * @brief Bist nvm test - get image attributes by index
457 *
458 * @param p_hwfn - hw function
459 * @param p_ptt - PTT required for register access
460 * @param p_image_att - Attributes of image
461 * @param image_index - Index of image to get information for
462 *
463 * @return int - 0 - operation was successful.
464 */
465int qed_mcp_bist_nvm_test_get_image_att(struct qed_hwfn *p_hwfn,
466 struct qed_ptt *p_ptt,
467 struct bist_nvm_image_att *p_image_att,
468 u32 image_index);
469
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200470/* Using hwfn number (and not pf_num) is required since in CMT mode,
471 * same pf_num may be used by two different hwfn
472 * TODO - this shouldn't really be in .h file, but until all fields
473 * required during hw-init will be placed in their correct place in shmem
474 * we need it in qed_dev.c [for readin the nvram reflection in shmem].
475 */
476#define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ? \
477 ((rel_pfid) | \
478 ((p_hwfn)->abs_pf_id & 1) << 3) : \
479 rel_pfid)
480#define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
481
482/* TODO - this is only correct as long as only BB is supported, and
483 * no port-swapping is implemented; Afterwards we'll need to fix it.
484 */
485#define MFW_PORT(_p_hwfn) ((_p_hwfn)->abs_pf_id % \
486 ((_p_hwfn)->cdev->num_ports_in_engines * 2))
487struct qed_mcp_info {
Mintz, Yuval65ed2ff2017-02-20 22:43:39 +0200488 /* Spinlock used for protecting the access to the MFW mailbox */
Tomer Tayar5529bad2016-03-09 09:16:24 +0200489 spinlock_t lock;
Mintz, Yuval65ed2ff2017-02-20 22:43:39 +0200490
491 /* Spinlock used for syncing SW link-changes and link-changes
492 * originating from attention context.
493 */
494 spinlock_t link_lock;
Tomer Tayar5529bad2016-03-09 09:16:24 +0200495 bool block_mb_sending;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200496 u32 public_base;
497 u32 drv_mb_addr;
498 u32 mfw_mb_addr;
499 u32 port_addr;
500 u16 drv_mb_seq;
501 u16 drv_pulse_seq;
Yuval Mintzcc875c22015-10-26 11:02:31 +0200502 struct qed_mcp_link_params link_input;
503 struct qed_mcp_link_state link_output;
504 struct qed_mcp_link_capabilities link_capabilities;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200505 struct qed_mcp_function_info func_info;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200506 u8 *mfw_mb_cur;
507 u8 *mfw_mb_shadow;
508 u16 mfw_mb_length;
509 u16 mcp_hist;
510};
511
Tomer Tayar5529bad2016-03-09 09:16:24 +0200512struct qed_mcp_mb_params {
513 u32 cmd;
514 u32 param;
515 union drv_union_data *p_data_src;
516 union drv_union_data *p_data_dst;
517 u32 mcp_resp;
518 u32 mcp_param;
519};
520
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200521/**
522 * @brief Initialize the interface with the MCP
523 *
524 * @param p_hwfn - HW func
525 * @param p_ptt - PTT required for register access
526 *
527 * @return int
528 */
529int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
530 struct qed_ptt *p_ptt);
531
532/**
533 * @brief Initialize the port interface with the MCP
534 *
535 * @param p_hwfn
536 * @param p_ptt
537 * Can only be called after `num_ports_in_engines' is set
538 */
539void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
540 struct qed_ptt *p_ptt);
541/**
542 * @brief Releases resources allocated during the init process.
543 *
544 * @param p_hwfn - HW func
545 * @param p_ptt - PTT required for register access
546 *
547 * @return int
548 */
549
550int qed_mcp_free(struct qed_hwfn *p_hwfn);
551
552/**
Yuval Mintzcc875c22015-10-26 11:02:31 +0200553 * @brief This function is called from the DPC context. After
554 * pointing PTT to the mfw mb, check for events sent by the MCP
555 * to the driver and ack them. In case a critical event
556 * detected, it will be handled here, otherwise the work will be
557 * queued to a sleepable work-queue.
558 *
559 * @param p_hwfn - HW function
560 * @param p_ptt - PTT required for register access
561 * @return int - 0 - operation
562 * was successul.
563 */
564int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
565 struct qed_ptt *p_ptt);
566
567/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200568 * @brief Sends a LOAD_REQ to the MFW, and in case operation
569 * succeed, returns whether this PF is the first on the
570 * chip/engine/port or function. This function should be
571 * called when driver is ready to accept MFW events after
572 * Storms initializations are done.
573 *
574 * @param p_hwfn - hw function
575 * @param p_ptt - PTT required for register access
576 * @param p_load_code - The MCP response param containing one
577 * of the following:
578 * FW_MSG_CODE_DRV_LOAD_ENGINE
579 * FW_MSG_CODE_DRV_LOAD_PORT
580 * FW_MSG_CODE_DRV_LOAD_FUNCTION
581 * @return int -
582 * 0 - Operation was successul.
583 * -EBUSY - Operation failed
584 */
585int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
586 struct qed_ptt *p_ptt,
587 u32 *p_load_code);
588
589/**
590 * @brief Read the MFW mailbox into Current buffer.
591 *
592 * @param p_hwfn
593 * @param p_ptt
594 */
595void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
596 struct qed_ptt *p_ptt);
597
598/**
Yuval Mintz0b55e272016-05-11 16:36:15 +0300599 * @brief Ack to mfw that driver finished FLR process for VFs
600 *
601 * @param p_hwfn
602 * @param p_ptt
603 * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
604 *
605 * @param return int - 0 upon success.
606 */
607int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
608 struct qed_ptt *p_ptt, u32 *vfs_to_ack);
609
610/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200611 * @brief - calls during init to read shmem of all function-related info.
612 *
613 * @param p_hwfn
614 *
615 * @param return 0 upon success.
616 */
617int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
618 struct qed_ptt *p_ptt);
619
620/**
621 * @brief - Reset the MCP using mailbox command.
622 *
623 * @param p_hwfn
624 * @param p_ptt
625 *
626 * @param return 0 upon success.
627 */
628int qed_mcp_reset(struct qed_hwfn *p_hwfn,
629 struct qed_ptt *p_ptt);
630
631/**
Tomer Tayar41024262016-09-05 14:35:10 +0300632 * @brief - Sends an NVM read command request to the MFW to get
633 * a buffer.
634 *
635 * @param p_hwfn
636 * @param p_ptt
637 * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
638 * DRV_MSG_CODE_NVM_READ_NVRAM commands
639 * @param param - [0:23] - Offset [24:31] - Size
640 * @param o_mcp_resp - MCP response
641 * @param o_mcp_param - MCP response param
642 * @param o_txn_size - Buffer size output
643 * @param o_buf - Pointer to the buffer returned by the MFW.
644 *
645 * @param return 0 upon success.
646 */
647int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
648 struct qed_ptt *p_ptt,
649 u32 cmd,
650 u32 param,
651 u32 *o_mcp_resp,
652 u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf);
653
654/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200655 * @brief indicates whether the MFW objects [under mcp_info] are accessible
656 *
657 * @param p_hwfn
658 *
659 * @return true iff MFW is running and mcp_info is initialized
660 */
661bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300662
663/**
664 * @brief request MFW to configure MSI-X for a VF
665 *
666 * @param p_hwfn
667 * @param p_ptt
668 * @param vf_id - absolute inside engine
669 * @param num_sbs - number of entries to request
670 *
671 * @return int
672 */
673int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
674 struct qed_ptt *p_ptt, u8 vf_id, u8 num);
675
Tomer Tayar41024262016-09-05 14:35:10 +0300676/**
677 * @brief - Halt the MCP.
678 *
679 * @param p_hwfn
680 * @param p_ptt
681 *
682 * @param return 0 upon success.
683 */
684int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
685
686/**
687 * @brief - Wake up the MCP.
688 *
689 * @param p_hwfn
690 * @param p_ptt
691 *
692 * @param return 0 upon success.
693 */
694int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
695
Manish Chopraa64b02d2016-04-26 10:56:10 -0400696int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
Manish Chopra4b01e512016-04-26 10:56:09 -0400697int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
698int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
699 struct qed_ptt *p_ptt,
700 struct qed_mcp_link_state *p_link,
701 u8 max_bw);
Manish Chopraa64b02d2016-04-26 10:56:10 -0400702int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
703 struct qed_ptt *p_ptt,
704 struct qed_mcp_link_state *p_link,
705 u8 min_bw);
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300706
Tomer Tayar41024262016-09-05 14:35:10 +0300707int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
708 struct qed_ptt *p_ptt, u32 mask_parities);
709
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +0200710/**
711 * @brief Send eswitch mode to MFW
712 *
713 * @param p_hwfn
714 * @param p_ptt
715 * @param eswitch - eswitch mode
716 *
717 * @return int - 0 - operation was successful.
718 */
719int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
720 struct qed_ptt *p_ptt,
721 enum qed_ov_eswitch eswitch);
722
Tomer Tayar2edbff82016-10-31 07:14:27 +0200723/**
724 * @brief - Gets the MFW allocation info for the given resource
725 *
726 * @param p_hwfn
727 * @param p_ptt
728 * @param p_resc_info - descriptor of requested resource
729 * @param p_mcp_resp
730 * @param p_mcp_param
731 *
732 * @return int - 0 - operation was successful.
733 */
734int qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn,
735 struct qed_ptt *p_ptt,
736 struct resource_info *p_resc_info,
737 u32 *p_mcp_resp, u32 *p_mcp_param);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200738#endif