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Yuval Mintzfe56b9e2015-10-26 11:02:25 +02001/* QLogic qed NIC Driver
2 * Copyright (c) 2015 QLogic Corporation
3 *
4 * This software is available under the terms of the GNU General Public License
5 * (GPL) Version 2, available from the file COPYING in the main directory of
6 * this source tree.
7 */
8
9#ifndef _QED_MCP_H
10#define _QED_MCP_H
11
12#include <linux/types.h>
13#include <linux/delay.h>
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020014#include <linux/slab.h>
Tomer Tayar5529bad2016-03-09 09:16:24 +020015#include <linux/spinlock.h>
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020016#include "qed_hsi.h"
17
Yuval Mintzcc875c22015-10-26 11:02:31 +020018struct qed_mcp_link_speed_params {
19 bool autoneg;
20 u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */
21 u32 forced_speed; /* In Mb/s */
22};
23
24struct qed_mcp_link_pause_params {
25 bool autoneg;
26 bool forced_rx;
27 bool forced_tx;
28};
29
30struct qed_mcp_link_params {
31 struct qed_mcp_link_speed_params speed;
32 struct qed_mcp_link_pause_params pause;
33 u32 loopback_mode;
34};
35
36struct qed_mcp_link_capabilities {
37 u32 speed_capabilities;
38};
39
40struct qed_mcp_link_state {
41 bool link_up;
42
Manish Chopraa64b02d2016-04-26 10:56:10 -040043 u32 min_pf_rate;
44
Manish Chopra4b01e512016-04-26 10:56:09 -040045 /* Actual link speed in Mb/s */
46 u32 line_speed;
47
48 /* PF max speed in Mb/s, deduced from line_speed
49 * according to PF max bandwidth configuration.
50 */
51 u32 speed;
Yuval Mintzcc875c22015-10-26 11:02:31 +020052 bool full_duplex;
53
54 bool an;
55 bool an_complete;
56 bool parallel_detection;
57 bool pfc_enabled;
58
59#define QED_LINK_PARTNER_SPEED_1G_HD BIT(0)
60#define QED_LINK_PARTNER_SPEED_1G_FD BIT(1)
61#define QED_LINK_PARTNER_SPEED_10G BIT(2)
62#define QED_LINK_PARTNER_SPEED_20G BIT(3)
Sudarsana Reddy Kalluru054c67d2016-08-09 03:51:23 -040063#define QED_LINK_PARTNER_SPEED_25G BIT(4)
64#define QED_LINK_PARTNER_SPEED_40G BIT(5)
65#define QED_LINK_PARTNER_SPEED_50G BIT(6)
66#define QED_LINK_PARTNER_SPEED_100G BIT(7)
Yuval Mintzcc875c22015-10-26 11:02:31 +020067 u32 partner_adv_speed;
68
69 bool partner_tx_flow_ctrl_en;
70 bool partner_rx_flow_ctrl_en;
71
72#define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
73#define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
74#define QED_LINK_PARTNER_BOTH_PAUSE (3)
75 u8 partner_adv_pause;
76
77 bool sfp_tx_fault;
78};
79
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020080struct qed_mcp_function_info {
81 u8 pause_on_host;
82
83 enum qed_pci_personality protocol;
84
85 u8 bandwidth_min;
86 u8 bandwidth_max;
87
88 u8 mac[ETH_ALEN];
89
90 u64 wwn_port;
91 u64 wwn_node;
92
93#define QED_MCP_VLAN_UNSET (0xffff)
94 u16 ovlan;
95};
96
97struct qed_mcp_nvm_common {
98 u32 offset;
99 u32 param;
100 u32 resp;
101 u32 cmd;
102};
103
104struct qed_mcp_drv_version {
105 u32 version;
106 u8 name[MCP_DRV_VER_STR_SIZE - 4];
107};
108
109/**
Yuval Mintzcc875c22015-10-26 11:02:31 +0200110 * @brief - returns the link params of the hw function
111 *
112 * @param p_hwfn
113 *
114 * @returns pointer to link params
115 */
116struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *);
117
118/**
119 * @brief - return the link state of the hw function
120 *
121 * @param p_hwfn
122 *
123 * @returns pointer to link state
124 */
125struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *);
126
127/**
128 * @brief - return the link capabilities of the hw function
129 *
130 * @param p_hwfn
131 *
132 * @returns pointer to link capabilities
133 */
134struct qed_mcp_link_capabilities
135 *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
136
137/**
138 * @brief Request the MFW to set the the link according to 'link_input'.
139 *
140 * @param p_hwfn
141 * @param p_ptt
142 * @param b_up - raise link if `true'. Reset link if `false'.
143 *
144 * @return int
145 */
146int qed_mcp_set_link(struct qed_hwfn *p_hwfn,
147 struct qed_ptt *p_ptt,
148 bool b_up);
149
150/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200151 * @brief Get the management firmware version value
152 *
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300153 * @param p_hwfn
154 * @param p_ptt
155 * @param p_mfw_ver - mfw version value
156 * @param p_running_bundle_id - image id in nvram; Optional.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200157 *
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300158 * @return int - 0 - operation was successful.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200159 */
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300160int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
161 struct qed_ptt *p_ptt,
162 u32 *p_mfw_ver, u32 *p_running_bundle_id);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200163
164/**
Yuval Mintzcc875c22015-10-26 11:02:31 +0200165 * @brief Get media type value of the port.
166 *
167 * @param cdev - qed dev pointer
168 * @param mfw_ver - media type value
169 *
170 * @return int -
171 * 0 - Operation was successul.
172 * -EBUSY - Operation failed
173 */
174int qed_mcp_get_media_type(struct qed_dev *cdev,
175 u32 *media_type);
176
177/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200178 * @brief General function for sending commands to the MCP
179 * mailbox. It acquire mutex lock for the entire
180 * operation, from sending the request until the MCP
181 * response. Waiting for MCP response will be checked up
182 * to 5 seconds every 5ms.
183 *
184 * @param p_hwfn - hw function
185 * @param p_ptt - PTT required for register access
186 * @param cmd - command to be sent to the MCP.
187 * @param param - Optional param
188 * @param o_mcp_resp - The MCP response code (exclude sequence).
189 * @param o_mcp_param- Optional parameter provided by the MCP
190 * response
191 * @return int - 0 - operation
192 * was successul.
193 */
194int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
195 struct qed_ptt *p_ptt,
196 u32 cmd,
197 u32 param,
198 u32 *o_mcp_resp,
199 u32 *o_mcp_param);
200
201/**
202 * @brief - drains the nig, allowing completion to pass in case of pauses.
203 * (Should be called only from sleepable context)
204 *
205 * @param p_hwfn
206 * @param p_ptt
207 */
208int qed_mcp_drain(struct qed_hwfn *p_hwfn,
209 struct qed_ptt *p_ptt);
210
211/**
Manish Chopracee4d262015-10-26 11:02:28 +0200212 * @brief Get the flash size value
213 *
214 * @param p_hwfn
215 * @param p_ptt
216 * @param p_flash_size - flash size in bytes to be filled.
217 *
218 * @return int - 0 - operation was successul.
219 */
220int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn,
221 struct qed_ptt *p_ptt,
222 u32 *p_flash_size);
223
224/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200225 * @brief Send driver version to MFW
226 *
227 * @param p_hwfn
228 * @param p_ptt
229 * @param version - Version value
230 * @param name - Protocol driver name
231 *
232 * @return int - 0 - operation was successul.
233 */
234int
235qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
236 struct qed_ptt *p_ptt,
237 struct qed_mcp_drv_version *p_ver);
238
Sudarsana Kalluru91420b82015-11-30 12:25:03 +0200239/**
240 * @brief Set LED status
241 *
242 * @param p_hwfn
243 * @param p_ptt
244 * @param mode - LED mode
245 *
246 * @return int - 0 - operation was successful.
247 */
248int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
249 struct qed_ptt *p_ptt,
250 enum qed_led_mode mode);
251
Sudarsana Reddy Kalluru03dc76c2016-04-28 20:20:52 -0400252/**
253 * @brief Bist register test
254 *
255 * @param p_hwfn - hw function
256 * @param p_ptt - PTT required for register access
257 *
258 * @return int - 0 - operation was successful.
259 */
260int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
261 struct qed_ptt *p_ptt);
262
263/**
264 * @brief Bist clock test
265 *
266 * @param p_hwfn - hw function
267 * @param p_ptt - PTT required for register access
268 *
269 * @return int - 0 - operation was successful.
270 */
271int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
272 struct qed_ptt *p_ptt);
273
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200274/* Using hwfn number (and not pf_num) is required since in CMT mode,
275 * same pf_num may be used by two different hwfn
276 * TODO - this shouldn't really be in .h file, but until all fields
277 * required during hw-init will be placed in their correct place in shmem
278 * we need it in qed_dev.c [for readin the nvram reflection in shmem].
279 */
280#define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ? \
281 ((rel_pfid) | \
282 ((p_hwfn)->abs_pf_id & 1) << 3) : \
283 rel_pfid)
284#define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
285
286/* TODO - this is only correct as long as only BB is supported, and
287 * no port-swapping is implemented; Afterwards we'll need to fix it.
288 */
289#define MFW_PORT(_p_hwfn) ((_p_hwfn)->abs_pf_id % \
290 ((_p_hwfn)->cdev->num_ports_in_engines * 2))
291struct qed_mcp_info {
Tomer Tayar5529bad2016-03-09 09:16:24 +0200292 spinlock_t lock;
293 bool block_mb_sending;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200294 u32 public_base;
295 u32 drv_mb_addr;
296 u32 mfw_mb_addr;
297 u32 port_addr;
298 u16 drv_mb_seq;
299 u16 drv_pulse_seq;
Yuval Mintzcc875c22015-10-26 11:02:31 +0200300 struct qed_mcp_link_params link_input;
301 struct qed_mcp_link_state link_output;
302 struct qed_mcp_link_capabilities link_capabilities;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200303 struct qed_mcp_function_info func_info;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200304 u8 *mfw_mb_cur;
305 u8 *mfw_mb_shadow;
306 u16 mfw_mb_length;
307 u16 mcp_hist;
308};
309
Tomer Tayar5529bad2016-03-09 09:16:24 +0200310struct qed_mcp_mb_params {
311 u32 cmd;
312 u32 param;
313 union drv_union_data *p_data_src;
314 union drv_union_data *p_data_dst;
315 u32 mcp_resp;
316 u32 mcp_param;
317};
318
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200319/**
320 * @brief Initialize the interface with the MCP
321 *
322 * @param p_hwfn - HW func
323 * @param p_ptt - PTT required for register access
324 *
325 * @return int
326 */
327int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
328 struct qed_ptt *p_ptt);
329
330/**
331 * @brief Initialize the port interface with the MCP
332 *
333 * @param p_hwfn
334 * @param p_ptt
335 * Can only be called after `num_ports_in_engines' is set
336 */
337void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
338 struct qed_ptt *p_ptt);
339/**
340 * @brief Releases resources allocated during the init process.
341 *
342 * @param p_hwfn - HW func
343 * @param p_ptt - PTT required for register access
344 *
345 * @return int
346 */
347
348int qed_mcp_free(struct qed_hwfn *p_hwfn);
349
350/**
Yuval Mintzcc875c22015-10-26 11:02:31 +0200351 * @brief This function is called from the DPC context. After
352 * pointing PTT to the mfw mb, check for events sent by the MCP
353 * to the driver and ack them. In case a critical event
354 * detected, it will be handled here, otherwise the work will be
355 * queued to a sleepable work-queue.
356 *
357 * @param p_hwfn - HW function
358 * @param p_ptt - PTT required for register access
359 * @return int - 0 - operation
360 * was successul.
361 */
362int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
363 struct qed_ptt *p_ptt);
364
365/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200366 * @brief Sends a LOAD_REQ to the MFW, and in case operation
367 * succeed, returns whether this PF is the first on the
368 * chip/engine/port or function. This function should be
369 * called when driver is ready to accept MFW events after
370 * Storms initializations are done.
371 *
372 * @param p_hwfn - hw function
373 * @param p_ptt - PTT required for register access
374 * @param p_load_code - The MCP response param containing one
375 * of the following:
376 * FW_MSG_CODE_DRV_LOAD_ENGINE
377 * FW_MSG_CODE_DRV_LOAD_PORT
378 * FW_MSG_CODE_DRV_LOAD_FUNCTION
379 * @return int -
380 * 0 - Operation was successul.
381 * -EBUSY - Operation failed
382 */
383int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
384 struct qed_ptt *p_ptt,
385 u32 *p_load_code);
386
387/**
388 * @brief Read the MFW mailbox into Current buffer.
389 *
390 * @param p_hwfn
391 * @param p_ptt
392 */
393void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
394 struct qed_ptt *p_ptt);
395
396/**
Yuval Mintz0b55e272016-05-11 16:36:15 +0300397 * @brief Ack to mfw that driver finished FLR process for VFs
398 *
399 * @param p_hwfn
400 * @param p_ptt
401 * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
402 *
403 * @param return int - 0 upon success.
404 */
405int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
406 struct qed_ptt *p_ptt, u32 *vfs_to_ack);
407
408/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200409 * @brief - calls during init to read shmem of all function-related info.
410 *
411 * @param p_hwfn
412 *
413 * @param return 0 upon success.
414 */
415int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
416 struct qed_ptt *p_ptt);
417
418/**
419 * @brief - Reset the MCP using mailbox command.
420 *
421 * @param p_hwfn
422 * @param p_ptt
423 *
424 * @param return 0 upon success.
425 */
426int qed_mcp_reset(struct qed_hwfn *p_hwfn,
427 struct qed_ptt *p_ptt);
428
429/**
430 * @brief indicates whether the MFW objects [under mcp_info] are accessible
431 *
432 * @param p_hwfn
433 *
434 * @return true iff MFW is running and mcp_info is initialized
435 */
436bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300437
438/**
439 * @brief request MFW to configure MSI-X for a VF
440 *
441 * @param p_hwfn
442 * @param p_ptt
443 * @param vf_id - absolute inside engine
444 * @param num_sbs - number of entries to request
445 *
446 * @return int
447 */
448int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
449 struct qed_ptt *p_ptt, u8 vf_id, u8 num);
450
Manish Chopraa64b02d2016-04-26 10:56:10 -0400451int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
Manish Chopra4b01e512016-04-26 10:56:09 -0400452int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
453int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
454 struct qed_ptt *p_ptt,
455 struct qed_mcp_link_state *p_link,
456 u8 max_bw);
Manish Chopraa64b02d2016-04-26 10:56:10 -0400457int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
458 struct qed_ptt *p_ptt,
459 struct qed_mcp_link_state *p_link,
460 u8 min_bw);
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300461
462int qed_hw_init_first_eth(struct qed_hwfn *p_hwfn,
463 struct qed_ptt *p_ptt, u8 *p_pf);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200464#endif