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Max Filippov0d456ba2012-11-05 07:37:14 +04001/*
Max Filippov49490092015-02-27 06:28:00 +03002 * Driver for the LCD display on the Tensilica XTFPGA board family.
3 * http://www.mytechcorp.com/cfdata/productFile/File1/MOC-16216B-B-A0A04.pdf
Max Filippov0d456ba2012-11-05 07:37:14 +04004 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * Copyright (C) 2001, 2006 Tensilica Inc.
Max Filippov49490092015-02-27 06:28:00 +030010 * Copyright (C) 2015 Cadence Design Systems Inc.
Max Filippov0d456ba2012-11-05 07:37:14 +040011 */
12
Max Filippov49490092015-02-27 06:28:00 +030013#include <linux/delay.h>
Max Filippov0d456ba2012-11-05 07:37:14 +040014#include <linux/init.h>
15#include <linux/io.h>
16
17#include <platform/hardware.h>
18#include <platform/lcd.h>
Max Filippov0d456ba2012-11-05 07:37:14 +040019
Max Filippov49490092015-02-27 06:28:00 +030020/* LCD instruction and data addresses. */
21#define LCD_INSTR_ADDR ((char *)IOADDR(CONFIG_XTFPGA_LCD_BASE_ADDR))
22#define LCD_DATA_ADDR (LCD_INSTR_ADDR + 4)
23
Max Filippov0d456ba2012-11-05 07:37:14 +040024#define LCD_CLEAR 0x1
25#define LCD_DISPLAY_ON 0xc
26
27/* 8bit and 2 lines display */
28#define LCD_DISPLAY_MODE8BIT 0x38
Max Filippov49490092015-02-27 06:28:00 +030029#define LCD_DISPLAY_MODE4BIT 0x28
Max Filippov0d456ba2012-11-05 07:37:14 +040030#define LCD_DISPLAY_POS 0x80
31#define LCD_SHIFT_LEFT 0x18
32#define LCD_SHIFT_RIGHT 0x1c
33
Max Filippov49490092015-02-27 06:28:00 +030034static void lcd_put_byte(u8 *addr, u8 data)
35{
36#ifdef CONFIG_XTFPGA_LCD_8BIT_ACCESS
Mark Rutland6aa7de02017-10-23 14:07:29 -070037 WRITE_ONCE(*addr, data);
Max Filippov49490092015-02-27 06:28:00 +030038#else
Mark Rutland6aa7de02017-10-23 14:07:29 -070039 WRITE_ONCE(*addr, data & 0xf0);
40 WRITE_ONCE(*addr, (data << 4) & 0xf0);
Max Filippov49490092015-02-27 06:28:00 +030041#endif
42}
43
Max Filippov0d456ba2012-11-05 07:37:14 +040044static int __init lcd_init(void)
45{
Mark Rutland6aa7de02017-10-23 14:07:29 -070046 WRITE_ONCE(*LCD_INSTR_ADDR, LCD_DISPLAY_MODE8BIT);
Max Filippov0d456ba2012-11-05 07:37:14 +040047 mdelay(5);
Mark Rutland6aa7de02017-10-23 14:07:29 -070048 WRITE_ONCE(*LCD_INSTR_ADDR, LCD_DISPLAY_MODE8BIT);
Max Filippov0d456ba2012-11-05 07:37:14 +040049 udelay(200);
Mark Rutland6aa7de02017-10-23 14:07:29 -070050 WRITE_ONCE(*LCD_INSTR_ADDR, LCD_DISPLAY_MODE8BIT);
Max Filippov0d456ba2012-11-05 07:37:14 +040051 udelay(50);
Max Filippov49490092015-02-27 06:28:00 +030052#ifndef CONFIG_XTFPGA_LCD_8BIT_ACCESS
Mark Rutland6aa7de02017-10-23 14:07:29 -070053 WRITE_ONCE(*LCD_INSTR_ADDR, LCD_DISPLAY_MODE4BIT);
Max Filippov0d456ba2012-11-05 07:37:14 +040054 udelay(50);
Max Filippov49490092015-02-27 06:28:00 +030055 lcd_put_byte(LCD_INSTR_ADDR, LCD_DISPLAY_MODE4BIT);
56 udelay(50);
57#endif
58 lcd_put_byte(LCD_INSTR_ADDR, LCD_DISPLAY_ON);
59 udelay(50);
60 lcd_put_byte(LCD_INSTR_ADDR, LCD_CLEAR);
Max Filippov0d456ba2012-11-05 07:37:14 +040061 mdelay(10);
62 lcd_disp_at_pos("XTENSA LINUX", 0);
63 return 0;
64}
65
66void lcd_disp_at_pos(char *str, unsigned char pos)
67{
Max Filippov49490092015-02-27 06:28:00 +030068 lcd_put_byte(LCD_INSTR_ADDR, LCD_DISPLAY_POS | pos);
Max Filippov0d456ba2012-11-05 07:37:14 +040069 udelay(100);
70 while (*str != 0) {
Max Filippov49490092015-02-27 06:28:00 +030071 lcd_put_byte(LCD_DATA_ADDR, *str);
Max Filippov0d456ba2012-11-05 07:37:14 +040072 udelay(200);
73 str++;
74 }
75}
76
77void lcd_shiftleft(void)
78{
Max Filippov49490092015-02-27 06:28:00 +030079 lcd_put_byte(LCD_INSTR_ADDR, LCD_SHIFT_LEFT);
Max Filippov0d456ba2012-11-05 07:37:14 +040080 udelay(50);
81}
82
83void lcd_shiftright(void)
84{
Max Filippov49490092015-02-27 06:28:00 +030085 lcd_put_byte(LCD_INSTR_ADDR, LCD_SHIFT_RIGHT);
Max Filippov0d456ba2012-11-05 07:37:14 +040086 udelay(50);
87}
88
89arch_initcall(lcd_init);