| Gabor Juhos | d4a67d9 | 2011-01-04 21:28:14 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Atheros AR71XX/AR724X/AR913X common definitions |
| 3 | * |
| 4 | * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 6 | * |
| 7 | * Parts of this file are based on Atheros' 2.6.15 BSP |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License version 2 as published |
| 11 | * by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| 14 | #ifndef __ASM_MACH_ATH79_H |
| 15 | #define __ASM_MACH_ATH79_H |
| 16 | |
| 17 | #include <linux/types.h> |
| 18 | #include <linux/io.h> |
| 19 | |
| 20 | enum ath79_soc_type { |
| 21 | ATH79_SOC_UNKNOWN, |
| 22 | ATH79_SOC_AR7130, |
| 23 | ATH79_SOC_AR7141, |
| 24 | ATH79_SOC_AR7161, |
| 25 | ATH79_SOC_AR7240, |
| 26 | ATH79_SOC_AR7241, |
| 27 | ATH79_SOC_AR7242, |
| 28 | ATH79_SOC_AR9130, |
| Gabor Juhos | 6d1c8fd | 2011-06-23 18:13:14 +0200 | [diff] [blame^] | 29 | ATH79_SOC_AR9132, |
| 30 | ATH79_SOC_AR9330, |
| 31 | ATH79_SOC_AR9331, |
| Gabor Juhos | d4a67d9 | 2011-01-04 21:28:14 +0100 | [diff] [blame] | 32 | }; |
| 33 | |
| 34 | extern enum ath79_soc_type ath79_soc; |
| 35 | |
| 36 | static inline int soc_is_ar71xx(void) |
| 37 | { |
| 38 | return (ath79_soc == ATH79_SOC_AR7130 || |
| 39 | ath79_soc == ATH79_SOC_AR7141 || |
| 40 | ath79_soc == ATH79_SOC_AR7161); |
| 41 | } |
| 42 | |
| 43 | static inline int soc_is_ar724x(void) |
| 44 | { |
| 45 | return (ath79_soc == ATH79_SOC_AR7240 || |
| 46 | ath79_soc == ATH79_SOC_AR7241 || |
| 47 | ath79_soc == ATH79_SOC_AR7242); |
| 48 | } |
| 49 | |
| 50 | static inline int soc_is_ar7240(void) |
| 51 | { |
| 52 | return (ath79_soc == ATH79_SOC_AR7240); |
| 53 | } |
| 54 | |
| 55 | static inline int soc_is_ar7241(void) |
| 56 | { |
| 57 | return (ath79_soc == ATH79_SOC_AR7241); |
| 58 | } |
| 59 | |
| 60 | static inline int soc_is_ar7242(void) |
| 61 | { |
| 62 | return (ath79_soc == ATH79_SOC_AR7242); |
| 63 | } |
| 64 | |
| 65 | static inline int soc_is_ar913x(void) |
| 66 | { |
| 67 | return (ath79_soc == ATH79_SOC_AR9130 || |
| 68 | ath79_soc == ATH79_SOC_AR9132); |
| 69 | } |
| 70 | |
| 71 | extern void __iomem *ath79_ddr_base; |
| 72 | extern void __iomem *ath79_pll_base; |
| 73 | extern void __iomem *ath79_reset_base; |
| 74 | |
| 75 | static inline void ath79_pll_wr(unsigned reg, u32 val) |
| 76 | { |
| 77 | __raw_writel(val, ath79_pll_base + reg); |
| 78 | } |
| 79 | |
| 80 | static inline u32 ath79_pll_rr(unsigned reg) |
| 81 | { |
| 82 | return __raw_readl(ath79_pll_base + reg); |
| 83 | } |
| 84 | |
| 85 | static inline void ath79_reset_wr(unsigned reg, u32 val) |
| 86 | { |
| 87 | __raw_writel(val, ath79_reset_base + reg); |
| 88 | } |
| 89 | |
| 90 | static inline u32 ath79_reset_rr(unsigned reg) |
| 91 | { |
| 92 | return __raw_readl(ath79_reset_base + reg); |
| 93 | } |
| 94 | |
| 95 | void ath79_device_reset_set(u32 mask); |
| 96 | void ath79_device_reset_clear(u32 mask); |
| 97 | |
| 98 | #endif /* __ASM_MACH_ATH79_H */ |