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gerrit-public.fairphone.software / kernel / msm-5.4 / 6e3ef2f66489d13e6ee3a26ed7bf9f920f97339b / . / arch / arm / boot / dts / imx25-pdk.dts
blob: d15349e12df919fa78dbf640cbd08daae81fccda [file] [log] [blame]
Fabio Estevam860c06f2013-01-03 14:27:35 -0200[diff] [blame]1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
Shawn Guo36dffd82013-04-07 10:49:34 +0800[diff] [blame]13#include "imx25.dtsi"
Fabio Estevam860c06f2013-01-03 14:27:35 -0200[diff] [blame]14
15/ {
16 model = "Freescale i.MX25 Product Development Kit";
17 compatible = "fsl,imx25-pdk", "fsl,imx25";
18
19 memory {
20 reg = <0x80000000 0x4000000>;
21 };
Fabio Estevam6e3ef2f2014-03-05 17:30:38 -0300[diff] [blame^]22
23 regulators {
24 compatible = "simple-bus";
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 reg_fec_3v3: regulator@0 {
29 compatible = "regulator-fixed";
30 reg = <0>;
31 regulator-name = "fec-3v3";
32 regulator-min-microvolt = <3300000>;
33 regulator-max-microvolt = <3300000>;
34 gpio = <&gpio2 3 0>;
35 enable-active-high;
36 };
37 };
Fabio Estevam860c06f2013-01-03 14:27:35 -0200[diff] [blame]38};
39
Fabio Estevam860c06f2013-01-03 14:27:35 -0200[diff] [blame]40&fec {
41 phy-mode = "rmii";
Fabio Estevamf0bd6882014-03-05 17:30:37 -0300[diff] [blame]42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_fec>;
Fabio Estevam6e3ef2f2014-03-05 17:30:38 -0300[diff] [blame^]44 phy-supply = <&reg_fec_3v3>;
Fabio Estevam860c06f2013-01-03 14:27:35 -0200[diff] [blame]45 status = "okay";
46};
47
Fabio Estevam53ba9c72014-03-05 17:30:36 -0300[diff] [blame]48&iomuxc {
49 imx25-pdk {
Fabio Estevamf0bd6882014-03-05 17:30:37 -0300[diff] [blame]50 pinctrl_fec: fecgrp {
51 fsl,pins = <
52 MX25_PAD_FEC_MDC__FEC_MDC 0x80000000
53 MX25_PAD_FEC_MDIO__FEC_MDIO 0x400001e0
54 MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000
55 MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000
56 MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
57 MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000
58 MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000
59 MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000
60 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x1c0
Fabio Estevam6e3ef2f2014-03-05 17:30:38 -0300[diff] [blame^]61 MX25_PAD_A17__GPIO_2_3 0x80000000
Fabio Estevamf0bd6882014-03-05 17:30:37 -0300[diff] [blame]62 >;
63 };
64
Fabio Estevam53ba9c72014-03-05 17:30:36 -0300[diff] [blame]65 pinctrl_uart1: uart1grp {
66 fsl,pins = <
67 MX25_PAD_UART1_RTS__UART1_RTS 0xe0
68 MX25_PAD_UART1_CTS__UART1_CTS 0xe0
69 MX25_PAD_UART1_TXD__UART1_TXD 0x80000000
70 MX25_PAD_UART1_RXD__UART1_RXD 0xc0
71 >;
72 };
73 };
74};
75
Fabio Estevam860c06f2013-01-03 14:27:35 -0200[diff] [blame]76&nfc {
77 nand-on-flash-bbt;
78 status = "okay";
79};
Fabio Estevam8617cb02014-03-05 17:30:35 -0300[diff] [blame]80
81&uart1 {
Fabio Estevam53ba9c72014-03-05 17:30:36 -0300[diff] [blame]82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_uart1>;
84 fsl,uart-has-rtscts;
Fabio Estevam8617cb02014-03-05 17:30:35 -0300[diff] [blame]85 status = "okay";
86};