blob: 8bd238c34c7d0495f2912bb531114e22fc928017 [file] [log] [blame]
Mischa Jonkera92a5d02013-04-18 11:40:39 +02001/*
2 * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10/include/ "skeleton.dtsi"
11
12/ {
13 compatible = "snps,nsimosci";
Mischa Jonker6eda4772013-05-16 19:36:08 +020014 clock-frequency = <20000000>; /* 20 MHZ */
Mischa Jonkera92a5d02013-04-18 11:40:39 +020015 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&intc>;
18
19 chosen {
20 bootargs = "console=tty0 consoleblank=0";
21 };
22
23 aliases {
24 serial0 = &uart0;
25 };
26
27 memory {
28 device_type = "memory";
29 reg = <0x80000000 0x10000000>; /* 256M */
30 };
31
32 fpga {
33 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
36
37 /* child and parent address space 1:1 mapped */
38 ranges;
39
40 intc: interrupt-controller {
41 compatible = "snps,arc700-intc";
42 interrupt-controller;
43 #interrupt-cells = <1>;
44 };
45
46 uart0: serial@c0000000 {
Mischa Jonker6eda4772013-05-16 19:36:08 +020047 compatible = "ns8250";
Mischa Jonkera92a5d02013-04-18 11:40:39 +020048 reg = <0xc0000000 0x2000>;
49 interrupts = <11>;
Mischa Jonkera92a5d02013-04-18 11:40:39 +020050 clock-frequency = <3686400>;
51 baud = <115200>;
52 reg-shift = <2>;
53 reg-io-width = <4>;
Mischa Jonker6eda4772013-05-16 19:36:08 +020054 no-loopback-test = <1>;
Mischa Jonkera92a5d02013-04-18 11:40:39 +020055 };
56
57 pgu0: pgu@c9000000 {
58 compatible = "snps,arcpgufb";
59 reg = <0xc9000000 0x400>;
60 };
61
62 ps2: ps2@c9001000 {
63 compatible = "snps,arc_ps2";
64 reg = <0xc9000400 0x14>;
65 interrupts = <13>;
66 interrupt-names = "arc_ps2_irq";
67 };
68
69 eth0: ethernet@c0003000 {
70 compatible = "snps,oscilan";
71 reg = <0xc0003000 0x44>;
72 interrupts = <7>, <8>;
73 interrupt-names = "rx", "tx";
74 };
75 };
76};